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Hello community,
here is the log from the commit of package libdrm for openSUSE:Factory checked
in at 2023-10-22 21:01:31
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Comparing /work/SRC/openSUSE:Factory/libdrm (Old)
and /work/SRC/openSUSE:Factory/.libdrm.new.1945 (New)
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Package is "libdrm"
Sun Oct 22 21:01:31 2023 rev:169 rq:1119220 version:2.4.117
Changes:
--------
--- /work/SRC/openSUSE:Factory/libdrm/libdrm.changes 2023-09-26
22:01:34.296184505 +0200
+++ /work/SRC/openSUSE:Factory/.libdrm.new.1945/libdrm.changes 2023-10-22
21:01:49.717222107 +0200
@@ -1,0 +2,33 @@
+Fri Oct 20 11:48:41 UTC 2023 - Stefan Dirsch <sndir...@suse.com>
+
+- Update to 2.4.117
+ * modetest: print modifiers in hex as well
+ * modetest: custom mode support
+ * meson: fix intel requirements
+ * meson: Use feature.require() and feature.allowed()
+ * meson: replace deprecated program.path -> program.full_path
+ * modetest: avoid erroring if there's no gamma legacy support
+ * amdgpu: Fix pointer/integer mismatch warning
+ * amdgpu: Use PRI?64 to format uint64_t
+ * util: add NV24 and NV42 frame buffer formats
+ * util: add pattern support for DRM_FORMAT_NV{24,42}
+ * modetest: add support for DRM_FORMAT_NV{24,42}
+ * util: fix grey in YUV SMPTE patterns
+ * modetest: fix mode_vrefresh() for interlace/dblscan/vscan
+ * util: remove unused definitions of RED, GREEN, and BLUE
+ * amdgpu: add marketing names from amd-5.4.6 (22.40.6)
+ * amdgpu: add marketing names from amd-5.5.1 (23.10.1)
+ * amdgpu: add marketing names from PRO Edition 23.Q3 W7000
+ * amdgpu: add marketing names from Adrenalin 23.7.2
+ * amdgpu: add marketing names from Adrenalin 23.9.1
+ * modetest: document why no blob is created for linear gamma LUT
+ * modetest: allocate and commit atomic request around set_property()
+ * modetest: permit -r and -s to work together
+ * modetest: allow using -r and -P
+ * modetest: add support for writeback connector
+ * amdgpu: amdgpu_drm.h for new GPUVM fault ioctl
+ * amdgpu: add support for querying VM faults information
+ * xf86drm: mark DRM_MAX_MINOR as deprecated
+ * ci: bump FreeBSD to 13.2
+
+-------------------------------------------------------------------
Old:
----
libdrm-2.4.116.tar.xz
New:
----
libdrm-2.4.117.tar.xz
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Other differences:
------------------
++++++ libdrm.spec ++++++
--- /var/tmp/diff_new_pack.06S8aI/_old 2023-10-22 21:01:50.249241452 +0200
+++ /var/tmp/diff_new_pack.06S8aI/_new 2023-10-22 21:01:50.253241598 +0200
@@ -24,7 +24,7 @@
Name: libdrm
# Please remember to adjust the version in the n_libdrm-drop-valgrind* patches
-Version: 2.4.116
+Version: 2.4.117
Release: 0
Summary: Userspace Interface for Kernel DRM Services
License: MIT
++++++ libdrm-2.4.116.tar.xz -> libdrm-2.4.117.tar.xz ++++++
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/libdrm-2.4.116/.gitlab-ci.yml
new/libdrm-2.4.117/.gitlab-ci.yml
--- old/libdrm-2.4.116/.gitlab-ci.yml 2023-08-23 11:57:39.000000000 +0200
+++ new/libdrm-2.4.117/.gitlab-ci.yml 2023-10-20 07:24:54.000000000 +0200
@@ -41,10 +41,10 @@
BUILD_OS: debian
FDO_DISTRIBUTION_VERSION: buster
FDO_DISTRIBUTION_PACKAGES: 'build-essential docbook-xsl libatomic-ops-dev
libcairo2-dev libcunit1-dev libpciaccess-dev meson ninja-build pkg-config
python3 python3-pip python3-wheel python3-setuptools python3-docutils valgrind'
- FDO_DISTRIBUTION_EXEC: 'pip3 install meson==0.53.0'
+ FDO_DISTRIBUTION_EXEC: 'pip3 install meson==0.59.0'
# bump this tag every time you change something which requires rebuilding
the
# base image
- FDO_DISTRIBUTION_TAG: "2022-08-22.0"
+ FDO_DISTRIBUTION_TAG: "2023-09-01.0"
.debian-x86_64:
extends:
@@ -67,11 +67,11 @@
.os-freebsd:
variables:
BUILD_OS: freebsd
- FDO_DISTRIBUTION_VERSION: "13.0"
+ FDO_DISTRIBUTION_VERSION: "13.2"
FDO_DISTRIBUTION_PACKAGES: 'meson ninja pkgconf libpciaccess py39-docutils
cairo'
# bump this tag every time you change something which requires rebuilding
the
# base image
- FDO_DISTRIBUTION_TAG: "2022-08-22.0"
+ FDO_DISTRIBUTION_TAG: "2023-07-20.0"
.freebsd-x86_64:
extends:
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/libdrm-2.4.116/amdgpu/amdgpu-symbols.txt
new/libdrm-2.4.117/amdgpu/amdgpu-symbols.txt
--- old/libdrm-2.4.116/amdgpu/amdgpu-symbols.txt 2023-08-23
11:57:39.000000000 +0200
+++ new/libdrm-2.4.117/amdgpu/amdgpu-symbols.txt 2023-10-20
07:24:54.000000000 +0200
@@ -63,6 +63,7 @@
amdgpu_query_firmware_version
amdgpu_query_gds_info
amdgpu_query_gpu_info
+amdgpu_query_gpuvm_fault_info
amdgpu_query_heap_info
amdgpu_query_hw_ip_count
amdgpu_query_hw_ip_info
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/libdrm-2.4.116/amdgpu/amdgpu.h
new/libdrm-2.4.117/amdgpu/amdgpu.h
--- old/libdrm-2.4.116/amdgpu/amdgpu.h 2023-08-23 11:57:39.000000000 +0200
+++ new/libdrm-2.4.117/amdgpu/amdgpu.h 2023-10-20 07:24:54.000000000 +0200
@@ -1283,6 +1283,22 @@
unsigned size, void *value);
/**
+ * Query information about VM faults
+ *
+ * The return sizeof(struct drm_amdgpu_info_gpuvm_fault)
+ *
+ * \param dev - \c [in] Device handle. See
#amdgpu_device_initialize()
+ * \param size - \c [in] Size of the returned value.
+ * \param value - \c [out] Pointer to the return value.
+ *
+ * \return 0 on success\n
+ * <0 - Negative POSIX Error code
+ *
+*/
+int amdgpu_query_gpuvm_fault_info(amdgpu_device_handle dev, unsigned size,
+ void *value);
+
+/**
* Read a set of consecutive memory-mapped registers.
* Not all registers are allowed to be read by userspace.
*
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/libdrm-2.4.116/amdgpu/amdgpu_bo.c
new/libdrm-2.4.117/amdgpu/amdgpu_bo.c
--- old/libdrm-2.4.116/amdgpu/amdgpu_bo.c 2023-08-23 11:57:39.000000000
+0200
+++ new/libdrm-2.4.117/amdgpu/amdgpu_bo.c 2023-10-20 07:24:54.000000000
+0200
@@ -551,7 +551,7 @@
if (!bo || !bo->cpu_ptr || size > bo->alloc_size)
continue;
if (cpu >= bo->cpu_ptr &&
- cpu < (void*)((uintptr_t)bo->cpu_ptr + bo->alloc_size))
+ cpu < (void*)((uintptr_t)bo->cpu_ptr +
(size_t)bo->alloc_size))
break;
}
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/libdrm-2.4.116/amdgpu/amdgpu_gpu_info.c
new/libdrm-2.4.117/amdgpu/amdgpu_gpu_info.c
--- old/libdrm-2.4.116/amdgpu/amdgpu_gpu_info.c 2023-08-23 11:57:39.000000000
+0200
+++ new/libdrm-2.4.117/amdgpu/amdgpu_gpu_info.c 2023-10-20 07:24:54.000000000
+0200
@@ -346,3 +346,17 @@
return drmCommandWrite(dev->fd, DRM_AMDGPU_INFO, &request,
sizeof(struct drm_amdgpu_info));
}
+
+drm_public int amdgpu_query_gpuvm_fault_info(amdgpu_device_handle dev,
+ unsigned size, void *value)
+{
+ struct drm_amdgpu_info request;
+
+ memset(&request, 0, sizeof(request));
+ request.return_pointer = (uintptr_t)value;
+ request.return_size = size;
+ request.query = AMDGPU_INFO_GPUVM_FAULT;
+
+ return drmCommandWrite(dev->fd, DRM_AMDGPU_INFO, &request,
+ sizeof(struct drm_amdgpu_info));
+}
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/libdrm-2.4.116/amdgpu/meson.build
new/libdrm-2.4.117/amdgpu/meson.build
--- old/libdrm-2.4.116/amdgpu/meson.build 2023-08-23 11:57:39.000000000
+0200
+++ new/libdrm-2.4.117/amdgpu/meson.build 2023-10-20 07:24:54.000000000
+0200
@@ -65,6 +65,6 @@
args : [
'--lib', libdrm_amdgpu,
'--symbols-file', files('amdgpu-symbols.txt'),
- '--nm', prog_nm.path(),
+ '--nm', prog_nm.full_path(),
],
)
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/libdrm-2.4.116/data/amdgpu.ids
new/libdrm-2.4.117/data/amdgpu.ids
--- old/libdrm-2.4.116/data/amdgpu.ids 2023-08-23 11:57:39.000000000 +0200
+++ new/libdrm-2.4.117/data/amdgpu.ids 2023-10-20 07:24:54.000000000 +0200
@@ -396,12 +396,20 @@
743F, CC, AMD Radeon 6550S
743F, CF, AMD Radeon RX 6300M
743F, D7, AMD Radeon RX 6400
+7448, 00, AMD Radeon Pro W7900
744C, C8, AMD Radeon RX 7900 XTX
744C, CC, AMD Radeon RX 7900 XT
+744C, CE, AMD Radeon RX 7900 GRE
+745E, CC, AMD Radeon Pro W7800
+747E, C8, AMD Radeon RX 7800 XT
+747E, FF, AMD Radeon RX 7700 XT
+7480, 00, AMD Radeon Pro W7600
7480, C1, AMD Radeon RX 7700S
7480, C3, AMD Radeon RX 7600S
7480, C7, AMD Radeon RX 7600M XT
+7480, CF, AMD Radeon RX 7600
7483, CF, AMD Radeon RX 7600M
+7489, 00, AMD Radeon Pro W7500
9830, 00, AMD Radeon HD 8400 / R3 Series
9831, 00, AMD Radeon HD 8400E
9832, 00, AMD Radeon HD 8330
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/libdrm-2.4.116/include/drm/amdgpu_drm.h
new/libdrm-2.4.117/include/drm/amdgpu_drm.h
--- old/libdrm-2.4.116/include/drm/amdgpu_drm.h 2023-08-23 11:57:39.000000000
+0200
+++ new/libdrm-2.4.117/include/drm/amdgpu_drm.h 2023-10-20 07:24:54.000000000
+0200
@@ -94,6 +94,9 @@
*
* %AMDGPU_GEM_DOMAIN_OA Ordered append, used by 3D or Compute engines
* for appending data.
+ *
+ * %AMDGPU_GEM_DOMAIN_DOORBELL Doorbell. It is an MMIO region for
+ * signalling user mode queues.
*/
#define AMDGPU_GEM_DOMAIN_CPU 0x1
#define AMDGPU_GEM_DOMAIN_GTT 0x2
@@ -101,12 +104,14 @@
#define AMDGPU_GEM_DOMAIN_GDS 0x8
#define AMDGPU_GEM_DOMAIN_GWS 0x10
#define AMDGPU_GEM_DOMAIN_OA 0x20
+#define AMDGPU_GEM_DOMAIN_DOORBELL 0x40
#define AMDGPU_GEM_DOMAIN_MASK (AMDGPU_GEM_DOMAIN_CPU | \
AMDGPU_GEM_DOMAIN_GTT | \
AMDGPU_GEM_DOMAIN_VRAM | \
AMDGPU_GEM_DOMAIN_GDS | \
AMDGPU_GEM_DOMAIN_GWS | \
- AMDGPU_GEM_DOMAIN_OA)
+ AMDGPU_GEM_DOMAIN_OA | \
+ AMDGPU_GEM_DOMAIN_DOORBELL)
/* Flag that CPU access will be required for the case of VRAM domain */
#define AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED (1 << 0)
@@ -140,6 +145,32 @@
* not require GTT memory accounting
*/
#define AMDGPU_GEM_CREATE_PREEMPTIBLE (1 << 11)
+/* Flag that BO can be discarded under memory pressure without keeping the
+ * content.
+ */
+#define AMDGPU_GEM_CREATE_DISCARDABLE (1 << 12)
+/* Flag that BO is shared coherently between multiple devices or CPU threads.
+ * May depend on GPU instructions to flush caches to system scope explicitly.
+ *
+ * This influences the choice of MTYPE in the PTEs on GFXv9 and later GPUs and
+ * may override the MTYPE selected in AMDGPU_VA_OP_MAP.
+ */
+#define AMDGPU_GEM_CREATE_COHERENT (1 << 13)
+/* Flag that BO should not be cached by GPU. Coherent without having to flush
+ * GPU caches explicitly
+ *
+ * This influences the choice of MTYPE in the PTEs on GFXv9 and later GPUs and
+ * may override the MTYPE selected in AMDGPU_VA_OP_MAP.
+ */
+#define AMDGPU_GEM_CREATE_UNCACHED (1 << 14)
+/* Flag that BO should be coherent across devices when using device-level
+ * atomics. May depend on GPU instructions to flush caches to device scope
+ * explicitly, promoting them to system scope automatically.
+ *
+ * This influences the choice of MTYPE in the PTEs on GFXv9 and later GPUs and
+ * may override the MTYPE selected in AMDGPU_VA_OP_MAP.
+ */
+#define AMDGPU_GEM_CREATE_EXT_COHERENT (1 << 15)
struct drm_amdgpu_gem_create_in {
/** the requested memory size */
@@ -218,15 +249,17 @@
/* unknown cause */
#define AMDGPU_CTX_UNKNOWN_RESET 3
-/* indicate gpu reset occured after ctx created */
+/* indicate gpu reset occurred after ctx created */
#define AMDGPU_CTX_QUERY2_FLAGS_RESET (1<<0)
-/* indicate vram lost occured after ctx created */
+/* indicate vram lost occurred after ctx created */
#define AMDGPU_CTX_QUERY2_FLAGS_VRAMLOST (1<<1)
/* indicate some job from this context once cause gpu hang */
#define AMDGPU_CTX_QUERY2_FLAGS_GUILTY (1<<2)
/* indicate some errors are detected by RAS */
#define AMDGPU_CTX_QUERY2_FLAGS_RAS_CE (1<<3)
#define AMDGPU_CTX_QUERY2_FLAGS_RAS_UE (1<<4)
+/* indicate that the reset hasn't completed yet */
+#define AMDGPU_CTX_QUERY2_FLAGS_RESET_IN_PROGRESS (1<<5)
/* Context priority level */
#define AMDGPU_CTX_PRIORITY_UNSET -2048
@@ -529,6 +562,8 @@
#define AMDGPU_VM_MTYPE_UC (4 << 5)
/* Use Read Write MTYPE instead of default MTYPE */
#define AMDGPU_VM_MTYPE_RW (5 << 5)
+/* don't allocate MALL */
+#define AMDGPU_VM_PAGE_NOALLOC (1 << 9)
struct drm_amdgpu_gem_va {
/** GEM object handle */
@@ -559,7 +594,8 @@
*/
#define AMDGPU_HW_IP_VCN_ENC 7
#define AMDGPU_HW_IP_VCN_JPEG 8
-#define AMDGPU_HW_IP_NUM 9
+#define AMDGPU_HW_IP_VPE 9
+#define AMDGPU_HW_IP_NUM 10
#define AMDGPU_HW_IP_INSTANCE_MAX_COUNT 1
@@ -572,6 +608,7 @@
#define AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES 0x07
#define AMDGPU_CHUNK_ID_SYNCOBJ_TIMELINE_WAIT 0x08
#define AMDGPU_CHUNK_ID_SYNCOBJ_TIMELINE_SIGNAL 0x09
+#define AMDGPU_CHUNK_ID_CP_GFX_SHADOW 0x0a
struct drm_amdgpu_cs_chunk {
__u32 chunk_id;
@@ -688,6 +725,15 @@
};
};
+#define AMDGPU_CS_CHUNK_CP_GFX_SHADOW_FLAGS_INIT_SHADOW 0x1
+
+struct drm_amdgpu_cs_chunk_cp_gfx_shadow {
+ __u64 shadow_va;
+ __u64 csa_va;
+ __u64 gds_va;
+ __u64 flags;
+};
+
/*
* Query h/w info: Flag that this is integrated (a.h.a. fusion) GPU
*
@@ -695,6 +741,7 @@
#define AMDGPU_IDS_FLAGS_FUSION 0x1
#define AMDGPU_IDS_FLAGS_PREEMPTION 0x2
#define AMDGPU_IDS_FLAGS_TMZ 0x4
+#define AMDGPU_IDS_FLAGS_CONFORMANT_TRUNC_COORD 0x8
/* indicate if acceleration can be working */
#define AMDGPU_INFO_ACCEL_WORKING 0x00
@@ -747,6 +794,20 @@
#define AMDGPU_INFO_FW_DMCUB 0x14
/* Subquery id: Query TOC firmware version */
#define AMDGPU_INFO_FW_TOC 0x15
+ /* Subquery id: Query CAP firmware version */
+ #define AMDGPU_INFO_FW_CAP 0x16
+ /* Subquery id: Query GFX RLCP firmware version */
+ #define AMDGPU_INFO_FW_GFX_RLCP 0x17
+ /* Subquery id: Query GFX RLCV firmware version */
+ #define AMDGPU_INFO_FW_GFX_RLCV 0x18
+ /* Subquery id: Query MES_KIQ firmware version */
+ #define AMDGPU_INFO_FW_MES_KIQ 0x19
+ /* Subquery id: Query MES firmware version */
+ #define AMDGPU_INFO_FW_MES 0x1a
+ /* Subquery id: Query IMU firmware version */
+ #define AMDGPU_INFO_FW_IMU 0x1b
+ /* Subquery id: Query VPE firmware version */
+ #define AMDGPU_INFO_FW_VPE 0x1c
/* number of bytes moved for TTM migration */
#define AMDGPU_INFO_NUM_BYTES_MOVED 0x0f
@@ -800,6 +861,10 @@
#define AMDGPU_INFO_SENSOR_STABLE_PSTATE_GFX_SCLK 0x8
/* Subquery id: Query GPU stable pstate memory clock */
#define AMDGPU_INFO_SENSOR_STABLE_PSTATE_GFX_MCLK 0x9
+ /* Subquery id: Query GPU peak pstate shader clock */
+ #define AMDGPU_INFO_SENSOR_PEAK_PSTATE_GFX_SCLK 0xa
+ /* Subquery id: Query GPU peak pstate memory clock */
+ #define AMDGPU_INFO_SENSOR_PEAK_PSTATE_GFX_MCLK 0xb
/* Number of VRAM page faults on CPU access. */
#define AMDGPU_INFO_NUM_VRAM_CPU_PAGE_FAULTS 0x1E
#define AMDGPU_INFO_VRAM_LOST_COUNTER 0x1F
@@ -839,6 +904,10 @@
#define AMDGPU_INFO_VIDEO_CAPS_DECODE 0
/* Subquery id: Encode */
#define AMDGPU_INFO_VIDEO_CAPS_ENCODE 1
+/* Query the max number of IBs per gang per submission */
+#define AMDGPU_INFO_MAX_IBS 0x22
+/* query last page fault info */
+#define AMDGPU_INFO_GPUVM_FAULT 0x23
#define AMDGPU_INFO_MMR_SE_INDEX_SHIFT 0
#define AMDGPU_INFO_MMR_SE_INDEX_MASK 0xff
@@ -990,6 +1059,8 @@
#define AMDGPU_VRAM_TYPE_DDR4 8
#define AMDGPU_VRAM_TYPE_GDDR6 9
#define AMDGPU_VRAM_TYPE_DDR5 10
+#define AMDGPU_VRAM_TYPE_LPDDR4 11
+#define AMDGPU_VRAM_TYPE_LPDDR5 12
struct drm_amdgpu_info_device {
/** PCI Device ID */
@@ -1015,7 +1086,8 @@
__u32 enabled_rb_pipes_mask;
__u32 num_rb_pipes;
__u32 num_hw_gfx_contexts;
- __u32 _pad;
+ /* PCIe version (the smaller of the GPU and the CPU/motherboard) */
+ __u32 pcie_gen;
__u64 ids_flags;
/** Starting virtual address for UMDs. */
__u64 virtual_address_offset;
@@ -1062,7 +1134,8 @@
__u32 gs_prim_buffer_depth;
/* max gs wavefront per vgt*/
__u32 max_gs_waves_per_vgt;
- __u32 _pad1;
+ /* PCIe number of lanes (the smaller of the GPU and the
CPU/motherboard) */
+ __u32 pcie_num_lanes;
/* always on cu bitmap */
__u32 cu_ao_bitmap[4][4];
/** Starting high virtual address for UMDs. */
@@ -1073,6 +1146,26 @@
__u32 pa_sc_tile_steering_override;
/* disabled TCCs */
__u64 tcc_disabled_mask;
+ __u64 min_engine_clock;
+ __u64 min_memory_clock;
+ /* The following fields are only set on gfx11+, older chips set 0. */
+ __u32 tcp_cache_size; /* AKA GL0, VMEM cache */
+ __u32 num_sqc_per_wgp;
+ __u32 sqc_data_cache_size; /* AKA SMEM cache */
+ __u32 sqc_inst_cache_size;
+ __u32 gl1c_cache_size;
+ __u32 gl2c_cache_size;
+ __u64 mall_size; /* AKA infinity cache */
+ /* high 32 bits of the rb pipes mask */
+ __u32 enabled_rb_pipes_mask_hi;
+ /* shadow area size for gfx11 */
+ __u32 shadow_size;
+ /* shadow area base virtual alignment for gfx11 */
+ __u32 shadow_alignment;
+ /* context save area size for gfx11 */
+ __u32 csa_size;
+ /* context save area base virtual alignment for gfx11 */
+ __u32 csa_alignment;
};
struct drm_amdgpu_info_hw_ip {
@@ -1087,7 +1180,8 @@
__u32 ib_size_alignment;
/** Bitmask of available rings. Bit 0 means ring 0, etc. */
__u32 available_rings;
- __u32 _pad;
+ /** version info: bits 23:16 major, 15:8 minor, 7:0 revision */
+ __u32 ip_discovery_version;
};
struct drm_amdgpu_info_num_handles {
@@ -1139,6 +1233,20 @@
struct drm_amdgpu_info_video_codec_info
codec_info[AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_COUNT];
};
+#define AMDGPU_VMHUB_TYPE_MASK 0xff
+#define AMDGPU_VMHUB_TYPE_SHIFT 0
+#define AMDGPU_VMHUB_TYPE_GFX 0
+#define AMDGPU_VMHUB_TYPE_MM0 1
+#define AMDGPU_VMHUB_TYPE_MM1 2
+#define AMDGPU_VMHUB_IDX_MASK 0xff00
+#define AMDGPU_VMHUB_IDX_SHIFT 8
+
+struct drm_amdgpu_info_gpuvm_fault {
+ __u64 addr;
+ __u32 status;
+ __u32 vmhub;
+};
+
/*
* Supported GPU families
*/
@@ -1152,7 +1260,12 @@
#define AMDGPU_FAMILY_RV 142 /* Raven */
#define AMDGPU_FAMILY_NV 143 /* Navi10 */
#define AMDGPU_FAMILY_VGH 144 /* Van Gogh */
+#define AMDGPU_FAMILY_GC_11_0_0 145 /* GC 11.0.0 */
#define AMDGPU_FAMILY_YC 146 /* Yellow Carp */
+#define AMDGPU_FAMILY_GC_11_0_1 148 /* GC 11.0.1 */
+#define AMDGPU_FAMILY_GC_10_3_6 149 /* GC 10.3.6 */
+#define AMDGPU_FAMILY_GC_10_3_7 151 /* GC 10.3.7 */
+#define AMDGPU_FAMILY_GC_11_5_0 150 /* GC 11.5.0 */
#if defined(__cplusplus)
}
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/libdrm-2.4.116/meson.build
new/libdrm-2.4.117/meson.build
--- old/libdrm-2.4.116/meson.build 2023-08-23 11:57:39.000000000 +0200
+++ new/libdrm-2.4.117/meson.build 2023-10-20 07:24:54.000000000 +0200
@@ -21,9 +21,9 @@
project(
'libdrm',
['c'],
- version : '2.4.116',
+ version : '2.4.117',
license : 'MIT',
- meson_version : '>= 0.53',
+ meson_version : '>= 0.59',
default_options : ['buildtype=debugoptimized', 'c_std=c11'],
)
@@ -84,109 +84,61 @@
dep_pciaccess = dependency('pciaccess', version : '>= 0.10', required :
get_option('intel'))
-with_intel = false
-_intel = get_option('intel')
-if not _intel.disabled()
- if _intel.enabled() and not with_atomics
- error('libdrm_intel requires atomics.')
- else
- with_intel = (_intel.enabled() or
host_machine.cpu_family().startswith('x86')) and with_atomics and
dep_pciaccess.found()
- endif
-endif
+with_intel = get_option('intel') \
+ .require(with_atomics, error_message : 'libdrm_intel requires atomics') \
+ .require(dep_pciaccess.found(), error_message : 'libdrm_intel requires
libpciaccess') \
+ .disable_auto_if(not host_machine.system().startswith('x86')) \
+ .allowed()
summary('Intel', with_intel)
-with_radeon = false
-_radeon = get_option('radeon')
-if not _radeon.disabled()
- if _radeon.enabled() and not with_atomics
- error('libdrm_radeon requires atomics.')
- endif
- with_radeon = with_atomics
-endif
+with_radeon = get_option('radeon') \
+ .require(with_atomics, error_message : 'libdrm_radeon requires atomics') \
+ .allowed()
summary('Radeon', with_radeon)
-with_amdgpu = false
-_amdgpu = get_option('amdgpu')
-if not _amdgpu.disabled()
- if _amdgpu.enabled() and not with_atomics
- error('libdrm_amdgpu requires atomics.')
- endif
- with_amdgpu = with_atomics
-endif
+with_amdgpu = get_option('amdgpu') \
+ .require(with_atomics, error_message : 'libdrm_amdgpu requires atomics') \
+ .allowed()
summary('AMDGPU', with_amdgpu)
-with_nouveau = false
-_nouveau = get_option('nouveau')
-if not _nouveau.disabled()
- if _nouveau.enabled() and not with_atomics
- error('libdrm_nouveau requires atomics.')
- endif
- with_nouveau = with_atomics
-endif
+with_nouveau = get_option('nouveau') \
+ .require(with_atomics, error_message : 'libdrm_nouveau requires atomics') \
+ .allowed()
summary('Nouveau', with_nouveau)
-with_vmwgfx = false
-_vmwgfx = get_option('vmwgfx')
-if not _vmwgfx.disabled()
- with_vmwgfx = true
-endif
+with_vmwgfx = get_option('vmwgfx').allowed()
summary('vmwgfx', with_vmwgfx)
-with_omap = false
-_omap = get_option('omap')
-if _omap.enabled()
- if not with_atomics
- error('libdrm_omap requires atomics.')
- endif
- with_omap = true
-endif
+with_omap = get_option('omap') \
+ .require(with_atomics, error_message : 'libdrm_omap requires atomics') \
+ .enabled()
summary('OMAP', with_omap)
-with_freedreno = false
-_freedreno = get_option('freedreno')
-if not _freedreno.disabled()
- if _freedreno.enabled() and not with_atomics
- error('libdrm_freedreno requires atomics.')
- else
- with_freedreno = (_freedreno.enabled() or ['arm',
'aarch64'].contains(host_machine.cpu_family())) and with_atomics
- endif
-endif
+with_freedreno = get_option('freedreno') \
+ .require(with_atomics, error_message : 'libdrm_freedreno requires atomics') \
+ .disable_auto_if(not ['arm', 'aarch64'].contains(host_machine.cpu_family()))
\
+ .allowed()
summary('Freedreno', with_freedreno)
summary('Freedreon-kgsl', with_freedreno_kgsl)
-with_tegra = false
-_tegra = get_option('tegra')
-if _tegra.enabled()
- if not with_atomics
- error('libdrm_tegra requires atomics.')
- endif
- with_tegra = true
-endif
+with_tegra = get_option('tegra') \
+ .require(with_atomics, error_message : 'libdrm_tegra requires atomics') \
+ .disable_auto_if(not ['arm', 'aarch64'].contains(host_machine.cpu_family()))
\
+ .enabled()
summary('Tegra', with_tegra)
-with_etnaviv = false
-_etnaviv = get_option('etnaviv')
-if not _etnaviv.disabled()
- if _etnaviv.enabled() and not with_atomics
- error('libdrm_etnaviv requires atomics.')
- endif
- with_etnaviv = _etnaviv.enabled() or (
- with_atomics and [
- 'loongarch64', 'mips', 'mips64',
- 'arm', 'aarch64', 'arc',
- ].contains(host_machine.cpu_family())
- )
-endif
+with_etnaviv = get_option('etnaviv') \
+ .require(with_atomics, error_message : 'libdrm_etnaviv requires atomics') \
+ .disable_auto_if(not ['arm', 'aarch64', 'arc', 'mips', 'mips64',
'loongarch64'].contains(host_machine.cpu_family())) \
+ .allowed()
summary('Etnaviv', with_etnaviv)
with_exynos = get_option('exynos').enabled()
summary('EXYNOS', with_exynos)
-with_vc4 = false
-_vc4 = get_option('vc4')
-if not _vc4.disabled()
- with_vc4 = _vc4.enabled() or ['arm',
'aarch64'].contains(host_machine.cpu_family())
-endif
+with_vc4 = get_option('vc4') \
+ .disable_auto_if(not ['arm', 'aarch64'].contains(host_machine.cpu_family()))
\
+ .allowed()
summary('VC4', with_vc4)
# Among others FreeBSD does not have a separate dl library.
@@ -314,7 +266,7 @@
args : [
'--lib', libdrm,
'--symbols-file', files('core-symbols.txt'),
- '--nm', prog_nm.path(),
+ '--nm', prog_nm.full_path(),
],
)
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/libdrm-2.4.116/nouveau/meson.build
new/libdrm-2.4.117/nouveau/meson.build
--- old/libdrm-2.4.116/nouveau/meson.build 2023-08-23 11:57:39.000000000
+0200
+++ new/libdrm-2.4.117/nouveau/meson.build 2023-10-20 07:24:54.000000000
+0200
@@ -60,6 +60,6 @@
args : [
'--lib', libdrm_nouveau,
'--symbols-file', files('nouveau-symbols.txt'),
- '--nm', prog_nm.path(),
+ '--nm', prog_nm.full_path(),
],
)
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/libdrm-2.4.116/radeon/meson.build
new/libdrm-2.4.117/radeon/meson.build
--- old/libdrm-2.4.116/radeon/meson.build 2023-08-23 11:57:39.000000000
+0200
+++ new/libdrm-2.4.117/radeon/meson.build 2023-10-20 07:24:54.000000000
+0200
@@ -65,6 +65,6 @@
args : [
'--lib', libdrm_radeon,
'--symbols-file', files('radeon-symbols.txt'),
- '--nm', prog_nm.path(),
+ '--nm', prog_nm.full_path(),
],
)
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/libdrm-2.4.116/tests/amdgpu/amdgpu_stress.c
new/libdrm-2.4.117/tests/amdgpu/amdgpu_stress.c
--- old/libdrm-2.4.116/tests/amdgpu/amdgpu_stress.c 2023-08-23
11:57:39.000000000 +0200
+++ new/libdrm-2.4.117/tests/amdgpu/amdgpu_stress.c 2023-10-20
07:24:54.000000000 +0200
@@ -30,6 +30,7 @@
#include <errno.h>
#include <unistd.h>
#include <stdlib.h>
+#include <inttypes.h>
#include "drm.h"
#include "xf86drmMode.h"
@@ -175,7 +176,7 @@
resources[num_buffers] = bo;
virtual[num_buffers] = addr;
- fprintf(stdout, "Allocated BO number %u at 0x%lx, domain 0x%x, size
%lu\n",
+ fprintf(stdout, "Allocated BO number %u at 0x%" PRIx64 ", domain 0x%x,
size %" PRIu64 "\n",
num_buffers++, addr, domain, size);
return 0;
}
@@ -273,7 +274,7 @@
delta = stop.tv_nsec + stop.tv_sec * 1000000000UL;
delta -= start.tv_nsec + start.tv_sec * 1000000000UL;
- fprintf(stdout, "Submitted %u IBs to copy from %u(%lx) to %u(%lx) %lu
bytes took %lu usec\n",
+ fprintf(stdout, "Submitted %u IBs to copy from %u(%" PRIx64 ") to %u(%"
PRIx64 ") %" PRIu64 " bytes took %" PRIu64 " usec\n",
count, from, virtual[from], to, virtual[to], copied, delta /
1000);
return 0;
}
@@ -293,7 +294,7 @@
char ext[2];
ext[0] = 0;
- if (sscanf(optarg, "%li%1[kmgKMG]", &size, ext) < 1) {
+ if (sscanf(optarg, "%" PRIi64 "%1[kmgKMG]", &size, ext) < 1) {
fprintf(stderr, "Can't parse size arg: %s\n", optarg);
exit(EXIT_FAILURE);
}
@@ -375,7 +376,7 @@
next_arg(argc, argv, "Missing buffer size");
size = parse_size();
if (size < getpagesize()) {
- fprintf(stderr, "Buffer size to small %lu\n",
size);
+ fprintf(stderr, "Buffer size to small %" PRIu64
"\n", size);
exit(EXIT_FAILURE);
}
r = alloc_bo(domain, size);
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/libdrm-2.4.116/tests/modetest/buffers.c
new/libdrm-2.4.117/tests/modetest/buffers.c
--- old/libdrm-2.4.116/tests/modetest/buffers.c 2023-08-23 11:57:39.000000000
+0200
+++ new/libdrm-2.4.117/tests/modetest/buffers.c 2023-10-20 07:24:54.000000000
+0200
@@ -129,6 +129,8 @@
case DRM_FORMAT_NV21:
case DRM_FORMAT_NV16:
case DRM_FORMAT_NV61:
+ case DRM_FORMAT_NV24:
+ case DRM_FORMAT_NV42:
case DRM_FORMAT_YUV420:
case DRM_FORMAT_YVU420:
bpp = 8;
@@ -208,6 +210,11 @@
virtual_height = height * 2;
break;
+ case DRM_FORMAT_NV24:
+ case DRM_FORMAT_NV42:
+ virtual_height = height * 3;
+ break;
+
default:
virtual_height = height;
break;
@@ -255,6 +262,19 @@
planes[1] = virtual + offsets[1];
break;
+ case DRM_FORMAT_NV24:
+ case DRM_FORMAT_NV42:
+ offsets[0] = 0;
+ handles[0] = bo->handle;
+ pitches[0] = bo->pitch;
+ pitches[1] = pitches[0] * 2;
+ offsets[1] = pitches[0] * height;
+ handles[1] = bo->handle;
+
+ planes[0] = virtual;
+ planes[1] = virtual + offsets[1];
+ break;
+
case DRM_FORMAT_YUV420:
case DRM_FORMAT_YVU420:
offsets[0] = 0;
@@ -338,3 +358,22 @@
free(bo);
}
+
+void bo_dump(struct bo *bo, const char *filename)
+{
+ FILE *fp;
+
+ if (!bo || !filename)
+ return;
+
+ fp = fopen(filename, "wb");
+ if (fp) {
+ void *addr;
+
+ bo_map(bo, &addr);
+ printf("Dumping buffer %p to file %s.\n", bo->ptr, filename);
+ fwrite(bo->ptr, 1, bo->size, fp);
+ bo_unmap(bo);
+ fclose(fp);
+ }
+}
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/libdrm-2.4.116/tests/modetest/buffers.h
new/libdrm-2.4.117/tests/modetest/buffers.h
--- old/libdrm-2.4.116/tests/modetest/buffers.h 2023-08-23 11:57:39.000000000
+0200
+++ new/libdrm-2.4.117/tests/modetest/buffers.h 2023-10-20 07:24:54.000000000
+0200
@@ -36,5 +36,6 @@
unsigned int handles[4], unsigned int pitches[4],
unsigned int offsets[4], enum util_fill_pattern pattern);
void bo_destroy(struct bo *bo);
+void bo_dump(struct bo *bo, const char *filename);
#endif
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/libdrm-2.4.116/tests/modetest/meson.build
new/libdrm-2.4.117/tests/modetest/meson.build
--- old/libdrm-2.4.116/tests/modetest/meson.build 2023-08-23
11:57:39.000000000 +0200
+++ new/libdrm-2.4.117/tests/modetest/meson.build 2023-10-20
07:24:54.000000000 +0200
@@ -25,5 +25,6 @@
include_directories : [inc_root, inc_tests, inc_drm],
dependencies : [dep_threads, dep_cairo],
link_with : [libdrm, libutil],
+ link_args: '-lm',
install : with_install_tests,
)
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/libdrm-2.4.116/tests/modetest/modetest.c
new/libdrm-2.4.117/tests/modetest/modetest.c
--- old/libdrm-2.4.116/tests/modetest/modetest.c 2023-08-23
11:57:39.000000000 +0200
+++ new/libdrm-2.4.117/tests/modetest/modetest.c 2023-10-20
07:24:54.000000000 +0200
@@ -70,6 +70,7 @@
static enum util_fill_pattern primary_fill = UTIL_PATTERN_SMPTE;
static enum util_fill_pattern secondary_fill = UTIL_PATTERN_TILES;
+static drmModeModeInfo user_mode;
struct crtc {
drmModeCrtc *crtc;
@@ -128,6 +129,7 @@
int use_atomic;
drmModeAtomicReq *req;
+ int32_t writeback_fence_fd;
};
static inline int64_t U642I64(uint64_t val)
@@ -137,8 +139,19 @@
static float mode_vrefresh(drmModeModeInfo *mode)
{
- return mode->clock * 1000.00
- / (mode->htotal * mode->vtotal);
+ unsigned int num, den;
+
+ num = mode->clock;
+ den = mode->htotal * mode->vtotal;
+
+ if (mode->flags & DRM_MODE_FLAG_INTERLACE)
+ num *= 2;
+ if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
+ den *= 2;
+ if (mode->vscan > 1)
+ den *= mode->vscan;
+
+ return num * 1000.00 / den;
}
#define bit_name_fn(res) \
@@ -317,7 +330,7 @@
printf(": ");
}
- printf(" %s", modifier_to_string(iter.mod));
+ printf(" %s(0x%"PRIx64")", modifier_to_string(iter.mod),
iter.mod);
}
printf("\n");
@@ -811,6 +824,8 @@
struct crtc *crtc;
unsigned int fb_id[2], current_fb_id;
struct timeval start;
+ unsigned int out_fb_id;
+ struct bo *out_bo;
int swap_count;
};
@@ -839,7 +854,25 @@
int i;
connector = get_connector_by_id(dev, con_id);
- if (!connector || !connector->count_modes)
+ if (!connector)
+ return NULL;
+
+ if (strchr(mode_str, ',')) {
+ i = sscanf(mode_str, "%hu,%hu,%hu,%hu,%hu,%hu,%hu,%hu",
+ &user_mode.hdisplay, &user_mode.hsync_start,
+ &user_mode.hsync_end, &user_mode.htotal,
+ &user_mode.vdisplay, &user_mode.vsync_start,
+ &user_mode.vsync_end, &user_mode.vtotal);
+ if (i == 8) {
+ user_mode.clock = roundf(user_mode.htotal *
user_mode.vtotal * vrefresh / 1000);
+ user_mode.vrefresh = roundf(vrefresh);
+ snprintf(user_mode.name, sizeof(user_mode.name),
"custom%dx%d", user_mode.hdisplay, user_mode.vdisplay);
+
+ return &user_mode;
+ }
+ }
+
+ if (!connector->count_modes)
return NULL;
/* Pick by Index */
@@ -1040,7 +1073,7 @@
if (ret < 0)
fprintf(stderr, "failed to set %s %i property %s to %" PRIu64
": %s\n",
- obj_type, p->obj_id, p->name, p->value,
strerror(errno));
+ obj_type, p->obj_id, p->name, p->value, strerror(-ret));
return true;
}
@@ -1125,6 +1158,11 @@
util_smpte_c8_gamma(256, gamma_lut);
drmModeCreatePropertyBlob(dev->fd, gamma_lut,
sizeof(gamma_lut), &blob_id);
} else {
+ /*
+ * Initialize gamma_lut to a linear table for the legacy API
below.
+ * The modern property API resets to a linear/pass-thru table
if blob_id
+ * is 0, hence no PropertyBlob is created here.
+ */
for (i = 0; i < 256; i++) {
gamma_lut[i].red =
gamma_lut[i].green =
@@ -1135,6 +1173,7 @@
add_property_optional(dev, crtc_id, "DEGAMMA_LUT", 0);
add_property_optional(dev, crtc_id, "CTM", 0);
if (!add_property_optional(dev, crtc_id, "GAMMA_LUT", blob_id)) {
+ /* If we can't add the GAMMA_LUT property, try the legacy API.
*/
uint16_t r[256], g[256], b[256];
for (i = 0; i < 256; i++) {
@@ -1144,7 +1183,7 @@
}
ret = drmModeCrtcSetGamma(dev->fd, crtc_id, 256, r, g, b);
- if (ret)
+ if (ret && errno != ENOSYS)
fprintf(stderr, "failed to set gamma: %s\n",
strerror(errno));
}
}
@@ -1441,6 +1480,24 @@
return 0;
}
+static bool pipe_has_writeback_connector(struct device *dev, struct pipe_arg
*pipes,
+ unsigned int count)
+{
+ drmModeConnector *connector;
+ unsigned int i, j;
+
+ for (j = 0; j < count; j++) {
+ struct pipe_arg *pipe = &pipes[j];
+
+ for (i = 0; i < pipe->num_cons; i++) {
+ connector = get_connector_by_id(dev, pipe->con_ids[i]);
+ if (connector && connector->connector_type ==
DRM_MODE_CONNECTOR_WRITEBACK)
+ return true;
+ }
+ }
+ return false;
+}
+
static int pipe_attempt_connector(struct device *dev, drmModeConnector *con,
struct pipe_arg *pipe)
{
@@ -1503,7 +1560,8 @@
for (i = 0; i < res->count_connectors; i++) {
con = res->connectors[i].connector;
- if (!con || con->connection != DRM_MODE_CONNECTED)
+ if (!con || con->connection != DRM_MODE_CONNECTED ||
+ con->connector_type == DRM_MODE_CONNECTOR_WRITEBACK)
continue;
connected++;
}
@@ -1550,32 +1608,35 @@
return NULL;
}
-static void set_mode(struct device *dev, struct pipe_arg *pipes, unsigned int
count)
+static unsigned int set_mode(struct device *dev, struct pipe_arg **pipe_args,
unsigned int count)
{
unsigned int i, j;
int ret, x = 0;
int preferred = count == 0;
+ struct pipe_arg *pipes;
- for (i = 0; i < count; i++) {
- struct pipe_arg *pipe = &pipes[i];
-
- ret = pipe_resolve_connectors(dev, pipe);
- if (ret < 0)
- return;
-
- ret = pipe_find_crtc_and_mode(dev, pipe);
- if (ret < 0)
- continue;
- }
if (preferred) {
- struct pipe_arg *pipe_args;
-
- count = pipe_find_preferred(dev, &pipe_args);
+ count = pipe_find_preferred(dev, pipe_args);
if (!count) {
fprintf(stderr, "can't find any preferred
connector/mode.\n");
- return;
+ return 0;
+ }
+
+ pipes = *pipe_args;
+ } else {
+ pipes = *pipe_args;
+
+ for (i = 0; i < count; i++) {
+ struct pipe_arg *pipe = &pipes[i];
+
+ ret = pipe_resolve_connectors(dev, pipe);
+ if (ret < 0)
+ return 0;
+
+ ret = pipe_find_crtc_and_mode(dev, pipe);
+ if (ret < 0)
+ continue;
}
- pipes = pipe_args;
}
if (!dev->use_atomic) {
@@ -1602,7 +1663,7 @@
if (bo_fb_create(dev->fd, pipes[0].fourcc, dev->mode.width,
dev->mode.height,
primary_fill, &dev->mode.bo,
&dev->mode.fb_id))
- return;
+ return 0;
}
for (i = 0; i < count; i++) {
@@ -1634,7 +1695,7 @@
if (ret) {
fprintf(stderr, "failed to set mode: %s\n",
strerror(errno));
- return;
+ return 0;
}
set_gamma(dev, pipe->crtc_id, pipe->fourcc);
@@ -1660,6 +1721,77 @@
}
}
}
+
+ return count;
+}
+
+static void writeback_config(struct device *dev, struct pipe_arg *pipes,
unsigned int count)
+{
+ drmModeConnector *connector;
+ unsigned int i, j;
+
+ for (j = 0; j < count; j++) {
+ struct pipe_arg *pipe = &pipes[j];
+
+ for (i = 0; i < pipe->num_cons; i++) {
+ connector = get_connector_by_id(dev, pipe->con_ids[i]);
+ if (connector->connector_type ==
DRM_MODE_CONNECTOR_WRITEBACK) {
+ if (!pipe->mode) {
+ fprintf(stderr, "no mode for
writeback\n");
+ return;
+ }
+ bo_fb_create(dev->fd, pipes[j].fourcc,
+ pipe->mode->hdisplay,
pipe->mode->vdisplay,
+ UTIL_PATTERN_PLAIN,
+ &pipe->out_bo, &pipe->out_fb_id);
+ add_property(dev, pipe->con_ids[i],
"WRITEBACK_FB_ID",
+ pipe->out_fb_id);
+ add_property(dev, pipe->con_ids[i],
"WRITEBACK_OUT_FENCE_PTR",
+
(uintptr_t)(&dev->writeback_fence_fd));
+ }
+ }
+ }
+}
+
+static int poll_writeback_fence(int fd, int timeout)
+{
+ struct pollfd fds = { fd, POLLIN };
+ int ret;
+
+ do {
+ ret = poll(&fds, 1, timeout);
+ if (ret > 0) {
+ if (fds.revents & (POLLERR | POLLNVAL))
+ return -EINVAL;
+
+ return 0;
+ } else if (ret == 0) {
+ return -ETIMEDOUT;
+ } else {
+ ret = -errno;
+ if (ret == -EINTR || ret == -EAGAIN)
+ continue;
+ return ret;
+ }
+ } while (1);
+
+}
+
+static void dump_output_fb(struct device *dev, struct pipe_arg *pipes, char
*dump_path,
+ unsigned int count)
+{
+ drmModeConnector *connector;
+ unsigned int i, j;
+
+ for (j = 0; j < count; j++) {
+ struct pipe_arg *pipe = &pipes[j];
+
+ for (i = 0; i < pipe->num_cons; i++) {
+ connector = get_connector_by_id(dev, pipe->con_ids[i]);
+ if (connector->connector_type ==
DRM_MODE_CONNECTOR_WRITEBACK)
+ bo_dump(pipe->out_bo, dump_path);
+ }
+ }
}
static void atomic_clear_mode(struct device *dev, struct pipe_arg *pipes,
unsigned int count)
@@ -1990,7 +2122,7 @@
static void usage(char *name)
{
- fprintf(stderr, "usage: %s [-acDdefMPpsCvrw]\n", name);
+ fprintf(stderr, "usage: %s [-acDdefMoPpsCvrw]\n", name);
fprintf(stderr, "\n Query options:\n\n");
fprintf(stderr, "\t-c\tlist connectors\n");
@@ -2001,12 +2133,14 @@
fprintf(stderr, "\n Test options:\n\n");
fprintf(stderr, "\t-P
<plane_id>@<crtc_id>:<w>x<h>[+<x>+<y>][*<scale>][@<format>]\tset a plane\n");
fprintf(stderr, "\t-s
<connector_id>[,<connector_id>][@<crtc_id>]:[#<mode
index>]<mode>[-<vrefresh>][@<format>]\tset a mode\n");
+ fprintf(stderr, "\t\tcustom mode can be specified as
<hdisplay>,<hsyncstart>,<hsyncend>,<htotal>,<vdisplay>,<vsyncstart>,<vsyncend>,<vtotal>\n");
fprintf(stderr, "\t-C\ttest hw cursor\n");
fprintf(stderr, "\t-v\ttest vsynced page flipping\n");
fprintf(stderr, "\t-r\tset the preferred mode for all connectors\n");
fprintf(stderr, "\t-w <obj_id>:<prop_name>:<value>\tset property\n");
fprintf(stderr, "\t-a \tuse atomic API\n");
fprintf(stderr, "\t-F pattern1,pattern2\tspecify fill patterns\n");
+ fprintf(stderr, "\t-o <desired file path> \t Dump writeback output
buffer to file\n");
fprintf(stderr, "\n Generic options:\n\n");
fprintf(stderr, "\t-d\tdrop master after mode set\n");
@@ -2017,7 +2151,7 @@
exit(0);
}
-static char optstr[] = "acdD:efF:M:P:ps:Cvrw:";
+static char optstr[] = "acdD:efF:M:P:ps:Cvrw:o:";
int main(int argc, char **argv)
{
@@ -2040,6 +2174,7 @@
struct property_arg *prop_args = NULL;
unsigned int args = 0;
int ret;
+ char *dump_path = NULL;
memset(&dev, 0, sizeof dev);
@@ -2078,6 +2213,9 @@
/* Preserve the default behaviour of dumping all
information. */
args--;
break;
+ case 'o':
+ dump_path = optarg;
+ break;
case 'P':
plane_args = realloc(plane_args,
(plane_count + 1) * sizeof
*plane_args);
@@ -2143,8 +2281,8 @@
if (!args)
encoders = connectors = crtcs = planes = framebuffers = 1;
- if (test_vsync && !count) {
- fprintf(stderr, "page flipping requires at least one -s
option.\n");
+ if (test_vsync && !count && !set_preferred) {
+ fprintf(stderr, "page flipping requires at least one -s or -r
option.\n");
return -1;
}
if (set_preferred && count) {
@@ -2152,17 +2290,13 @@
return -1;
}
- if (set_preferred && plane_count) {
- fprintf(stderr, "cannot use -r (preferred) when -P (plane) is
set\n");
- return -1;
- }
-
dev.fd = util_open(device, module);
if (dev.fd < 0)
return -1;
if (use_atomic) {
ret = drmSetClientCap(dev.fd, DRM_CLIENT_CAP_ATOMIC, 1);
+ drmSetClientCap(dev.fd, DRM_CLIENT_CAP_WRITEBACK_CONNECTORS, 1);
if (ret) {
fprintf(stderr, "no atomic modesetting support: %s\n",
strerror(errno));
drmClose(dev.fd);
@@ -2186,12 +2320,13 @@
dump_resource(&dev, planes);
dump_resource(&dev, framebuffers);
+ if (dev.use_atomic)
+ dev.req = drmModeAtomicAlloc();
+
for (i = 0; i < prop_count; ++i)
set_property(&dev, &prop_args[i]);
if (dev.use_atomic) {
- dev.req = drmModeAtomicAlloc();
-
if (set_preferred || (count && plane_count)) {
uint64_t cap = 0;
@@ -2202,7 +2337,16 @@
}
if (set_preferred || count)
- set_mode(&dev, pipe_args, count);
+ count = set_mode(&dev, &pipe_args, count);
+
+ if (dump_path) {
+ if (!pipe_has_writeback_connector(&dev,
pipe_args, count)) {
+ fprintf(stderr, "No writeback connector
found, can not dump.\n");
+ return 1;
+ }
+
+ writeback_config(&dev, pipe_args, count);
+ }
if (plane_count)
atomic_set_planes(&dev, plane_args,
plane_count, false);
@@ -2213,6 +2357,18 @@
return 1;
}
+ /*
+ * Since only writeback connectors have an output fb,
this should only be
+ * called for writeback.
+ */
+ if (dump_path) {
+ ret =
poll_writeback_fence(dev.writeback_fence_fd, 1000);
+ if (ret)
+ fprintf(stderr, "Poll for writeback
error: %d. Skipping Dump.\n",
+ ret);
+ dump_output_fb(&dev, pipe_args, dump_path,
count);
+ }
+
if (test_vsync)
atomic_test_page_flip(&dev, pipe_args,
plane_args, plane_count);
@@ -2230,17 +2386,22 @@
if (count)
atomic_clear_mode(&dev, pipe_args, count);
+ }
- ret = drmModeAtomicCommit(dev.fd, dev.req,
DRM_MODE_ATOMIC_ALLOW_MODESET, NULL);
- if (ret)
- fprintf(stderr, "Atomic Commit failed\n");
+ ret = drmModeAtomicCommit(dev.fd, dev.req,
DRM_MODE_ATOMIC_ALLOW_MODESET, NULL);
+ if (ret)
+ fprintf(stderr, "Atomic Commit failed\n");
- if (plane_count)
- atomic_clear_FB(&dev, plane_args, plane_count);
- }
+ if (count && plane_count)
+ atomic_clear_FB(&dev, plane_args, plane_count);
drmModeAtomicFree(dev.req);
} else {
+ if (dump_path) {
+ fprintf(stderr, "writeback / dump is only supported in
atomic mode\n");
+ return 1;
+ }
+
if (set_preferred || count || plane_count) {
uint64_t cap = 0;
@@ -2251,7 +2412,7 @@
}
if (set_preferred || count)
- set_mode(&dev, pipe_args, count);
+ count = set_mode(&dev, &pipe_args, count);
if (plane_count)
set_planes(&dev, plane_args, plane_count);
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/libdrm-2.4.116/tests/util/format.c
new/libdrm-2.4.117/tests/util/format.c
--- old/libdrm-2.4.116/tests/util/format.c 2023-08-23 11:57:39.000000000
+0200
+++ new/libdrm-2.4.117/tests/util/format.c 2023-10-20 07:24:54.000000000
+0200
@@ -51,6 +51,8 @@
{ DRM_FORMAT_NV21, "NV21", MAKE_YUV_INFO(YUV_YCrCb, 2, 2, 2) },
{ DRM_FORMAT_NV16, "NV16", MAKE_YUV_INFO(YUV_YCbCr, 2, 1, 2) },
{ DRM_FORMAT_NV61, "NV61", MAKE_YUV_INFO(YUV_YCrCb, 2, 1, 2) },
+ { DRM_FORMAT_NV24, "NV24", MAKE_YUV_INFO(YUV_YCbCr, 1, 1, 2) },
+ { DRM_FORMAT_NV42, "NV42", MAKE_YUV_INFO(YUV_YCrCb, 1, 1, 2) },
/* YUV planar */
{ DRM_FORMAT_YUV420, "YU12", MAKE_YUV_INFO(YUV_YCbCr, 2, 2, 1) },
{ DRM_FORMAT_YVU420, "YV12", MAKE_YUV_INFO(YUV_YCrCb, 2, 2, 1) },
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/libdrm-2.4.116/tests/util/pattern.c
new/libdrm-2.4.117/tests/util/pattern.c
--- old/libdrm-2.4.116/tests/util/pattern.c 2023-08-23 11:57:39.000000000
+0200
+++ new/libdrm-2.4.117/tests/util/pattern.c 2023-10-20 07:24:54.000000000
+0200
@@ -162,7 +162,7 @@
unsigned int height, unsigned int stride)
{
const struct color_yuv colors_top[] = {
- MAKE_YUV_601(191, 192, 192), /* grey */
+ MAKE_YUV_601(192, 192, 192), /* grey */
MAKE_YUV_601(192, 192, 0), /* yellow */
MAKE_YUV_601(0, 192, 192), /* cyan */
MAKE_YUV_601(0, 192, 0), /* green */
@@ -265,7 +265,7 @@
unsigned int stride)
{
const struct color_yuv colors_top[] = {
- MAKE_YUV_601(191, 192, 192), /* grey */
+ MAKE_YUV_601(192, 192, 192), /* grey */
MAKE_YUV_601(192, 192, 0), /* yellow */
MAKE_YUV_601(0, 192, 192), /* cyan */
MAKE_YUV_601(0, 192, 0), /* green */
@@ -698,6 +698,8 @@
case DRM_FORMAT_NV21:
case DRM_FORMAT_NV16:
case DRM_FORMAT_NV61:
+ case DRM_FORMAT_NV24:
+ case DRM_FORMAT_NV42:
u = info->yuv.order & YUV_YCbCr ? planes[1] : planes[1] + 1;
v = info->yuv.order & YUV_YCrCb ? planes[1] : planes[1] + 1;
return fill_smpte_yuv_planar(&info->yuv, planes[0], u, v,
@@ -764,11 +766,6 @@
}
}
-/* swap these for big endian.. */
-#define RED 2
-#define GREEN 1
-#define BLUE 0
-
static void make_pwetty(void *data, unsigned int width, unsigned int height,
unsigned int stride, uint32_t format)
{
@@ -1023,6 +1020,8 @@
case DRM_FORMAT_NV21:
case DRM_FORMAT_NV16:
case DRM_FORMAT_NV61:
+ case DRM_FORMAT_NV24:
+ case DRM_FORMAT_NV42:
u = info->yuv.order & YUV_YCbCr ? planes[1] : planes[1] + 1;
v = info->yuv.order & YUV_YCrCb ? planes[1] : planes[1] + 1;
return fill_tiles_yuv_planar(info, planes[0], u, v,
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/libdrm-2.4.116/xf86drm.h new/libdrm-2.4.117/xf86drm.h
--- old/libdrm-2.4.116/xf86drm.h 2023-08-23 11:57:39.000000000 +0200
+++ new/libdrm-2.4.117/xf86drm.h 2023-10-20 07:24:54.000000000 +0200
@@ -44,7 +44,7 @@
#endif
#ifndef DRM_MAX_MINOR
-#define DRM_MAX_MINOR 64
+#define DRM_MAX_MINOR 64 /* deprecated */
#endif
#if defined(__linux__)
