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jerzy pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git

commit d15a68dae7d92a339d527b5784f23c6d76f2dd84
Author: Jerzy Kasenberg <[email protected]>
AuthorDate: Wed Mar 26 15:14:11 2025 +0100

    hw/bsp: Add support ublox mini nora b1
    
    Board has :
    - NRF5340 base one of the NORA-B1xx modules
    - external QPSI flash
    - USB to dual UART converter CP2105
    - 3 LEDs in one package RGB
    - 2 buttons
    - 2 MicorBUS connectos
    - 1 QWIIC connector
    - NFC antena connector
    
    Signed-off-by: Jerzy Kasenberg <[email protected]>
---
 hw/bsp/ublox_mini_nora_b1/bsp.yml               |  64 +++++++++++
 hw/bsp/ublox_mini_nora_b1/debug.sh              |  37 +++++++
 hw/bsp/ublox_mini_nora_b1/include/bsp/bsp.h     |  98 +++++++++++++++++
 hw/bsp/ublox_mini_nora_b1/net/bsp.yml           |  65 +++++++++++
 hw/bsp/ublox_mini_nora_b1/net/debug.sh          |  40 +++++++
 hw/bsp/ublox_mini_nora_b1/net/include/bsp/bsp.h |  98 +++++++++++++++++
 hw/bsp/ublox_mini_nora_b1/net/pkg.yml           |  38 +++++++
 hw/bsp/ublox_mini_nora_b1/net/src/hal_bsp.c     | 110 +++++++++++++++++++
 hw/bsp/ublox_mini_nora_b1/net/syscfg.yml        |  91 ++++++++++++++++
 hw/bsp/ublox_mini_nora_b1/pkg.yml               |  46 ++++++++
 hw/bsp/ublox_mini_nora_b1/src/hal_bsp.c         | 110 +++++++++++++++++++
 hw/bsp/ublox_mini_nora_b1/syscfg.yml            | 137 ++++++++++++++++++++++++
 12 files changed, 934 insertions(+)

diff --git a/hw/bsp/ublox_mini_nora_b1/bsp.yml 
b/hw/bsp/ublox_mini_nora_b1/bsp.yml
new file mode 100644
index 000000000..dd14a747d
--- /dev/null
+++ b/hw/bsp/ublox_mini_nora_b1/bsp.yml
@@ -0,0 +1,64 @@
+#
+# Licensed to the Apache Software Foundation (ASF) under one
+# or more contributor license agreements.  See the NOTICE file
+# distributed with this work for additional information
+# regarding copyright ownership.  The ASF licenses this file
+# to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance
+# with the License.  You may obtain a copy of the License at
+#
+#  http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+# KIND, either express or implied.  See the License for the
+# specific language governing permissions and limitations
+# under the License.
+#
+
+bsp.name: "ublox mini nora b1"
+bsp.url: https://www.u-blox.com/en/product/mini-nora-b1
+bsp.maker: "u-blox"
+bsp.arch: cortex_m33
+bsp.compiler: "@apache-mynewt-core/compiler/arm-none-eabi-m33"
+bsp.linkerscript: autogenerated
+bsp.downloadscript: "hw/scripts/download.sh"
+bsp.debugscript: "hw/bsp/ublox_mini_nora_b1/debug.sh"
+
+bsp.flash_map:
+    areas:
+        # System areas.
+        FLASH_AREA_BOOTLOADER:
+            device: 0
+            offset: 0x00000000
+            size: 32kB
+        FLASH_AREA_IMAGE_0:
+            device: 0
+            offset: 0x0000c000
+            size: 472kB
+        FLASH_AREA_IMAGE_1:
+            device: 0
+            offset: 0x00082000
+            size: 472kB
+        FLASH_AREA_IMAGE_SCRATCH:
+            device: 0
+            offset: 0x000f8000
+            size: 16kB
+
+        # User areas.
+        FLASH_AREA_REBOOT_LOG:
+            user_id: 0
+            device: 0
+            offset: 0x00008000
+            size: 16kB
+        FLASH_AREA_NFFS:
+            user_id: 1
+            device: 0
+            offset: 0x000fc000
+            size: 16kB
+        FLASH_AREA_NET_COREDUMP:
+            user_id: 2
+            device: 2
+            offset: 0x01028000
+            size: 68kB
diff --git a/hw/bsp/ublox_mini_nora_b1/debug.sh 
b/hw/bsp/ublox_mini_nora_b1/debug.sh
new file mode 100644
index 000000000..f1ec3616c
--- /dev/null
+++ b/hw/bsp/ublox_mini_nora_b1/debug.sh
@@ -0,0 +1,37 @@
+#!/bin/sh
+# Licensed to the Apache Software Foundation (ASF) under one
+# or more contributor license agreements.  See the NOTICE file
+# distributed with this work for additional information
+# regarding copyright ownership.  The ASF licenses this file
+# to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance
+# with the License.  You may obtain a copy of the License at
+#
+#   http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+# KIND, either express or implied.  See the License for the
+# specific language governing permissions and limitations
+# under the License.
+#
+
+# Called with following variables set:
+#  - CORE_PATH is absolute path to @apache-mynewt-core
+#  - BSP_PATH is absolute path to hw/bsp/bsp_name
+#  - BIN_BASENAME is the path to prefix to target binary,
+#    .elf appended to name is the ELF file
+#  - FEATURES holds the target features string
+#  - EXTRA_JTAG_CMD holds extra parameters to pass to jtag software
+#  - RESET set if target should be reset when attaching
+#  - NO_GDB set if we should not start gdb to debug
+#
+
+. $CORE_PATH/hw/scripts/jlink.sh
+
+FILE_NAME=$BIN_BASENAME.elf
+JLINK_DEV="nrf5340_xxaa_app"
+
+jlink_debug
+
diff --git a/hw/bsp/ublox_mini_nora_b1/include/bsp/bsp.h 
b/hw/bsp/ublox_mini_nora_b1/include/bsp/bsp.h
new file mode 100644
index 000000000..240267159
--- /dev/null
+++ b/hw/bsp/ublox_mini_nora_b1/include/bsp/bsp.h
@@ -0,0 +1,98 @@
+/*
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements.  See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership.  The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License.  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied.  See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
+
+#ifndef _BSP_H_
+#define _BSP_H_
+
+#include <inttypes.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Define special stackos sections */
+#define sec_data_core   __attribute__((section(".data.core")))
+#define sec_bss_core    __attribute__((section(".bss.core")))
+#define sec_bss_nz_core __attribute__((section(".bss.core.nz")))
+
+/* More convenient section placement macros. */
+#define bssnz_t         sec_bss_nz_core
+
+extern uint8_t _ram_start;
+#define RAM_SIZE        0x80000
+
+/* LED pins */
+#define LED_RED         (28)
+#define LED_GREEN       (30)
+#define LED_BLUE        (43)
+#define LED_1           (LED_GREEN)
+#define LED_2           (LED_RED)
+#define LED_3           (LED_BLUE)
+#define LED_BLINK_PIN   (LED_1)
+
+/* Buttons */
+#define BUTTON_1        (4)
+#define BUTTON_2        (22)
+
+/* MikroBUS(R) pins */
+#define MIKROBUS_1_PIN_AN   (26)  /* P0_26 */
+#define MIKROBUS_1_PIN_CS   (11)  /* P0_11 */
+#define MIKROBUS_1_PIN_SCK  (8)   /* P0_08 */
+#define MIKROBUS_1_PIN_MISO (10)  /* P0_10 */
+#define MIKROBUS_1_PIN_MOSI (9)   /* P0_09 */
+#define MIKROBUS_1_PIN_PWM  (12)  /* P0_12 */
+#define MIKROBUS_1_PIN_INT  (25)  /* P0_25 */
+#define MIKROBUS_1_PIN_RX   (6)   /* P0_06 */
+#define MIKROBUS_1_PIN_TX   (27)  /* P0_27 */
+#define MIKROBUS_1_PIN_SCL  (35)  /* P1_03 */
+#define MIKROBUS_1_PIN_SDA  (34)  /* P1_02 */
+
+#define MIKROBUS_2_PIN_AN   (5)   /* P0_05 */
+#define MIKROBUS_2_PIN_CS   (37)  /* P1_05 */
+#define MIKROBUS_2_PIN_SCK  (24)  /* P0_24 */
+#define MIKROBUS_2_PIN_MISO (38)  /* P1_06 */
+#define MIKROBUS_2_PIN_MOSI (39)  /* P1_07 */
+#define MIKROBUS_2_PIN_PWM  (29)  /* P0_29 */
+#define MIKROBUS_2_PIN_INT  (32)  /* P1_00 */
+#define MIKROBUS_2_PIN_RX   (33)  /* P1_01 */
+#define MIKROBUS_2_PIN_TX   (31)  /* P0_31 */
+#define MIKROBUS_2_PIN_SCL  (35)  /* P1_03 */
+#define MIKROBUS_2_PIN_SDA  (34)  /* P1_02 */
+
+/* QWIIC */
+#define QWICC_PIN_SCL  (35)  /* P1_03 */
+#define QWICC_PIN_SDA  (34)  /* P1_02 */
+
+/* UART CP2105 ECI */
+#define CP2105_ECI_RXD 44
+#define CP2105_ECI_TXD 45
+#define CP2105_ECI_CTS 46
+#define CP2105_ECI_RTS 47
+
+/* UART CP2105 SCI */
+#define CP2105_SCI_RXD 20
+#define CP2105_SCI_TXD 23
+#define CP2105_SCI_RTS 19
+#define CP2105_SCI_CTS 21
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BSP_H_ */
diff --git a/hw/bsp/ublox_mini_nora_b1/net/bsp.yml 
b/hw/bsp/ublox_mini_nora_b1/net/bsp.yml
new file mode 100644
index 000000000..3bad4857b
--- /dev/null
+++ b/hw/bsp/ublox_mini_nora_b1/net/bsp.yml
@@ -0,0 +1,65 @@
+#
+# Licensed to the Apache Software Foundation (ASF) under one
+# or more contributor license agreements.  See the NOTICE file
+# distributed with this work for additional information
+# regarding copyright ownership.  The ASF licenses this file
+# to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance
+# with the License.  You may obtain a copy of the License at
+#
+#  http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+# KIND, either express or implied.  See the License for the
+# specific language governing permissions and limitations
+# under the License.
+#
+
+bsp.name: "ublox mini nora b1 (Net Core)"
+bsp.url: 
https://www.nordicsemi.com/Products/Development-hardware/nRF5340-Audio-DK
+bsp.maker: "u-blox"
+bsp.arch: cortex_m33
+bsp.compiler: "@apache-mynewt-core/compiler/arm-none-eabi-m33"
+bsp.linkerscript: autogenerated
+bsp.downloadscript: "hw/scripts/download.sh"
+bsp.debugscript: "hw/bsp/ublox_mini_nora_b1/net/debug.sh"
+
+bsp.flash_map:
+    areas:
+        # System areas.
+        FLASH_AREA_BOOTLOADER:
+            device: 0
+            offset: 0x01000000
+            size: 16kB
+        FLASH_AREA_IMAGE_0:
+            device: 0
+            offset: 0x01008000
+            size: 128kB
+        FLASH_AREA_COREDUMP:
+            user_id: 2
+            device: 0
+            offset: 0x01028000
+            size: 68kB
+        # This maps to app flash and uses vflash
+        FLASH_AREA_IMAGE_1:
+            device: 1
+            offset: 0x00000000
+            size: 128kB
+        FLASH_AREA_IMAGE_SCRATCH:
+            device: 0
+            offset: 0x0103a000
+            size: 8kB
+
+        # User areas.
+        FLASH_AREA_REBOOT_LOG:
+            user_id: 0
+            device: 0
+            offset: 0x01004000
+            size: 16kB
+        FLASH_AREA_NFFS:
+            user_id: 1
+            device: 0
+            offset: 0x010fc000
+            size: 16kB
diff --git a/hw/bsp/ublox_mini_nora_b1/net/debug.sh 
b/hw/bsp/ublox_mini_nora_b1/net/debug.sh
new file mode 100644
index 000000000..beb47e058
--- /dev/null
+++ b/hw/bsp/ublox_mini_nora_b1/net/debug.sh
@@ -0,0 +1,40 @@
+#!/bin/sh
+# Licensed to the Apache Software Foundation (ASF) under one
+# or more contributor license agreements.  See the NOTICE file
+# distributed with this work for additional information
+# regarding copyright ownership.  The ASF licenses this file
+# to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance
+# with the License.  You may obtain a copy of the License at
+#
+#   http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+# KIND, either express or implied.  See the License for the
+# specific language governing permissions and limitations
+# under the License.
+#
+
+# Called with following variables set:
+#  - CORE_PATH is absolute path to @apache-mynewt-core
+#  - BSP_PATH is absolute path to hw/bsp/bsp_name
+#  - BIN_BASENAME is the path to prefix to target binary,
+#    .elf appended to name is the ELF file
+#  - FEATURES holds the target features string
+#  - EXTRA_JTAG_CMD holds extra parameters to pass to jtag software
+#  - RESET set if target should be reset when attaching
+#  - NO_GDB set if we should not start gdb to debug
+#
+
+#Use custom ports for debuging so that newt debug works on both cores
+EXTRA_JTAG_CMD="-port 3334"
+
+. $CORE_PATH/hw/scripts/jlink.sh
+
+FILE_NAME=$BIN_BASENAME.elf
+JLINK_DEV="nrf5340_xxaa_net"
+
+jlink_debug
+
diff --git a/hw/bsp/ublox_mini_nora_b1/net/include/bsp/bsp.h 
b/hw/bsp/ublox_mini_nora_b1/net/include/bsp/bsp.h
new file mode 100644
index 000000000..85e979b55
--- /dev/null
+++ b/hw/bsp/ublox_mini_nora_b1/net/include/bsp/bsp.h
@@ -0,0 +1,98 @@
+/*
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements.  See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership.  The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License.  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied.  See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
+
+#ifndef _BSP_H_
+#define _BSP_H_
+
+#include <inttypes.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Define special stackos sections */
+#define sec_data_core   __attribute__((section(".data.core")))
+#define sec_bss_core    __attribute__((section(".bss.core")))
+#define sec_bss_nz_core __attribute__((section(".bss.core.nz")))
+
+/* More convenient section placement macros. */
+#define bssnz_t         sec_bss_nz_core
+
+extern uint8_t _ram_start[];
+#define RAM_SIZE        0x10000
+
+/* LED pins */
+#define LED_RED         (28)
+#define LED_GREEN       (30)
+#define LED_BLUE        (43)
+#define LED_1           (LED_GREEN)
+#define LED_2           (LED_RED)
+#define LED_3           (LED_BLUE)
+#define LED_BLINK_PIN   (LED_1)
+
+/* Buttons */
+#define BUTTON_1        (4)
+#define BUTTON_2        (22)
+
+/* MikroBUS(R) pins */
+#define MIKROBUS_1_PIN_AN   (26)  /* P0_26 */
+#define MIKROBUS_1_PIN_CS   (11)  /* P0_11 */
+#define MIKROBUS_1_PIN_SCK  (8)   /* P0_08 */
+#define MIKROBUS_1_PIN_MISO (10)  /* P0_10 */
+#define MIKROBUS_1_PIN_MOSI (9)   /* P0_09 */
+#define MIKROBUS_1_PIN_PWM  (12)  /* P0_12 */
+#define MIKROBUS_1_PIN_INT  (25)  /* P0_25 */
+#define MIKROBUS_1_PIN_RX   (6)   /* P0_06 */
+#define MIKROBUS_1_PIN_TX   (27)  /* P0_27 */
+#define MIKROBUS_1_PIN_SCL  (35)  /* P1_03 */
+#define MIKROBUS_1_PIN_SDA  (34)  /* P1_02 */
+
+#define MIKROBUS_2_PIN_AN   (5)   /* P0_05 */
+#define MIKROBUS_2_PIN_CS   (37)  /* P1_05 */
+#define MIKROBUS_2_PIN_SCK  (24)  /* P0_24 */
+#define MIKROBUS_2_PIN_MISO (38)  /* P1_06 */
+#define MIKROBUS_2_PIN_MOSI (39)  /* P1_07 */
+#define MIKROBUS_2_PIN_PWM  (29)  /* P0_29 */
+#define MIKROBUS_2_PIN_INT  (32)  /* P1_00 */
+#define MIKROBUS_2_PIN_RX   (33)  /* P1_01 */
+#define MIKROBUS_2_PIN_TX   (31)  /* P0_31 */
+#define MIKROBUS_2_PIN_SCL  (35)  /* P1_03 */
+#define MIKROBUS_2_PIN_SDA  (34)  /* P1_02 */
+
+/* QWIIC */
+#define QWICC_PIN_SCL  (35)  /* P1_03 */
+#define QWICC_PIN_SDA  (34)  /* P1_02 */
+
+/* UART CP2105 ECI */
+#define CP2105_ECI_RXD 44
+#define CP2105_ECI_TXD 45
+#define CP2105_ECI_CTS 46
+#define CP2105_ECI_RTS 47
+
+/* UART CP2105 SCI */
+#define CP2105_SCI_RXD 20
+#define CP2105_SCI_TXD 23
+#define CP2105_SCI_RTS 19
+#define CP2105_SCI_CTS 21
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BSP_H_ */
diff --git a/hw/bsp/ublox_mini_nora_b1/net/pkg.yml 
b/hw/bsp/ublox_mini_nora_b1/net/pkg.yml
new file mode 100644
index 000000000..28dd8d699
--- /dev/null
+++ b/hw/bsp/ublox_mini_nora_b1/net/pkg.yml
@@ -0,0 +1,38 @@
+#
+# Licensed to the Apache Software Foundation (ASF) under one
+# or more contributor license agreements.  See the NOTICE file
+# distributed with this work for additional information
+# regarding copyright ownership.  The ASF licenses this file
+# to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance
+# with the License.  You may obtain a copy of the License at
+#
+#  http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+# KIND, either express or implied.  See the License for the
+# specific language governing permissions and limitations
+# under the License.
+#
+
+pkg.name: hw/bsp/ublox_mini_nora_b1/net
+pkg.type: bsp
+pkg.description: BSP definition for the Mini Nora B1 - Net Core
+pkg.author: "Apache Mynewt <[email protected]>"
+pkg.homepage: "http://mynewt.apache.org/";
+pkg.keywords:
+    - nrf5340
+    - nordic
+    - ublox
+
+pkg.cflags:
+    - '-DNRF5340_XXAA_NETWORK'
+
+pkg.deps:
+    - "@apache-mynewt-core/hw/scripts"
+    - "@apache-mynewt-core/hw/mcu/nordic/nrf5340_net"
+    - "@apache-mynewt-core/libc"
+    - "@apache-mynewt-core/sys/flash_map"
+    - "@apache-mynewt-core/hw/drivers/flash/ipc_nrf5340_flash"
diff --git a/hw/bsp/ublox_mini_nora_b1/net/src/hal_bsp.c 
b/hw/bsp/ublox_mini_nora_b1/net/src/hal_bsp.c
new file mode 100644
index 000000000..2f5a7bc76
--- /dev/null
+++ b/hw/bsp/ublox_mini_nora_b1/net/src/hal_bsp.c
@@ -0,0 +1,110 @@
+/*
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements.  See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership.  The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License.  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied.  See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
+
+#include <stdint.h>
+#include <stddef.h>
+#include <assert.h>
+#include <os/mynewt.h>
+#include "mynewt_cm.h"
+#include <nrfx.h>
+#include <flash_map/flash_map.h>
+#include <hal/hal_bsp.h>
+#include <hal/hal_flash.h>
+#include <hal/hal_flash_int.h>
+#include <hal/hal_system.h>
+#include <mcu/nrf5340_net_hal.h>
+#include <mcu/nrf5340_net_periph.h>
+#include <bsp/bsp.h>
+
+/*
+ * What memory to include in coredump.
+ */
+#if !MYNEWT_VAL(COREDUMP_SKIP_UNUSED_HEAP)
+static const struct hal_bsp_mem_dump dump_cfg[] = {
+    [0] = {
+        .hbmd_start = &_ram_start,
+        .hbmd_size = RAM_SIZE
+    }
+};
+#else
+static struct hal_bsp_mem_dump dump_cfg[2];
+extern uint8_t __StackLimit;
+extern uint8_t __StackTop;
+#endif
+
+const struct hal_flash *
+hal_bsp_flash_dev(uint8_t id)
+{
+    /*
+     * Internal flash mapped to id 0.
+     */
+    if (id == 0) {
+        return &nrf_flash_dev;
+    }
+#if MCUBOOT_MYNEWT
+    if (id == 1) {
+        return &nrf5340_net_vflash_dev.nv_flash;
+    }
+#endif
+#if MYNEWT_VAL(IPC_NRF5340_FLASH_CLIENT)
+    if (id == 2) {
+        return ipc_flash();
+    }
+#endif
+
+    return NULL;
+}
+
+const struct hal_bsp_mem_dump *
+hal_bsp_core_dump(int *area_cnt)
+{
+#if MYNEWT_VAL(COREDUMP_SKIP_UNUSED_HEAP)
+    /* Interrupt stack first */
+    dump_cfg[0].hbmd_start = &__StackLimit;
+    dump_cfg[0].hbmd_size = &__StackTop - &__StackLimit;
+    /* RAM from _ram_start to end of used heap */
+    dump_cfg[1].hbmd_start = &_ram_start;
+    dump_cfg[1].hbmd_size = (uint8_t *)_sbrk(0) - &_ram_start;
+#endif
+
+    *area_cnt = sizeof(dump_cfg) / sizeof(dump_cfg[0]);
+    return dump_cfg;
+}
+
+int
+hal_bsp_power_state(int state)
+{
+    return 0;
+}
+
+void
+hal_bsp_init(void)
+{
+    /* Make sure system clocks have started */
+    hal_system_clock_start();
+
+    /* Create all available nRF5340 Net Core peripherals */
+    nrf5340_net_periph_create();
+}
+
+void
+hal_bsp_deinit(void)
+{
+    Cortex_DisableAll();
+}
diff --git a/hw/bsp/ublox_mini_nora_b1/net/syscfg.yml 
b/hw/bsp/ublox_mini_nora_b1/net/syscfg.yml
new file mode 100644
index 000000000..5974aa61c
--- /dev/null
+++ b/hw/bsp/ublox_mini_nora_b1/net/syscfg.yml
@@ -0,0 +1,91 @@
+# Licensed to the Apache Software Foundation (ASF) under one
+# or more contributor license agreements.  See the NOTICE file
+# distributed with this work for additional information
+# regarding copyright ownership.  The ASF licenses this file
+# to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance
+# with the License.  You may obtain a copy of the License at
+#
+#  http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+# KIND, either express or implied.  See the License for the
+# specific language governing permissions and limitations
+# under the License.
+#
+
+syscfg.defs:
+    BLE_TRANSPORT_NETCORE: 1
+
+    BSP_NRF5340_NET:
+        description: 'Set to indicate that BSP has NRF5340 NET'
+        value: 1
+
+    COREDUMP_SKIP_UNUSED_HEAP:
+        description: >
+            Store whole RAM in crash dump.
+            When 1 only part of heap that was used will be dumped, that
+            can reduce size of crash dump.
+        value: 0
+
+syscfg.vals:
+    MCU_DEFAULT_STARTUP: 0
+    CORTEX_DEFAULT_STARTUP: 1
+
+    # Set default pins for peripherals
+    # UART0 routed to CP2105 enhanced interface port (up to 2 Mbs)
+    UART_0_PIN_TX: CP2105_ECI_RXD
+    UART_0_PIN_RX: CP2105_ECI_TXD
+    UART_0_PIN_RTS: CP2105_ECI_CTS
+    UART_0_PIN_CTS: CP2105_ECI_RTS
+
+    # UART1 routed to CP2105 standard interface port (up to 926100 bsp)
+    UART_1_PIN_TX: CP2105_SCI_RXD
+    UART_1_PIN_RX: CP2105_SCI_TXD
+    UART_1_PIN_RTS: CP2105_SCI_CTS
+    UART_1_PIN_CTS: CP2105_SCI_RTS
+
+    SPI_0_MASTER_PIN_SCK: 8
+    SPI_0_MASTER_PIN_MOSI: 9
+    SPI_0_MASTER_PIN_MISO: 10
+    SPI_0_SLAVE_PIN_SCK: 8
+    SPI_0_SLAVE_PIN_MOSI: 9
+    SPI_0_SLAVE_PIN_MISO: 10
+    SPI_0_SLAVE_PIN_SS: 11
+
+    I2C_0_PIN_SCL: 34
+    I2C_0_PIN_SDA: 35
+
+    CONFIG_FCB_FLASH_AREA: FLASH_AREA_NFFS
+    REBOOT_LOG_FLASH_AREA: FLASH_AREA_REBOOT_LOG
+    NFFS_FLASH_AREA: FLASH_AREA_NFFS
+    COREDUMP_FLASH_AREA: FLASH_AREA_COREDUMP
+    #Net Core DCDC is enabled from application core
+    #MCU_DCDC_ENABLED: 1
+    MCU_LFCLK_SOURCE: LFXO
+    FLASH_MAP_SYSINIT_STAGE: 15
+
+    # Always use non-blocking API
+    SPI_HAL_USE_NOBLOCK: 1
+
+    # nRF5340 Network Core doesn't have floating point unit
+    HARDFLOAT: 0
+
+    # Flasher parameters
+    MYNEWT_DOWNLOADER: nrfjprog
+    JLINK_TARGET: NRF5340_XXAA_NET
+    NRFJPROG_COPROCESSOR: CP_NETWORK
+    MYNEWT_DOWNLOADER_MFG_IMAGE_FLASH_OFFSET: 0x0
+
+syscfg.vals.BLE_CONTROLLER:
+    TIMER_0: 0
+    TIMER_3: 1
+    OS_CPUTIME_FREQ: 32768
+    OS_CPUTIME_TIMER_NUM: 3
+    BLE_LL_RFMGMT_ENABLE_TIME: 1500
+    BLE_LL_CFG_FEAT_CTRL_TO_HOST_FLOW_CONTROL: 1
+
+syscfg.vals.BLE_TRANSPORT:
+    BLE_TRANSPORT_HS: nrf5340
diff --git a/hw/bsp/ublox_mini_nora_b1/pkg.yml 
b/hw/bsp/ublox_mini_nora_b1/pkg.yml
new file mode 100644
index 000000000..4fa4ff7ed
--- /dev/null
+++ b/hw/bsp/ublox_mini_nora_b1/pkg.yml
@@ -0,0 +1,46 @@
+#
+# Licensed to the Apache Software Foundation (ASF) under one
+# or more contributor license agreements.  See the NOTICE file
+# distributed with this work for additional information
+# regarding copyright ownership.  The ASF licenses this file
+# to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance
+# with the License.  You may obtain a copy of the License at
+#
+#  http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+# KIND, either express or implied.  See the License for the
+# specific language governing permissions and limitations
+# under the License.
+#
+
+pkg.name: hw/bsp/ublox_mini_nora_b1
+pkg.type: bsp
+pkg.description: BSP definition for the Mini Nora B1
+pkg.author: "Apache Mynewt <[email protected]>"
+pkg.homepage: "http://mynewt.apache.org/";
+pkg.keywords:
+    - nrf5340
+    - nordic
+    - ublox
+
+pkg.cflags:
+    - '-DNRF5340_XXAA_APPLICATION'
+
+pkg.cflags.HARDFLOAT:
+    - -mfloat-abi=hard -mfpu=fpv4-sp-d16
+
+pkg.deps:
+    - "@apache-mynewt-core/hw/scripts"
+    - "@apache-mynewt-core/hw/mcu/nordic/nrf5340"
+    - "@apache-mynewt-core/libc"
+    - "@apache-mynewt-core/sys/flash_map"
+
+pkg.deps.BSP_NRF5340_NET_FLASH_ENABLE:
+    - "@apache-mynewt-core/hw/drivers/flash/ipc_nrf5340_flash"
+
+pkg.deps.SOFT_PWM:
+    - "@apache-mynewt-core/hw/drivers/pwm/soft_pwm"
diff --git a/hw/bsp/ublox_mini_nora_b1/src/hal_bsp.c 
b/hw/bsp/ublox_mini_nora_b1/src/hal_bsp.c
new file mode 100644
index 000000000..00670827b
--- /dev/null
+++ b/hw/bsp/ublox_mini_nora_b1/src/hal_bsp.c
@@ -0,0 +1,110 @@
+/*
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements.  See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership.  The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License.  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied.  See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
+
+#include <stdint.h>
+#include <stddef.h>
+#include <assert.h>
+#include <os/mynewt.h>
+#include "mynewt_cm.h"
+#include <nrfx.h>
+#include <flash_map/flash_map.h>
+#include <hal/hal_bsp.h>
+#include <hal/hal_flash.h>
+#include <hal/hal_system.h>
+#include <mcu/nrf5340_hal.h>
+#include <mcu/nrf5340_periph.h>
+#include <bsp/bsp.h>
+
+/*
+ * What memory to include in coredump.
+ */
+#if !MYNEWT_VAL(COREDUMP_SKIP_UNUSED_HEAP)
+static const struct hal_bsp_mem_dump dump_cfg[] = {
+    [0] = {
+        .hbmd_start = &_ram_start,
+        .hbmd_size = RAM_SIZE
+    }
+};
+#else
+static struct hal_bsp_mem_dump dump_cfg[2];
+extern uint8_t __StackLimit;
+extern uint8_t __StackTop;
+#endif
+
+const struct hal_flash *
+hal_bsp_flash_dev(uint8_t id)
+{
+    /*
+     * Internal flash mapped to id 0.
+     */
+    if (id == 0) {
+        return &nrf_flash_dev;
+    }
+#if MYNEWT_VAL(QSPI_ENABLE)
+    if (id == 1) {
+        return &nrf_qspi_dev;
+    }
+#endif
+#if MYNEWT_VAL(IPC_NRF5340_FLASH_CLIENT)
+    _Static_assert(2 < MYNEWT_VAL(HAL_FLASH_MAX_DEVICE_COUNT) || 
MYNEWT_VAL(QSPI_ENABLE),
+                   "HAL_FLASH_MAX_DEVICE_COUNT must be set to 3 when 
QSPI_ENABLE is 0");
+    if (id == 2) {
+        return ipc_flash();
+    }
+#endif
+    return NULL;
+}
+
+const struct hal_bsp_mem_dump *
+hal_bsp_core_dump(int *area_cnt)
+{
+#if MYNEWT_VAL(COREDUMP_SKIP_UNUSED_HEAP)
+    /* Interrupt stack first */
+    dump_cfg[0].hbmd_start = &__StackLimit;
+    dump_cfg[0].hbmd_size = &__StackTop - &__StackLimit;
+    /* RAM from _ram_start to end of used heap */
+    dump_cfg[1].hbmd_start = &_ram_start;
+    dump_cfg[1].hbmd_size = (uint8_t *)_sbrk(0) - &_ram_start;
+#endif
+
+    *area_cnt = sizeof(dump_cfg) / sizeof(dump_cfg[0]);
+    return dump_cfg;
+}
+
+int
+hal_bsp_power_state(int state)
+{
+    return 0;
+}
+
+void
+hal_bsp_init(void)
+{
+    /* Make sure system clocks have started */
+    hal_system_clock_start();
+
+    /* Create all available nRF5340 peripherals */
+    nrf5340_periph_create();
+}
+
+void
+hal_bsp_deinit(void)
+{
+    Cortex_DisableAll();
+}
diff --git a/hw/bsp/ublox_mini_nora_b1/syscfg.yml 
b/hw/bsp/ublox_mini_nora_b1/syscfg.yml
new file mode 100644
index 000000000..894e5e069
--- /dev/null
+++ b/hw/bsp/ublox_mini_nora_b1/syscfg.yml
@@ -0,0 +1,137 @@
+# Licensed to the Apache Software Foundation (ASF) under one
+# or more contributor license agreements.  See the NOTICE file
+# distributed with this work for additional information
+# regarding copyright ownership.  The ASF licenses this file
+# to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance
+# with the License.  You may obtain a copy of the License at
+#
+#  http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+# KIND, either express or implied.  See the License for the
+# specific language governing permissions and limitations
+# under the License.
+#
+
+syscfg.defs:
+    BSP_NRF5340:
+        description: 'Set to indicate that BSP has NRF5340'
+        value: 1
+
+    SOFT_PWM:
+        description: 'Enable soft PWM'
+        value: 0
+
+    BSP_NRF5340_NET_ENABLE:
+       description: >
+            When enabled Network Core of nRF5340 is started on init.
+       value: 0
+
+    BSP_NRF5340_NET_FLASH_ENABLE:
+        description: >
+            When enabled Application core can use Network core flash
+            with ipc flash driver.
+        value: 0
+
+    COREDUMP_SKIP_UNUSED_HEAP:
+        description: >
+            Store whole RAM in crash dump.
+            When 1 only part of heap that was used will be dumped, that
+            can reduce size of crash dump.
+        value: 0
+
+syscfg.vals:
+    MCU_DEFAULT_STARTUP: 0
+    CORTEX_DEFAULT_STARTUP: 1
+
+    # Set default pins for peripherals
+    # UART0 routed to CP2105 enhanced interface port (up to 2 Mbs)
+    # Note that CP2015 line names RX-TX RTS-CTS are crossed
+    UART_0_PIN_TX: CP2105_ECI_RXD
+    UART_0_PIN_RX: CP2105_ECI_TXD
+    UART_0_PIN_RTS: CP2105_ECI_CTS
+    UART_0_PIN_CTS: CP2105_ECI_RTS
+
+    # UART1 routed to CP2105 standard interface port (up to 926100 bsp)
+    UART_1_PIN_TX: CP2105_SCI_RXD
+    UART_1_PIN_RX: CP2105_SCI_TXD
+    UART_1_PIN_RTS: CP2105_SCI_CTS
+    UART_1_PIN_CTS: CP2105_SCI_RTS
+
+    SPI_0_MASTER_PIN_SCK: 8
+    SPI_0_MASTER_PIN_MOSI: 9
+    SPI_0_MASTER_PIN_MISO: 10
+    SPI_0_SLAVE_PIN_SCK: 8
+    SPI_0_SLAVE_PIN_MOSI: 9
+    SPI_0_SLAVE_PIN_MISO: 10
+    SPI_0_SLAVE_PIN_SS: 11
+
+    I2C_0_PIN_SCL: 34
+    I2C_0_PIN_SDA: 35
+
+    CONFIG_FCB_FLASH_AREA: FLASH_AREA_NFFS
+    REBOOT_LOG_FLASH_AREA: FLASH_AREA_REBOOT_LOG
+    NFFS_FLASH_AREA: FLASH_AREA_NFFS
+    COREDUMP_FLASH_AREA: FLASH_AREA_IMAGE_1
+    MCU_DCDC_ENABLED: 1
+
+    # Always use non-blocking API
+    SPI_HAL_USE_NOBLOCK: 1
+
+    QSPI_FLASH_SECTOR_SIZE: 4096
+    QSPI_FLASH_SECTOR_COUNT: 2048
+    QSPI_PIN_CS: 18
+    QSPI_PIN_SCK: 17
+    QSPI_PIN_DIO0: 13
+    QSPI_PIN_DIO1: 14
+    QSPI_PIN_DIO2: 15
+    QSPI_PIN_DIO3: 16
+    # QUAD IO Read (opcode EBh)
+    QSPI_READOC: 4
+    # QUAD IO Page program (opcode 38h)
+    QSPI_WRITEOC: 3
+
+    # Set 192M to 192MHz
+    MCU_HFCLCK192_DIV: 1
+    # Set QSPI clock divider to (6 = (2 * (QSPI_SCK_FREQ + 1)) resulting in 
32MHz QSPI clock
+    QSPI_SCK_FREQ: 2
+
+    QSPI_XIP_OFFSET: 0x10000000
+    FLASH_MAP_SYSINIT_STAGE: 15
+
+    # Flasher parameters
+    MYNEWT_DOWNLOADER: nrfjprog
+    JLINK_TARGET: NRF5340_XXAA_APP
+    MYNEWT_DOWNLOADER_MFG_IMAGE_FLASH_OFFSET: 0x0
+
+    NET_CORE_IMAGE_TARGET_NAME: 
"@apache-mynewt-nimble/targets/nordic_pca10121_net-blehci"
+
+syscfg.vals.!BOOT_LOADER:
+    MCU_LFCLK_SOURCE: LFXO
+    MCU_LFCLK_XO_INTCAP: c9pf
+    MCU_HFXO_INTCAP: 8
+
+syscfg.vals.BLE_HOST:
+    BLE_HS_FLOW_CTRL: 1
+
+syscfg.vals.BLE_TRANSPORT:
+    BLE_TRANSPORT_LL: nrf5340
+
+syscfg.vals.BSP_NRF5340_NET_ENABLE:
+    BSP_NRF5340_NET_FLASH_ENABLE: 1
+    BLE_HCI_VS: 1
+
+syscfg.vals.BSP_NRF5340_NET_FLASH_ENABLE:
+    IPC_NRF5340_CHANNELS: 4
+
+syscfg.vals.IPC_NRF5340_FLASH_CLIENT:
+    HAL_FLASH_MAX_DEVICE_COUNT: 3
+
+syscfg.restrictions.BSP_NRF5340_NET_FLASH_ENABLE:
+    - 'IPC_NRF5340_CHANNELS >= 4'
+
+syscfg.restrictions:
+    - '!BSP_NRF5340_NET_FLASH_ENABLE || BSP_NRF5340_NET_ENABLE'

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