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The following commit(s) were added to refs/heads/master by this push:
new 02fe7c77d stm32/hal_uart: Enable FIFO if present
02fe7c77d is described below
commit 02fe7c77da1cae7ad37f88d1e32cca425b6fa6b8
Author: Jerzy Kasenberg <[email protected]>
AuthorDate: Wed May 14 09:39:31 2025 +0200
stm32/hal_uart: Enable FIFO if present
More recent STM32 devices have FIFO that
can help to use higher baudrate speeds without
DMA (which is not used in hal_uart).
This enables FIFO if proper bit in CR1 register
exists.
Signed-off-by: Jerzy Kasenberg <[email protected]>
---
hw/mcu/stm/stm32_common/src/hal_uart.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/mcu/stm/stm32_common/src/hal_uart.c
b/hw/mcu/stm/stm32_common/src/hal_uart.c
index 4ad515109..14e3f8f2a 100644
--- a/hw/mcu/stm/stm32_common/src/hal_uart.c
+++ b/hw/mcu/stm/stm32_common/src/hal_uart.c
@@ -481,6 +481,9 @@ hal_uart_config(int port, int32_t baudrate, uint8_t
databits, uint8_t stopbits,
cr1 &= ~(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_RE);
#if !MYNEWT_VAL(MCU_STM32F1)
cr1 &= ~(USART_CR1_OVER8);
+#endif
+#ifdef USART_CR1_FIFOEN
+ cr1 |= USART_CR1_FIFOEN;
#endif
cr2 &= ~(USART_CR2_STOP);
cr3 &= ~(USART_CR3_RTSE | USART_CR3_CTSE);
