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jerzy pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
The following commit(s) were added to refs/heads/master by this push:
new 000b73e12 hw/mcu/pic32: Fix SPI for spi_hal
000b73e12 is described below
commit 000b73e124f556508378a620ed569f6593ef91e4
Author: Jerzy Kasenberg <[email protected]>
AuthorDate: Sat Oct 4 10:22:50 2025 +0200
hw/mcu/pic32: Fix SPI for spi_hal
hal_spi structure had pins pointer that held
pin configuration. This assumed that pointer
was from constant memory and would not change
during code execution.
When bus driver spi_hal is used it passes this data
from stack that will result in random pin configuration.
Now pins are stored inside hal_spi structure making
it safe for hal and bus driver usage.
Signed-off-by: Jerzy Kasenberg <[email protected]>
---
hw/mcu/microchip/pic32mz/src/hal_spi.c | 48 +++++++++++++++-------------------
1 file changed, 21 insertions(+), 27 deletions(-)
diff --git a/hw/mcu/microchip/pic32mz/src/hal_spi.c
b/hw/mcu/microchip/pic32mz/src/hal_spi.c
index 62e5f184a..97b6b3b4b 100644
--- a/hw/mcu/microchip/pic32mz/src/hal_spi.c
+++ b/hw/mcu/microchip/pic32mz/src/hal_spi.c
@@ -59,7 +59,7 @@ struct hal_spi {
int rxcnt;
hal_spi_txrx_cb callback;
void *arg;
- const struct hal_spi_hw_settings *pins;
+ struct hal_spi_hw_settings pins;
uint32_t con;
uint32_t brg;
};
@@ -225,9 +225,9 @@ hal_spi_config_pins(int spi_num, uint8_t mode)
{
int ret = 0;
- if (hal_gpio_init_out(spis[spi_num].pins->pin_mosi, 0) ||
- hal_gpio_init_out(spis[spi_num].pins->pin_sck, 1) ||
- hal_gpio_init_in(spis[spi_num].pins->pin_miso, HAL_GPIO_PULL_NONE)) {
+ if (hal_gpio_init_out(spis[spi_num].pins.pin_mosi, 0) ||
+ hal_gpio_init_out(spis[spi_num].pins.pin_sck, 1) ||
+ hal_gpio_init_in(spis[spi_num].pins.pin_miso, HAL_GPIO_PULL_NONE)) {
return -1;
}
@@ -238,53 +238,49 @@ hal_spi_config_pins(int spi_num, uint8_t mode)
switch (mode) {
case HAL_SPI_MODE0:
case HAL_SPI_MODE1:
- hal_gpio_write(spis[spi_num].pins->pin_sck, 0);
+ hal_gpio_write(spis[spi_num].pins.pin_sck, 0);
break;
case HAL_SPI_MODE2:
case HAL_SPI_MODE3:
- hal_gpio_write(spis[spi_num].pins->pin_sck, 1);
+ hal_gpio_write(spis[spi_num].pins.pin_sck, 1);
break;
}
switch (spi_num) {
#if MYNEWT_VAL(SPI_0_MASTER)
case 0:
- ret += pps_configure_output(spis[spi_num].pins->pin_mosi,
SDO1_OUT_FUNC);
- ret += pps_configure_input(spis[spi_num].pins->pin_miso, SDI1_IN_FUNC);
+ ret += pps_configure_output(spis[spi_num].pins.pin_mosi,
SDO1_OUT_FUNC);
+ ret += pps_configure_input(spis[spi_num].pins.pin_miso, SDI1_IN_FUNC);
break;
#endif
#if MYNEWT_VAL(SPI_1_MASTER)
case 1:
- ret += pps_configure_output(spis[spi_num].pins->pin_mosi,
SDO2_OUT_FUNC);
- ret += pps_configure_input(spis[spi_num].pins->pin_miso, SDI2_IN_FUNC);
+ ret += pps_configure_output(spis[spi_num].pins.pin_mosi,
SDO2_OUT_FUNC);
+ ret += pps_configure_input(spis[spi_num].pins.pin_miso, SDI2_IN_FUNC);
break;
#endif
#if MYNEWT_VAL(SPI_2_MASTER)
case 2:
- ret += pps_configure_output(spis[spi_num].pins->pin_mosi,
SDO3_OUT_FUNC);
- ret += pps_configure_input(spis[spi_num].pins->pin_miso, SDI3_IN_FUNC);
+ ret += pps_configure_output(spis[spi_num].pins.pin_mosi,
SDO3_OUT_FUNC);
+ ret += pps_configure_input(spis[spi_num].pins.pin_miso, SDI3_IN_FUNC);
break;
#endif
#if MYNEWT_VAL(SPI_3_MASTER)
case 3:
- ret += pps_configure_output(spis[spi_num].pins->pin_mosi,
SDO4_OUT_FUNC);
- ret += pps_configure_input(spis[spi_num].pins->pin_miso, SDI4_IN_FUNC);
+ ret += pps_configure_output(spis[spi_num].pins.pin_mosi,
SDO4_OUT_FUNC);
+ ret += pps_configure_input(spis[spi_num].pins.pin_miso, SDI4_IN_FUNC);
break;
#endif
#if defined(_SPI5) && MYNEWT_VAL(SPI_4_MASTER)
case 4:
- ret += pps_configure_output(spis[spi_num].pins->pin_mosi,
- SDO5_OUT_FUNC);
- ret += pps_configure_input(spis[spi_num].pins->pin_miso,
- SDI5_IN_FUNC);
+ ret += pps_configure_output(spis[spi_num].pins.pin_mosi,
SDO5_OUT_FUNC);
+ ret += pps_configure_input(spis[spi_num].pins.pin_miso, SDI5_IN_FUNC);
break;
#endif
#if defined(_SPI6) && MYNEWT_VAL(SPI_5_MASTER)
case 5:
- ret += pps_configure_output(spis[spi_num].pins->pin_mosi,
- SDO6_OUT_FUNC);
- ret += pps_configure_input(spis[spi_num].pins->pin_miso,
- SDI6_IN_FUNC);
+ ret += pps_configure_output(spis[spi_num].pins.pin_mosi,
SDO6_OUT_FUNC);
+ ret += pps_configure_input(spis[spi_num].pins.pin_miso, SDI6_IN_FUNC);
break;
#endif
}
@@ -481,7 +477,7 @@ hal_spi_init(int spi_num, void *cfg, uint8_t spi_type)
}
spis[spi_num].slave = spi_type;
- spis[spi_num].pins = cfg;
+ spis[spi_num].pins = *(struct hal_spi_hw_settings *)cfg;
return 0;
}
@@ -495,10 +491,8 @@ hal_spi_config(int spi_num, struct hal_spi_settings
*psettings)
}
/* Configure pins */
- if (spis[spi_num].pins) {
- if (hal_spi_config_pins(spi_num, psettings->data_mode)) {
- return -1;
- }
+ if (hal_spi_config_pins(spi_num, psettings->data_mode)) {
+ return -1;
}
return hal_spi_config_master(spi_num, psettings);
