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in repository https://gitbox.apache.org/repos/asf/mynewt-core.git


The following commit(s) were added to refs/heads/master by this push:
     new 969b218e0 mcu/stm32: Fix hal_nvreg for STM32F1
969b218e0 is described below

commit 969b218e0daea2b41b64ce92ca0f50ee0f04fc04
Author: Jerzy Kasenberg <[email protected]>
AuthorDate: Sun Nov 2 00:24:26 2025 +0100

    mcu/stm32: Fix hal_nvreg for STM32F1
    
    This fixes 3 issues for hal_nvreg for STM32F1 devices.
    - STM32F1 registers are 16 bits not 32 like in other series.
    - Backup registers for ST HAL for STM32F1 start from 1 not 0.
    - PWR clock needs to be turned on if it was not before
    
    Signed-off-by: Jerzy Kasenberg <[email protected]>
---
 hw/mcu/stm/stm32_common/src/hal_nvreg.c | 23 +++++++++++++++++++++--
 1 file changed, 21 insertions(+), 2 deletions(-)

diff --git a/hw/mcu/stm/stm32_common/src/hal_nvreg.c 
b/hw/mcu/stm/stm32_common/src/hal_nvreg.c
index 82b210745..5b3cdfb5f 100644
--- a/hw/mcu/stm/stm32_common/src/hal_nvreg.c
+++ b/hw/mcu/stm/stm32_common/src/hal_nvreg.c
@@ -17,6 +17,8 @@
  * under the License.
  */
 
+#include <stdbool.h>
+#include <os/mynewt.h>
 #include <hal/hal_nvreg.h>
 #include <mcu/stm32_hal.h>
 
@@ -30,8 +32,14 @@
 #define HAL_NVREG_MAX (0)
 #endif
 
+#if MYNEWT_VAL_MCU_STM32F1
+#define HAL_NVREG_WIDTH_BYTES 2
+#define HAL_NVREG_START_INDEX 1
+#else
 /* RTC backup registers are 32-bits wide */
 #define HAL_NVREG_WIDTH_BYTES (4)
+#define HAL_NVREG_START_INDEX 0
+#endif
 
 void
 hal_nvreg_write(unsigned int reg, uint32_t val)
@@ -39,14 +47,25 @@ hal_nvreg_write(unsigned int reg, uint32_t val)
 #if PWR_ENABLED
     RTC_HandleTypeDef hrtc = { .Instance = RTC };
     if (reg < HAL_NVREG_MAX) {
+#if defined(__HAL_RCC_PWR_IS_CLK_DISABLED)
+        bool was_pwr_disabled = __HAL_RCC_PWR_IS_CLK_DISABLED();
+        if (was_pwr_disabled) {
+            __HAL_RCC_PWR_CLK_ENABLE();
+        }
+#endif
 #if defined(__HAL_RCC_BKP_CLK_ENABLE)
         __HAL_RCC_BKP_CLK_ENABLE();
 #endif
         HAL_PWR_EnableBkUpAccess();
-        HAL_RTCEx_BKUPWrite(&hrtc, reg, val);
+        HAL_RTCEx_BKUPWrite(&hrtc, reg + HAL_NVREG_START_INDEX, val);
         HAL_PWR_DisableBkUpAccess();
 #if defined(__HAL_RCC_BKP_CLK_DISABLE)
         __HAL_RCC_BKP_CLK_DISABLE();
+#endif
+#if defined(__HAL_RCC_PWR_IS_CLK_DISABLED)
+        if (was_pwr_disabled) {
+            __HAL_RCC_PWR_CLK_DISABLE();
+        }
 #endif
     }
 #endif
@@ -60,7 +79,7 @@ hal_nvreg_read(unsigned int reg)
     RTC_HandleTypeDef hrtc = { .Instance = RTC };
     if (reg < HAL_NVREG_MAX) {
         HAL_PWR_EnableBkUpAccess();
-        val = HAL_RTCEx_BKUPRead(&hrtc, reg);
+        val = HAL_RTCEx_BKUPRead(&hrtc, reg + HAL_NVREG_START_INDEX);
         HAL_PWR_DisableBkUpAccess();
     }
 #endif

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