This is an automated email from the ASF dual-hosted git repository.
acassis pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git
commit 49b3f52db1d09039e4c37d764ab78f4b009c5c03
Author: Inochi Amaoto <inochi...@outlook.com>
AuthorDate: Thu Apr 18 19:13:27 2024 +0800
arch/riscv/qemu-rv: replace M-mode init code with SBI in kernel build
The qemu-rv use a small init code for M mode in kernel build.
It is hard-coding and is difficult to change. Due to the fact,
introduce a already mature SBI implement (e.g OpenSBI) to
replace existing code is a better choice.
This patch introduce some change for qemu-rv:
1. use SSTC to provide time interrupt in kernel build
2. remove uncessary M mode trap.
For simplicity, this patch does not add support for booting
nuttx for any core, but force boot core to start core 0 and
let core 0 do the initialization.
Signed-off-by: Inochi Amaoto <inochi...@outlook.com>
---
.../risc-v/qemu-rv/boards/rv-virt/index.rst | 6 +-
arch/risc-v/src/common/riscv_internal.h | 2 +
arch/risc-v/src/common/supervisor/riscv_sbi.c | 14 +++
arch/risc-v/src/qemu-rv/CMakeLists.txt | 2 +-
arch/risc-v/src/qemu-rv/Make.defs | 1 -
arch/risc-v/src/qemu-rv/qemu_rv_exception_m.S | 105 ----------------
arch/risc-v/src/qemu-rv/qemu_rv_head.S | 8 +-
arch/risc-v/src/qemu-rv/qemu_rv_irq.c | 8 --
arch/risc-v/src/qemu-rv/qemu_rv_start.c | 119 ++++++------------
arch/risc-v/src/qemu-rv/qemu_rv_timerisr.c | 138 +--------------------
.../qemu-rv/rv-virt/configs/knetnsh64/defconfig | 9 +-
.../rv-virt/configs/knetnsh64_smp/defconfig | 9 +-
.../qemu-rv/rv-virt/configs/knsh32/defconfig | 7 +-
.../rv-virt/configs/knsh32_paging/defconfig | 7 +-
.../qemu-rv/rv-virt/configs/knsh32_romfs/defconfig | 7 +-
.../qemu-rv/rv-virt/configs/knsh64/defconfig | 9 +-
.../qemu-rv/rv-virt/configs/ksmp64/defconfig | 9 +-
.../qemu-rv/rv-virt/scripts/ld-kernel32.script | 6 +-
.../qemu-rv/rv-virt/scripts/ld-kernel64.script | 6 +-
19 files changed, 102 insertions(+), 370 deletions(-)
diff --git a/Documentation/platforms/risc-v/qemu-rv/boards/rv-virt/index.rst
b/Documentation/platforms/risc-v/qemu-rv/boards/rv-virt/index.rst
index 81bac118ab..37e7b73a23 100644
--- a/Documentation/platforms/risc-v/qemu-rv/boards/rv-virt/index.rst
+++ b/Documentation/platforms/risc-v/qemu-rv/boards/rv-virt/index.rst
@@ -65,6 +65,8 @@ And, for 64-bit configurations::
$ qemu-system-riscv64 -semihosting -M virt,aclint=on -cpu rv64 -smp 8
-bios none -kernel nuttx -nographic
+If testing with kernel build, remove the ``-bios none`` option. Kernel build
+requires SBI to function properly.
citest
------
@@ -135,7 +137,7 @@ To run it with QEMU, use the following command::
-device virtio-net-device,netdev=u1,bus=virtio-mmio-bus.2 \
-drive file=./mydisk-1gb.img,if=none,format=raw,id=hd \
-device virtio-blk-device,bus=virtio-mmio-bus.3,drive=hd \
- -bios none -kernel ./nuttx/nuttx -nographic
+ -kernel ./nuttx/nuttx -nographic
knetnsh64_smp
-------------
@@ -198,7 +200,7 @@ A ROMFS image is generated and linked to the kernel. This
requires re-running ``
To run it, use the following command::
- $ qemu-system-riscv32 -M virt,aclint=on -cpu rv32 -smp 8 -bios none
-kernel nuttx -nographic
+ $ qemu-system-riscv32 -M virt,aclint=on -cpu rv32 -smp 8 -kernel nuttx
-nographic
In `nsh`, applications can be run from the `/system/bin` directory::
diff --git a/arch/risc-v/src/common/riscv_internal.h
b/arch/risc-v/src/common/riscv_internal.h
index 1de198d113..9bf3725e67 100644
--- a/arch/risc-v/src/common/riscv_internal.h
+++ b/arch/risc-v/src/common/riscv_internal.h
@@ -314,6 +314,8 @@ static inline void riscv_set_basestack(uintptr_t base,
uintptr_t size)
#ifdef CONFIG_ARCH_USE_S_MODE
void riscv_sbi_set_timer(uint64_t stime_value);
uint64_t riscv_sbi_get_time(void);
+uintptr_t riscv_sbi_boot_secondary(uint32_t hartid, uintptr_t addr,
+ uintptr_t a1);
#endif
/* Power management *********************************************************/
diff --git a/arch/risc-v/src/common/supervisor/riscv_sbi.c
b/arch/risc-v/src/common/supervisor/riscv_sbi.c
index 0c0dbf0000..75f8c34fe5 100644
--- a/arch/risc-v/src/common/supervisor/riscv_sbi.c
+++ b/arch/risc-v/src/common/supervisor/riscv_sbi.c
@@ -24,12 +24,17 @@
/* SBI Extension IDs */
+#define SBI_EXT_HSM 0x48534D
#define SBI_EXT_TIME 0x54494D45
/* SBI function IDs for TIME extension */
#define SBI_EXT_TIME_SET_TIMER 0x0
+/* SBI function IDs for HSM extension */
+
+#define SBI_EXT_HSM_HART_START 0x0
+
/****************************************************************************
* Included Files
****************************************************************************/
@@ -139,3 +144,12 @@ uint64_t riscv_sbi_get_time(void)
#endif
#endif
}
+
+#ifndef CONFIG_NUTTSBI
+uintptr_t riscv_sbi_boot_secondary(uint32_t hartid, uintptr_t addr,
+ uintptr_t a1)
+{
+ return sbi_ecall(SBI_EXT_HSM, SBI_EXT_HSM_HART_START,
+ hartid, addr, a1, 0, 0, 0);
+}
+#endif /* CONFIG_NUTTSBI */
diff --git a/arch/risc-v/src/qemu-rv/CMakeLists.txt
b/arch/risc-v/src/qemu-rv/CMakeLists.txt
index b9c14e6413..0c8219a62b 100644
--- a/arch/risc-v/src/qemu-rv/CMakeLists.txt
+++ b/arch/risc-v/src/qemu-rv/CMakeLists.txt
@@ -30,7 +30,7 @@ list(
qemu_rv_allocateheap.c)
if(CONFIG_BUILD_KERNEL)
- list(APPEND SRCS qemu_rv_mm_init.c qemu_rv_exception_m.S)
+ list(APPEND SRCS qemu_rv_mm_init.c)
endif()
if(CONFIG_MM_PGALLOC)
diff --git a/arch/risc-v/src/qemu-rv/Make.defs
b/arch/risc-v/src/qemu-rv/Make.defs
index 3c5982a8b0..3033111cc3 100644
--- a/arch/risc-v/src/qemu-rv/Make.defs
+++ b/arch/risc-v/src/qemu-rv/Make.defs
@@ -30,7 +30,6 @@ CHIP_CSRCS += qemu_rv_timerisr.c qemu_rv_allocateheap.c
ifeq ($(CONFIG_BUILD_KERNEL),y)
CHIP_CSRCS += qemu_rv_mm_init.c
-CMN_ASRCS += qemu_rv_exception_m.S
endif
ifeq ($(CONFIG_MM_PGALLOC),y)
diff --git a/arch/risc-v/src/qemu-rv/qemu_rv_exception_m.S
b/arch/risc-v/src/qemu-rv/qemu_rv_exception_m.S
deleted file mode 100644
index 47a2c6b0fd..0000000000
--- a/arch/risc-v/src/qemu-rv/qemu_rv_exception_m.S
+++ /dev/null
@@ -1,105 +0,0 @@
-/****************************************************************************
- * arch/risc-v/src/qemu-rv/qemu_rv_exception_m.S
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements. See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership. The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include <nuttx/config.h>
-
-#include <arch/arch.h>
-#include <arch/irq.h>
-#include <arch/mode.h>
-
-#include <sys/types.h>
-
-#include "chip.h"
-
-#include "riscv_macros.S"
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* Provide a default section for the exeception handler. */
-
-#ifndef EXCEPTION_SECTION
-# define EXCEPTION_SECTION .text
-#endif
-
-/****************************************************************************
- * Public Symbols
- ****************************************************************************/
-
-.section .text
-.balign 8
-.global __trap_vec_m
-
-/****************************************************************************
- * Name: __trap_vec_m
- *
- * Description:
- * All M-mode exceptions and interrupts will be handled from here. If
- * kernel is in S-mode delegated exceptions and interrupts are handled.
- *
- ****************************************************************************/
-
-__trap_vec_m:
- j exception_m
-
-/****************************************************************************
- * Name: exception_m
- *
- * Description:
- * Handles interrupts for m-mode
- *
- ****************************************************************************/
-
-.section EXCEPTION_SECTION
-.global exception_m
-.align 8
-
-exception_m:
-
- /* Swap mscratch with sp */
- /* NOTE: mscratch has been set in up_mtimer_initialize() */
-
- csrrw sp, CSR_MSCRATCH, sp
-
- /* Save the context */
-
- save_ctx sp
-
- /* Handle the mtimer interrupt */
- /* NOTE: we assume exception/interrupt only happens for mtimer */
-
- jal ra, qemu_rv_mtimer_interrupt
-
- /* Restore the context */
-
- load_ctx sp
-
- /* Swap mscratch with sp */
-
- csrrw sp, CSR_MSCRATCH, sp
-
- /* Return from exception */
-
- mret
diff --git a/arch/risc-v/src/qemu-rv/qemu_rv_head.S
b/arch/risc-v/src/qemu-rv/qemu_rv_head.S
index 80f3500b4c..9be1ed225f 100644
--- a/arch/risc-v/src/qemu-rv/qemu_rv_head.S
+++ b/arch/risc-v/src/qemu-rv/qemu_rv_head.S
@@ -45,7 +45,9 @@ __start:
/* Preserve a1 as it contains the pointer to DTB */
/* Load mhartid (cpuid) */
+#ifndef CONFIG_BUILD_KERNEL
csrr a0, CSR_MHARTID
+#endif
/* Load the number of CPUs that the kernel supports */
li t1, CONFIG_SMP_NCPUS
@@ -53,7 +55,7 @@ __start:
/* If a0 (mhartid) >= t1 (the number of CPUs), stop here */
blt a0, t1, 2f
- csrw CSR_MIE, zero
+ csrw CSR_IE, zero
wfi
2:
@@ -62,10 +64,10 @@ __start:
/* Disable all interrupts (i.e. timer, external) in mie */
- csrw CSR_MIE, zero
+ csrw CSR_IE, zero
la t0, __trap_vec
- csrw CSR_MTVEC, t0
+ csrw CSR_TVEC, t0
/* Jump to qemu_rv_start */
diff --git a/arch/risc-v/src/qemu-rv/qemu_rv_irq.c
b/arch/risc-v/src/qemu-rv/qemu_rv_irq.c
index 0db0804660..202cedab44 100644
--- a/arch/risc-v/src/qemu-rv/qemu_rv_irq.c
+++ b/arch/risc-v/src/qemu-rv/qemu_rv_irq.c
@@ -161,14 +161,6 @@ void up_enable_irq(int irq)
SET_CSR(CSR_IE, IE_TIE);
}
-#ifdef CONFIG_BUILD_KERNEL
- else if (irq == RISCV_IRQ_MTIMER)
- {
- /* Read m/sstatus & set timer interrupt enable in m/sie */
-
- SET_CSR(CSR_MIE, MIE_MTIE);
- }
-#endif
else if (irq > RISCV_IRQ_EXT)
{
extirq = irq - RISCV_IRQ_EXT;
diff --git a/arch/risc-v/src/qemu-rv/qemu_rv_start.c
b/arch/risc-v/src/qemu-rv/qemu_rv_start.c
index 199be05f28..757e78d767 100644
--- a/arch/risc-v/src/qemu-rv/qemu_rv_start.c
+++ b/arch/risc-v/src/qemu-rv/qemu_rv_start.c
@@ -59,16 +59,14 @@
****************************************************************************/
#ifdef CONFIG_BUILD_KERNEL
-extern void __trap_vec(void);
-extern void __trap_vec_m(void);
-extern void up_mtimer_initialize(void);
+extern void __start(void);
#endif
/****************************************************************************
* Name: qemu_rv_clear_bss
****************************************************************************/
-void qemu_rv_clear_bss(void)
+static void qemu_rv_clear_bss(void)
{
uint32_t *dest;
@@ -82,6 +80,31 @@ void qemu_rv_clear_bss(void)
}
}
+#ifdef CONFIG_BUILD_KERNEL
+static void qemu_boot_secondary(int mhartid, uintptr_t dtb)
+{
+ int i;
+
+ for (i = 0; i < CONFIG_SMP_NCPUS; i++)
+ {
+ if (i == mhartid)
+ {
+ continue;
+ }
+
+ riscv_sbi_boot_secondary(i, (uintptr_t)&__start, dtb);
+ }
+}
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+#ifdef CONFIG_BUILD_KERNEL
+static bool boot_secondary = false;
+#endif
+
/****************************************************************************
* Public Data
****************************************************************************/
@@ -101,12 +124,18 @@ uintptr_t g_idle_topstack = QEMU_RV_IDLESTACK_BASE +
* Name: qemu_rv_start
****************************************************************************/
-#ifdef CONFIG_BUILD_KERNEL
-void qemu_rv_start_s(int mhartid, const char *dtb)
-#else
void qemu_rv_start(int mhartid, const char *dtb)
-#endif
{
+#ifdef CONFIG_BUILD_KERNEL
+ /* Boot other cores */
+
+ if (!boot_secondary)
+ {
+ boot_secondary = true;
+ qemu_boot_secondary(mhartid, (uintptr_t)dtb);
+ }
+#endif
+
/* Configure FPU */
riscv_fpuconfig();
@@ -116,7 +145,6 @@ void qemu_rv_start(int mhartid, const char *dtb)
goto cpux;
}
-#ifndef CONFIG_BUILD_KERNEL
qemu_rv_clear_bss();
riscv_set_basestack(QEMU_RV_IDLESTACK_BASE, SMP_STACK_SIZE);
@@ -125,8 +153,6 @@ void qemu_rv_start(int mhartid, const char *dtb)
riscv_percpu_add_hart(mhartid);
#endif
-#endif
-
#ifdef CONFIG_DEVICE_TREE
fdt_register(dtb);
#endif
@@ -165,77 +191,6 @@ cpux:
}
}
-#ifdef CONFIG_BUILD_KERNEL
-
-/****************************************************************************
- * Name: qemu_rv_start
- ****************************************************************************/
-
-void qemu_rv_start(int mhartid, const char *dtb)
-{
- /* NOTE: still in M-mode */
-
- if (0 == mhartid)
- {
- qemu_rv_clear_bss();
-
- /* Initialize the per CPU areas */
-
- riscv_percpu_add_hart(mhartid);
- }
-
- /* Disable MMU and enable PMP */
-
- WRITE_CSR(CSR_SATP, 0x0);
- WRITE_CSR(CSR_PMPADDR0, 0x3fffffffffffffull);
- WRITE_CSR(CSR_PMPCFG0, 0xf);
-
- /* Set exception and interrupt delegation for S-mode */
-
- WRITE_CSR(CSR_MEDELEG, 0xffff);
- WRITE_CSR(CSR_MIDELEG, 0xffff);
-
- /* Allow to write satp from S-mode */
-
- CLEAR_CSR(CSR_MSTATUS, MSTATUS_TVM);
-
- /* Set mstatus to S-mode */
-
- CLEAR_CSR(CSR_MSTATUS, MSTATUS_MPP_MASK);
- SET_CSR(CSR_MSTATUS, MSTATUS_MPPS);
-
- /* Set the trap vector for S-mode */
-
- WRITE_CSR(CSR_STVEC, (uintptr_t)__trap_vec);
-
- /* Set the trap vector for M-mode */
-
- WRITE_CSR(CSR_MTVEC, (uintptr_t)__trap_vec_m);
-
- if (0 == mhartid)
- {
- /* Only the primary CPU needs to initialize mtimer
- * before entering to S-mode
- */
-
- up_mtimer_initialize();
- }
-
- /* Set mepc to the entry */
-
- WRITE_CSR(CSR_MEPC, (uintptr_t)qemu_rv_start_s);
-
- /* Set a0 to mhartid and a1 to dtb explicitly and enter to S-mode */
-
- asm volatile (
- "mv a0, %0 \n"
- "mv a1, %1 \n"
- "mret \n"
- :: "r" (mhartid), "r" (dtb)
- );
-}
-#endif
-
void riscv_earlyserialinit(void)
{
u16550_earlyserialinit();
diff --git a/arch/risc-v/src/qemu-rv/qemu_rv_timerisr.c
b/arch/risc-v/src/qemu-rv/qemu_rv_timerisr.c
index 1527fbdfb3..ad6769f5a6 100644
--- a/arch/risc-v/src/qemu-rv/qemu_rv_timerisr.c
+++ b/arch/risc-v/src/qemu-rv/qemu_rv_timerisr.c
@@ -49,75 +49,6 @@
#define MTIMER_FREQ 10000000
#define TICK_COUNT (10000000 / TICK_PER_SEC)
-#ifdef CONFIG_BUILD_KERNEL
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-static uint32_t g_mtimer_cnt = 0;
-static uint32_t g_stimer_pending = false;
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: qemu_rv_ssoft_interrupt
- *
- * Description:
- * This function is S-mode software interrupt handler to proceed
- * the OS timer
- *
- ****************************************************************************/
-
-static int qemu_rv_ssoft_interrupt(int irq, void *context, void *arg)
-{
- /* Cleaer Supervisor Software Interrupt */
-
- CLEAR_CSR(CSR_SIP, SIP_SSIP);
-
- if (g_stimer_pending)
- {
- g_stimer_pending = false;
-
- /* Proceed the OS timer */
-
- nxsched_process_timer();
- }
-#ifdef CONFIG_SMP
- else
- {
- /* We assume IPI has been issued */
-
- riscv_pause_handler(irq, context, arg);
- }
-#endif
-
- return 0;
-}
-
-/****************************************************************************
- * Name: qemu_rv_reload_mtimecmp
- *
- * Description:
- * This function is called during start-up to initialize mtimecmp
- * for CONFIG_BUILD_KERNEL=y
- *
- ****************************************************************************/
-
-static void qemu_rv_reload_mtimecmp(void)
-{
- uint64_t current;
- uint64_t next;
-
- current = READ_CSR(CSR_TIME);
- next = current + TICK_COUNT;
- putreg64(next, QEMU_RV_CLINT_MTIMECMP);
-}
-
-#endif /* CONFIG_BUILD_KERNEL */
-
/****************************************************************************
* Public Functions
****************************************************************************/
@@ -133,78 +64,11 @@ static void qemu_rv_reload_mtimecmp(void)
void up_timer_initialize(void)
{
-#ifndef CONFIG_BUILD_KERNEL
struct oneshot_lowerhalf_s *lower = riscv_mtimer_initialize(
QEMU_RV_CLINT_MTIME, QEMU_RV_CLINT_MTIMECMP,
- RISCV_IRQ_MTIMER, MTIMER_FREQ);
+ RISCV_IRQ_TIMER, MTIMER_FREQ);
DEBUGASSERT(lower);
up_alarm_set_lowerhalf(lower);
-#else
- /* NOTE: This function is called in S-mode */
-
- irq_attach(RISCV_IRQ_SSOFT, qemu_rv_ssoft_interrupt, NULL);
- up_enable_irq(RISCV_IRQ_SSOFT);
-#endif
-}
-
-#ifdef CONFIG_BUILD_KERNEL
-
-/****************************************************************************
- * Name: up_mtimer_initialize
- *
- * Description:
- * This function is called during start-up to initialize the M-mode timer
- *
- ****************************************************************************/
-
-void up_mtimer_initialize(void)
-{
- uintptr_t irqstacktop = riscv_percpu_get_irqstack();
-
- /* Set the irq stack base to mscratch */
-
- WRITE_CSR(CSR_MSCRATCH,
- irqstacktop - STACK_ALIGN_DOWN(CONFIG_ARCH_INTERRUPTSTACK));
-
- /* NOTE: we do not attach a handler for mtimer,
- * because it is handled in the exception_m directly
- */
-
- up_enable_irq(RISCV_IRQ_MTIMER);
- qemu_rv_reload_mtimecmp();
-}
-
-/****************************************************************************
- * Name: qemu_rv_mtimer_interrupt
- *
- * Description:
- * In RISC-V with S-mode, M-mode timer must be handled in M-mode
- * This function is called from exception_m in M-mode directly
- *
- ****************************************************************************/
-
-void qemu_rv_mtimer_interrupt(void)
-{
- uint64_t current;
- uint64_t next;
-
- /* Update mtimercmp */
-
- current = getreg64(QEMU_RV_CLINT_MTIMECMP);
- next = current + TICK_COUNT;
- putreg64(next, QEMU_RV_CLINT_MTIMECMP);
-
- g_mtimer_cnt++;
- g_stimer_pending = true;
-
- if (OSINIT_HW_READY())
- {
- /* Post Supervisor Software Interrupt */
-
- SET_CSR(CSR_SIP, SIP_SSIP);
- }
}
-
-#endif /* CONFIG_BUILD_KERNEL */
diff --git a/boards/risc-v/qemu-rv/rv-virt/configs/knetnsh64/defconfig
b/boards/risc-v/qemu-rv/rv-virt/configs/knetnsh64/defconfig
index 0b082d276e..99915a5889 100644
--- a/boards/risc-v/qemu-rv/rv-virt/configs/knetnsh64/defconfig
+++ b/boards/risc-v/qemu-rv/rv-virt/configs/knetnsh64/defconfig
@@ -32,10 +32,11 @@ CONFIG_ARCH_HEAP_VBASE=0xC0200000
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_KERNEL_STACKSIZE=3072
CONFIG_ARCH_PGPOOL_MAPPING=y
-CONFIG_ARCH_PGPOOL_PBASE=0x80400000
+CONFIG_ARCH_PGPOOL_PBASE=0x80600000
CONFIG_ARCH_PGPOOL_SIZE=4194304
-CONFIG_ARCH_PGPOOL_VBASE=0x80400000
+CONFIG_ARCH_PGPOOL_VBASE=0x80600000
CONFIG_ARCH_RISCV=y
+CONFIG_ARCH_RV_EXT_SSTC=y
CONFIG_ARCH_SETJMP_H=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH_TEXT_NPAGES=128
@@ -116,8 +117,8 @@ CONFIG_NSH_FILE_APPS=y
CONFIG_NSH_READLINE=y
CONFIG_PATH_INITIAL="/system/bin"
CONFIG_RAM_SIZE=2097152
-CONFIG_RAM_START=0x80200000
-CONFIG_RAM_VSTART=0x80200000
+CONFIG_RAM_START=0x80400000
+CONFIG_RAM_VSTART=0x80400000
CONFIG_READLINE_CMD_HISTORY=y
CONFIG_RISCV_SEMIHOSTING_HOSTFS=y
CONFIG_RR_INTERVAL=200
diff --git a/boards/risc-v/qemu-rv/rv-virt/configs/knetnsh64_smp/defconfig
b/boards/risc-v/qemu-rv/rv-virt/configs/knetnsh64_smp/defconfig
index 3cad0d6da9..b77ee69fc3 100644
--- a/boards/risc-v/qemu-rv/rv-virt/configs/knetnsh64_smp/defconfig
+++ b/boards/risc-v/qemu-rv/rv-virt/configs/knetnsh64_smp/defconfig
@@ -32,10 +32,11 @@ CONFIG_ARCH_HEAP_VBASE=0xC0200000
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_KERNEL_STACKSIZE=3072
CONFIG_ARCH_PGPOOL_MAPPING=y
-CONFIG_ARCH_PGPOOL_PBASE=0x80400000
+CONFIG_ARCH_PGPOOL_PBASE=0x80600000
CONFIG_ARCH_PGPOOL_SIZE=4194304
-CONFIG_ARCH_PGPOOL_VBASE=0x80400000
+CONFIG_ARCH_PGPOOL_VBASE=0x80600000
CONFIG_ARCH_RISCV=y
+CONFIG_ARCH_RV_EXT_SSTC=y
CONFIG_ARCH_SETJMP_H=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH_TEXT_NPAGES=128
@@ -119,8 +120,8 @@ CONFIG_NSH_FILE_APPS=y
CONFIG_NSH_READLINE=y
CONFIG_PATH_INITIAL="/system/bin"
CONFIG_RAM_SIZE=2097152
-CONFIG_RAM_START=0x80200000
-CONFIG_RAM_VSTART=0x80200000
+CONFIG_RAM_START=0x80400000
+CONFIG_RAM_VSTART=0x80400000
CONFIG_READLINE_CMD_HISTORY=y
CONFIG_RISCV_SEMIHOSTING_HOSTFS=y
CONFIG_RR_INTERVAL=200
diff --git a/boards/risc-v/qemu-rv/rv-virt/configs/knsh32/defconfig
b/boards/risc-v/qemu-rv/rv-virt/configs/knsh32/defconfig
index 22406ef884..395f941060 100644
--- a/boards/risc-v/qemu-rv/rv-virt/configs/knsh32/defconfig
+++ b/boards/risc-v/qemu-rv/rv-virt/configs/knsh32/defconfig
@@ -31,10 +31,11 @@ CONFIG_ARCH_HEAP_VBASE=0xC0800000
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_KERNEL_STACKSIZE=3072
CONFIG_ARCH_PGPOOL_MAPPING=y
-CONFIG_ARCH_PGPOOL_PBASE=0x80800000
+CONFIG_ARCH_PGPOOL_PBASE=0x80a00000
CONFIG_ARCH_PGPOOL_SIZE=4194304
-CONFIG_ARCH_PGPOOL_VBASE=0x80800000
+CONFIG_ARCH_PGPOOL_VBASE=0x80a00000
CONFIG_ARCH_RISCV=y
+CONFIG_ARCH_RV_EXT_SSTC=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH_TEXT_NPAGES=128
CONFIG_ARCH_TEXT_VBASE=0xC0000000
@@ -75,7 +76,7 @@ CONFIG_NSH_FILE_APPS=y
CONFIG_NSH_READLINE=y
CONFIG_PATH_INITIAL="/system/bin"
CONFIG_RAM_SIZE=4194304
-CONFIG_RAM_START=0x80400000
+CONFIG_RAM_START=0x80600000
CONFIG_READLINE_CMD_HISTORY=y
CONFIG_RISCV_SEMIHOSTING_HOSTFS=y
CONFIG_RR_INTERVAL=200
diff --git a/boards/risc-v/qemu-rv/rv-virt/configs/knsh32_paging/defconfig
b/boards/risc-v/qemu-rv/rv-virt/configs/knsh32_paging/defconfig
index 3c809f0c05..83d0b07e31 100644
--- a/boards/risc-v/qemu-rv/rv-virt/configs/knsh32_paging/defconfig
+++ b/boards/risc-v/qemu-rv/rv-virt/configs/knsh32_paging/defconfig
@@ -33,10 +33,11 @@ CONFIG_ARCH_HEAP_VBASE=0xC0800000
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_KERNEL_STACKSIZE=3072
CONFIG_ARCH_PGPOOL_MAPPING=y
-CONFIG_ARCH_PGPOOL_PBASE=0x80800000
+CONFIG_ARCH_PGPOOL_PBASE=0x80a00000
CONFIG_ARCH_PGPOOL_SIZE=4194304
-CONFIG_ARCH_PGPOOL_VBASE=0x80800000
+CONFIG_ARCH_PGPOOL_VBASE=0x80a00000
CONFIG_ARCH_RISCV=y
+CONFIG_ARCH_RV_EXT_SSTC=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH_TEXT_NPAGES=128
CONFIG_ARCH_TEXT_VBASE=0xC0000000
@@ -78,7 +79,7 @@ CONFIG_PAGING=y
CONFIG_PATH_INITIAL="/system/bin"
CONFIG_POSIX_SPAWN_DEFAULT_STACKSIZE=1048576
CONFIG_RAM_SIZE=4194304
-CONFIG_RAM_START=0x80400000
+CONFIG_RAM_START=0x80600000
CONFIG_READLINE_CMD_HISTORY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_LPWORK=y
diff --git a/boards/risc-v/qemu-rv/rv-virt/configs/knsh32_romfs/defconfig
b/boards/risc-v/qemu-rv/rv-virt/configs/knsh32_romfs/defconfig
index 56de9f461a..3e4538546a 100644
--- a/boards/risc-v/qemu-rv/rv-virt/configs/knsh32_romfs/defconfig
+++ b/boards/risc-v/qemu-rv/rv-virt/configs/knsh32_romfs/defconfig
@@ -33,10 +33,11 @@ CONFIG_ARCH_HEAP_VBASE=0xC0800000
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_KERNEL_STACKSIZE=3072
CONFIG_ARCH_PGPOOL_MAPPING=y
-CONFIG_ARCH_PGPOOL_PBASE=0x80800000
+CONFIG_ARCH_PGPOOL_PBASE=0x80a00000
CONFIG_ARCH_PGPOOL_SIZE=4194304
-CONFIG_ARCH_PGPOOL_VBASE=0x80800000
+CONFIG_ARCH_PGPOOL_VBASE=0x80a00000
CONFIG_ARCH_RISCV=y
+CONFIG_ARCH_RV_EXT_SSTC=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH_TEXT_NPAGES=128
CONFIG_ARCH_TEXT_VBASE=0xC0000000
@@ -74,7 +75,7 @@ CONFIG_NSH_READLINE=y
CONFIG_PATH_INITIAL="/system/bin"
CONFIG_POSIX_SPAWN_DEFAULT_STACKSIZE=8193
CONFIG_RAM_SIZE=4194304
-CONFIG_RAM_START=0x80400000
+CONFIG_RAM_START=0x80600000
CONFIG_READLINE_CMD_HISTORY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_LPWORK=y
diff --git a/boards/risc-v/qemu-rv/rv-virt/configs/knsh64/defconfig
b/boards/risc-v/qemu-rv/rv-virt/configs/knsh64/defconfig
index 092331e47e..4e075413da 100644
--- a/boards/risc-v/qemu-rv/rv-virt/configs/knsh64/defconfig
+++ b/boards/risc-v/qemu-rv/rv-virt/configs/knsh64/defconfig
@@ -31,10 +31,11 @@ CONFIG_ARCH_HEAP_VBASE=0xC0200000
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_KERNEL_STACKSIZE=3072
CONFIG_ARCH_PGPOOL_MAPPING=y
-CONFIG_ARCH_PGPOOL_PBASE=0x80400000
+CONFIG_ARCH_PGPOOL_PBASE=0x80600000
CONFIG_ARCH_PGPOOL_SIZE=4194304
-CONFIG_ARCH_PGPOOL_VBASE=0x80400000
+CONFIG_ARCH_PGPOOL_VBASE=0x80600000
CONFIG_ARCH_RISCV=y
+CONFIG_ARCH_RV_EXT_SSTC=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH_TEXT_NPAGES=128
CONFIG_ARCH_TEXT_VBASE=0xC0000000
@@ -78,8 +79,8 @@ CONFIG_NSH_FILE_APPS=y
CONFIG_NSH_READLINE=y
CONFIG_PATH_INITIAL="/system/bin"
CONFIG_RAM_SIZE=2097152
-CONFIG_RAM_START=0x80200000
-CONFIG_RAM_VSTART=0x80200000
+CONFIG_RAM_START=0x80400000
+CONFIG_RAM_VSTART=0x80400000
CONFIG_READLINE_CMD_HISTORY=y
CONFIG_RISCV_SEMIHOSTING_HOSTFS=y
CONFIG_RR_INTERVAL=200
diff --git a/boards/risc-v/qemu-rv/rv-virt/configs/ksmp64/defconfig
b/boards/risc-v/qemu-rv/rv-virt/configs/ksmp64/defconfig
index c0f789c04e..02474f42fd 100644
--- a/boards/risc-v/qemu-rv/rv-virt/configs/ksmp64/defconfig
+++ b/boards/risc-v/qemu-rv/rv-virt/configs/ksmp64/defconfig
@@ -31,10 +31,11 @@ CONFIG_ARCH_HEAP_VBASE=0xC0200000
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_KERNEL_STACKSIZE=3072
CONFIG_ARCH_PGPOOL_MAPPING=y
-CONFIG_ARCH_PGPOOL_PBASE=0x80400000
+CONFIG_ARCH_PGPOOL_PBASE=0x80600000
CONFIG_ARCH_PGPOOL_SIZE=4194304
-CONFIG_ARCH_PGPOOL_VBASE=0x80400000
+CONFIG_ARCH_PGPOOL_VBASE=0x80600000
CONFIG_ARCH_RISCV=y
+CONFIG_ARCH_RV_EXT_SSTC=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH_TEXT_NPAGES=128
CONFIG_ARCH_TEXT_VBASE=0xC0000000
@@ -77,8 +78,8 @@ CONFIG_NSH_FILE_APPS=y
CONFIG_NSH_READLINE=y
CONFIG_PATH_INITIAL="/system/bin"
CONFIG_RAM_SIZE=2097152
-CONFIG_RAM_START=0x80200000
-CONFIG_RAM_VSTART=0x80200000
+CONFIG_RAM_START=0x80400000
+CONFIG_RAM_VSTART=0x80400000
CONFIG_READLINE_CMD_HISTORY=y
CONFIG_RISCV_SEMIHOSTING_HOSTFS=y
CONFIG_RR_INTERVAL=200
diff --git a/boards/risc-v/qemu-rv/rv-virt/scripts/ld-kernel32.script
b/boards/risc-v/qemu-rv/rv-virt/scripts/ld-kernel32.script
index dc74d1608e..051f3e3e83 100644
--- a/boards/risc-v/qemu-rv/rv-virt/scripts/ld-kernel32.script
+++ b/boards/risc-v/qemu-rv/rv-virt/scripts/ld-kernel32.script
@@ -20,9 +20,9 @@
MEMORY
{
- kflash (rx) : ORIGIN = 0x80000000, LENGTH = 4096K /* w/ cache */
- ksram (rwx) : ORIGIN = 0x80400000, LENGTH = 4096K /* w/ cache */
- pgram (rwx) : ORIGIN = 0x80800000, LENGTH = 4096K /* w/ cache */
+ kflash (rx) : ORIGIN = 0x80200000, LENGTH = 4096K /* w/ cache */
+ ksram (rwx) : ORIGIN = 0x80600000, LENGTH = 4096K /* w/ cache */
+ pgram (rwx) : ORIGIN = 0x80a00000, LENGTH = 4096K /* w/ cache */
}
OUTPUT_ARCH("riscv")
diff --git a/boards/risc-v/qemu-rv/rv-virt/scripts/ld-kernel64.script
b/boards/risc-v/qemu-rv/rv-virt/scripts/ld-kernel64.script
index 8763194d66..ce344fc950 100644
--- a/boards/risc-v/qemu-rv/rv-virt/scripts/ld-kernel64.script
+++ b/boards/risc-v/qemu-rv/rv-virt/scripts/ld-kernel64.script
@@ -20,9 +20,9 @@
MEMORY
{
- kflash (rx) : ORIGIN = 0x80000000, LENGTH = 2048K /* w/ cache */
- ksram (rwx) : ORIGIN = 0x80200000, LENGTH = 2048K /* w/ cache */
- pgram (rwx) : ORIGIN = 0x80400000, LENGTH = 4096K /* w/ cache */
+ kflash (rx) : ORIGIN = 0x80200000, LENGTH = 2048K /* w/ cache */
+ ksram (rwx) : ORIGIN = 0x80400000, LENGTH = 2048K /* w/ cache */
+ pgram (rwx) : ORIGIN = 0x80600000, LENGTH = 4096K /* w/ cache */
}
OUTPUT_ARCH("riscv")
