raiden00pl commented on code in PR #14033: URL: https://github.com/apache/nuttx/pull/14033#discussion_r1794954438
########## include/nuttx/serial/uart_16550.h: ########## @@ -173,35 +173,20 @@ /* Register offsets *********************************************************/ -#define UART_RBR_INCR 0 /* (DLAB =0) Receiver Buffer Register */ -#define UART_THR_INCR 0 /* (DLAB =0) Transmit Holding Register */ -#define UART_DLL_INCR 0 /* (DLAB =1) Divisor Latch LSB */ -#define UART_DLM_INCR 1 /* (DLAB =1) Divisor Latch MSB */ -#define UART_IER_INCR 1 /* (DLAB =0) Interrupt Enable Register */ -#define UART_IIR_INCR 2 /* Interrupt ID Register */ -#define UART_FCR_INCR 2 /* FIFO Control Register */ -#define UART_LCR_INCR 3 /* Line Control Register */ -#define UART_MCR_INCR 4 /* Modem Control Register */ -#define UART_LSR_INCR 5 /* Line Status Register */ -#define UART_MSR_INCR 6 /* Modem Status Register */ -#define UART_SCR_INCR 7 /* Scratch Pad Register */ -#define UART_USR_INCR 31 /* UART Status Register */ -#define UART_DLF_INCR 48 /* Divisor Latch Fraction Register */ - -#define UART_RBR_OFFSET (CONFIG_16550_REGINCR*UART_RBR_INCR) -#define UART_THR_OFFSET (CONFIG_16550_REGINCR*UART_THR_INCR) Review Comment: on-chip 16550 device register increment (controlled by `CONFIG_16550_REGINCR`) can be different for PCI serial drivers (which is controlled by PCI serial driver implementation). Decoupling register offsets from `CONFIG_16550_REGINCR` allows the use of on-chip 16550 and PCI-based devices simultaneously. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
