This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a change to branch releases/12.7
in repository https://gitbox.apache.org/repos/asf/nuttx.git
from 068c7176bb usensor.c:fix container_of member error.
new 40d40015f4 arm64: refine the fatal handler
new d782f6c1ac arm64: add arm64_current_el to obtain current EL
new 7cbcf82bed arm64: save FPU regs every time
new 669cd3aa2c arm64: simply the vectors
new 7975c94d88 Kernel build: enter exception save sp_sl0,exit exception
restroe sp_el0
new 192dde1b58 arm64_task/pthread_start: Set sp_el0 upon starting user
process
new bbea8dcefe arch/x86_64/intel64/intel64_head.S: move initial RSP for AP
cores below regs area
new a33528fa4a arch/x86_64/intel64/intel64_cpuidlestack.c: stack_alloc
should point to stack base not stack top
new fad4232925 arch/x86_64/intel64/intel64_schedulesigaction.c: properly
align signal handler stack for vector operations
new ec58a6ab25 arch: cpu pause when sigaction only necessary if tcb running
new 8275a846b1 arch: move sigdeliver to common code
new 487fcb3bce signal: adjust the signal processing logic to remove the
judgment
new 4fd92edee7 sched: replace sync pause with async pause for nxsig_process
new e0d9cc432c arch/intel64: fix IRQ conflict with GOLDFISH
new 755bef6c56 sched_smp:adjust the unlock order
new 5e2d205e1b sched: handle sched lock in interrupt
new 4a796c39bb xtensa: add parameters to xtensa_pause_handler
new f5a449487c arch/intel64: colorize IDLE stack for AP cores
new fbed4ece2c x86_64: we should call x86_64_restorestate/x86_64_savestate
new 6392d5a6b3 xtensa: Replace the implementation of up_cpu_pause
new d54bc8a9f8 arch: remove up_cpu_pause up_cpu_resume up_cpu_paused
up_cpu_pausereq
new c35e25b7e5 arch: rename xxxx_pause.c to xxxx_smpcall.c
new b1932c668d sim: fix sim smp boot regression
new f51c5452b2 sched: replace sync pause with async pause for
nxtask_restart
new 9da6761453 assert: disable kasan in assert
new e65b03edd2 assert: cleanup assert handler
new 8074812517 assert: dump all CPU registers and stack
new 0b98e9e680 board_reset: flush cache before reset
The 28 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "add" were already present in the repository and have only
been added to this reference.
Summary of changes:
arch/arm/include/arm/irq.h | 6 -
arch/arm/include/armv6-m/irq.h | 6 -
arch/arm/include/armv7-a/irq.h | 6 -
arch/arm/include/armv7-m/irq.h | 6 -
arch/arm/include/armv7-r/irq.h | 6 -
arch/arm/include/armv8-m/irq.h | 6 -
arch/arm/include/armv8-r/irq.h | 6 -
arch/arm/include/cxd56xx/irq.h | 2 +-
arch/arm/include/lc823450/irq.h | 4 +-
arch/arm/include/rp2040/irq.h | 4 +-
arch/arm/include/sam34/sam4cm_irq.h | 4 +-
arch/arm/include/tlsr82/irq.h | 6 -
arch/arm/src/arm/arm_schedulesigaction.c | 87 ++-
arch/arm/src/arm/arm_sigdeliver.c | 8 +-
arch/arm/src/armv6-m/arm_schedulesigaction.c | 123 ++--
arch/arm/src/armv6-m/arm_sigdeliver.c | 8 +-
arch/arm/src/armv7-a/CMakeLists.txt | 2 +-
arch/arm/src/armv7-a/Make.defs | 2 +-
arch/arm/src/armv7-a/arm_cpupause.c | 425 -------------
arch/arm/src/armv7-a/arm_gicv2.c | 28 +-
arch/arm/src/armv7-a/arm_schedulesigaction.c | 114 ++--
arch/arm/src/armv7-a/arm_sigdeliver.c | 8 +-
.../src/armv7-a/arm_smpcall.c} | 110 ++--
arch/arm/src/armv7-a/arm_syscall.c | 2 +-
arch/arm/src/armv7-a/gic.h | 40 +-
arch/arm/src/armv7-m/arm_schedulesigaction.c | 125 ++--
arch/arm/src/armv7-m/arm_sigdeliver.c | 8 +-
arch/arm/src/armv7-r/CMakeLists.txt | 2 +-
arch/arm/src/armv7-r/Make.defs | 2 +-
arch/arm/src/armv7-r/arm_cpupause.c | 423 -------------
arch/arm/src/armv7-r/arm_gicv2.c | 27 +-
arch/arm/src/armv7-r/arm_schedulesigaction.c | 106 ++--
arch/arm/src/armv7-r/arm_sigdeliver.c | 8 +-
.../src/armv7-r/arm_smpcall.c} | 110 ++--
arch/arm/src/armv7-r/arm_syscall.c | 2 +-
arch/arm/src/armv7-r/gic.h | 40 +-
arch/arm/src/armv8-m/arm_schedulesigaction.c | 125 ++--
arch/arm/src/armv8-m/arm_sigdeliver.c | 8 +-
arch/arm/src/armv8-r/arm_gic.h | 37 +-
arch/arm/src/armv8-r/arm_gicv3.c | 31 +-
arch/arm/src/armv8-r/arm_schedulesigaction.c | 106 ++--
arch/arm/src/armv8-r/arm_sigdeliver.c | 8 +-
arch/arm/src/armv8-r/arm_syscall.c | 2 +-
arch/arm/src/cxd56xx/CMakeLists.txt | 2 +-
arch/arm/src/cxd56xx/Make.defs | 2 +-
arch/arm/src/cxd56xx/cxd56_cpupause.c | 578 -----------------
arch/arm/src/cxd56xx/cxd56_cpustart.c | 10 +-
arch/arm/src/cxd56xx/cxd56_irq.c | 2 +-
arch/arm/src/cxd56xx/cxd56_smpcall.c | 231 +++++++
arch/arm/src/lc823450/Make.defs | 2 +-
arch/arm/src/lc823450/lc823450_cpupause.c | 450 --------------
arch/arm/src/lc823450/lc823450_cpustart.c | 12 +-
.../src/lc823450/lc823450_smpcall.c} | 134 ++--
arch/arm/src/rp2040/Make.defs | 2 +-
arch/arm/src/rp2040/rp2040_cpupause.c | 547 -----------------
arch/arm/src/rp2040/rp2040_cpustart.c | 10 +-
arch/arm/src/rp2040/rp2040_irq.c | 4 +-
arch/arm/src/rp2040/rp2040_smpcall.c | 210 +++++++
arch/arm/src/sam34/Make.defs | 2 +-
arch/arm/src/sam34/sam4cm_cpupause.c | 446 --------------
arch/arm/src/sam34/sam4cm_cpustart.c | 10 +-
.../src/sam34/sam4cm_smpcall.c} | 134 ++--
arch/arm/src/tlsr82/tc32/tc32_schedulesigaction.c | 85 ++-
arch/arm64/include/irq.h | 6 -
arch/arm64/src/common/CMakeLists.txt | 2 +-
arch/arm64/src/common/Make.defs | 2 +-
arch/arm64/src/common/arm64_arch.h | 23 +
arch/arm64/src/common/arm64_cpupause.c | 430 -------------
arch/arm64/src/common/arm64_exit.c | 3 -
arch/arm64/src/common/arm64_fatal.c | 682 +++++++++++++--------
arch/arm64/src/common/arm64_fatal.h | 158 ++++-
arch/arm64/src/common/arm64_fpu.c | 140 +----
arch/arm64/src/common/arm64_fpu_func.S | 16 +-
arch/arm64/src/common/arm64_gic.h | 42 +-
arch/arm64/src/common/arm64_gicv2.c | 27 +-
arch/arm64/src/common/arm64_gicv3.c | 33 +-
arch/arm64/src/common/arm64_initialstate.c | 20 -
arch/arm64/src/common/arm64_internal.h | 5 +-
arch/arm64/src/common/arm64_pthread_start.c | 4 +-
arch/arm64/src/common/arm64_schedulesigaction.c | 86 +--
arch/arm64/src/common/arm64_sigdeliver.c | 17 +-
.../src/common/arm64_smpcall.c} | 104 ++--
arch/arm64/src/common/arm64_syscall.c | 156 ++---
arch/arm64/src/common/arm64_task_start.c | 4 +-
arch/arm64/src/common/arm64_vector_table.S | 38 +-
arch/arm64/src/common/arm64_vectors.S | 381 +++---------
arch/avr/include/avr/irq.h | 6 -
arch/avr/include/avr32/irq.h | 6 -
arch/avr/src/avr/avr_schedulesigaction.c | 156 +++--
arch/avr/src/avr/avr_sigdeliver.c | 16 +-
arch/avr/src/avr32/avr_initialstate.c | 2 +-
arch/avr/src/avr32/avr_schedulesigaction.c | 128 ++--
arch/avr/src/avr32/avr_sigdeliver.c | 12 +-
arch/ceva/include/xc5/irq.h | 6 -
arch/ceva/include/xm6/irq.h | 6 -
arch/ceva/src/common/ceva_schedulesigaction.c | 169 ++---
arch/ceva/src/common/ceva_sigdeliver.c | 8 +-
arch/mips/include/mips32/irq.h | 6 -
arch/mips/src/mips32/mips_schedulesigaction.c | 148 +++--
arch/mips/src/mips32/mips_sigdeliver.c | 12 +-
arch/misoc/include/lm32/irq.h | 6 -
arch/misoc/include/minerva/irq.h | 6 -
arch/misoc/src/lm32/lm32_schedulesigaction.c | 132 ++--
arch/misoc/src/lm32/lm32_sigdeliver.c | 12 +-
arch/misoc/src/minerva/minerva_schedulesigaction.c | 134 ++--
arch/misoc/src/minerva/minerva_sigdeliver.c | 8 +-
arch/or1k/include/mor1kx/irq.h | 6 -
arch/or1k/src/common/or1k_schedulesigaction.c | 130 ++--
arch/renesas/include/m16c/irq.h | 6 -
arch/renesas/include/rx65n/irq.h | 6 -
arch/renesas/include/sh1/irq.h | 6 -
arch/renesas/src/m16c/m16c_schedulesigaction.c | 118 ++--
arch/renesas/src/m16c/m16c_sigdeliver.c | 14 +-
arch/renesas/src/rx65n/rx65n_schedulesigaction.c | 110 ++--
arch/renesas/src/rx65n/rx65n_sigdeliver.c | 8 +-
arch/renesas/src/sh1/sh1_schedulesigaction.c | 110 ++--
arch/renesas/src/sh1/sh1_sigdeliver.c | 12 +-
arch/risc-v/include/irq.h | 6 -
arch/risc-v/src/common/CMakeLists.txt | 2 +-
arch/risc-v/src/common/Make.defs | 2 +-
arch/risc-v/src/common/riscv_cpupause.c | 438 -------------
arch/risc-v/src/common/riscv_exception.c | 2 +-
arch/risc-v/src/common/riscv_internal.h | 2 +-
arch/risc-v/src/common/riscv_schedulesigaction.c | 102 ++-
arch/risc-v/src/common/riscv_sigdeliver.c | 8 +-
.../jh7110_timerisr.c => common/riscv_smpcall.c} | 107 ++--
arch/risc-v/src/jh7110/jh7110_timerisr.c | 2 +-
arch/sim/include/irq.h | 1 -
arch/sim/src/sim/posix/sim_hostsmp.c | 2 +
arch/sim/src/sim/sim_doirq.c | 10 +
arch/sim/src/sim/sim_internal.h | 1 +
arch/sim/src/sim/sim_schedulesigaction.c | 22 +-
arch/sim/src/sim/sim_sigdeliver.c | 10 +-
arch/sim/src/sim/sim_smpsignal.c | 321 +---------
arch/sparc/include/sparc_v8/irq.h | 6 -
arch/sparc/src/s698pm/Make.defs | 2 +-
arch/sparc/src/s698pm/s698pm-irq.c | 2 +-
arch/sparc/src/s698pm/s698pm.h | 12 +-
arch/sparc/src/s698pm/s698pm_cpupause.c | 440 -------------
.../src/s698pm/s698pm_smpcall.c} | 112 ++--
.../src/sparc_v8/sparc_v8_schedulesigaction.c | 328 ++++------
arch/sparc/src/sparc_v8/sparc_v8_sigdeliver.c | 14 +-
arch/tricore/include/tc3xx/irq.h | 6 -
.../tricore/src/common/tricore_schedulesigaction.c | 113 ++--
arch/tricore/src/common/tricore_sigdeliver.c | 8 +-
arch/x86/include/i486/irq.h | 6 -
arch/x86/src/i486/i486_schedulesigaction.c | 128 ++--
arch/x86/src/i486/i486_sigdeliver.c | 12 +-
arch/x86_64/include/intel64/irq.h | 20 +-
arch/x86_64/src/intel64/CMakeLists.txt | 2 +-
arch/x86_64/src/intel64/Make.defs | 2 +-
arch/x86_64/src/intel64/intel64_cpuidlestack.c | 3 +-
arch/x86_64/src/intel64/intel64_cpupause.c | 464 --------------
arch/x86_64/src/intel64/intel64_cpustart.c | 27 +-
arch/x86_64/src/intel64/intel64_head.S | 4 +
arch/x86_64/src/intel64/intel64_irq.c | 1 -
.../x86_64/src/intel64/intel64_schedulesigaction.c | 311 ++++------
arch/x86_64/src/intel64/intel64_sigdeliver.c | 14 +-
arch/x86_64/src/intel64/intel64_smpcall.c | 157 +++++
arch/xtensa/include/irq.h | 6 -
arch/xtensa/src/common/Make.defs | 2 +-
arch/xtensa/src/common/xtensa.h | 2 +-
arch/xtensa/src/common/xtensa_cpupause.c | 405 ------------
arch/xtensa/src/common/xtensa_schedsigaction.c | 113 ++--
arch/xtensa/src/common/xtensa_sigdeliver.c | 8 +-
.../src/common/xtensa_smpcall.c} | 103 ++--
arch/xtensa/src/esp32/esp32_intercpu_interrupt.c | 13 +-
arch/xtensa/src/esp32/esp32_spiram.c | 27 +-
.../src/esp32s3/esp32s3_intercpu_interrupt.c | 13 +-
arch/xtensa/src/esp32s3/esp32s3_spiram.c | 23 +-
arch/z16/include/z16f/irq.h | 6 -
arch/z16/src/common/z16_schedulesigaction.c | 122 ++--
arch/z16/src/common/z16_sigdeliver.c | 12 +-
arch/z80/include/ez80/irq.h | 6 -
arch/z80/include/z180/irq.h | 6 -
arch/z80/include/z8/irq.h | 6 -
arch/z80/include/z80/irq.h | 6 -
arch/z80/src/ez80/ez80_schedulesigaction.c | 83 ++-
arch/z80/src/ez80/ez80_sigdeliver.c | 12 +-
arch/z80/src/z180/z180_schedulesigaction.c | 85 ++-
arch/z80/src/z180/z180_sigdeliver.c | 12 +-
arch/z80/src/z8/z8_schedulesigaction.c | 87 ++-
arch/z80/src/z8/z8_sigdeliver.c | 12 +-
arch/z80/src/z80/z80_schedulesigaction.c | 85 ++-
arch/z80/src/z80/z80_sigdeliver.c | 12 +-
boards/boardctl.c | 3 +
include/nuttx/arch.h | 163 +----
include/nuttx/init.h | 3 +-
include/nuttx/irq.h | 4 +-
include/nuttx/sched.h | 6 +
sched/Kconfig | 8 +
sched/irq/irq_csection.c | 139 +----
sched/misc/assert.c | 354 +++++++----
sched/sched/CMakeLists.txt | 1 -
sched/sched/Make.defs | 2 +-
sched/sched/sched.h | 2 -
sched/sched/sched_addreadytorun.c | 2 +-
sched/sched/sched_cpupause.c | 106 ----
sched/sched/sched_process_delivered.c | 8 +-
sched/sched/sched_removereadytorun.c | 16 +-
sched/sched/sched_smp.c | 49 +-
sched/signal/sig_dispatch.c | 85 ++-
sched/task/task_restart.c | 255 +++++---
203 files changed, 4442 insertions(+), 10209 deletions(-)
delete mode 100644 arch/arm/src/armv7-a/arm_cpupause.c
copy arch/{risc-v/src/jh7110/jh7110_timerisr.c =>
arm/src/armv7-a/arm_smpcall.c} (59%)
delete mode 100644 arch/arm/src/armv7-r/arm_cpupause.c
copy arch/{risc-v/src/jh7110/jh7110_timerisr.c =>
arm/src/armv7-r/arm_smpcall.c} (59%)
delete mode 100644 arch/arm/src/cxd56xx/cxd56_cpupause.c
create mode 100644 arch/arm/src/cxd56xx/cxd56_smpcall.c
delete mode 100644 arch/arm/src/lc823450/lc823450_cpupause.c
copy arch/{xtensa/src/esp32s3/esp32s3_intercpu_interrupt.c =>
arm/src/lc823450/lc823450_smpcall.c} (54%)
delete mode 100644 arch/arm/src/rp2040/rp2040_cpupause.c
create mode 100644 arch/arm/src/rp2040/rp2040_smpcall.c
delete mode 100644 arch/arm/src/sam34/sam4cm_cpupause.c
copy arch/{xtensa/src/esp32s3/esp32s3_intercpu_interrupt.c =>
arm/src/sam34/sam4cm_smpcall.c} (54%)
delete mode 100644 arch/arm64/src/common/arm64_cpupause.c
copy arch/{risc-v/src/jh7110/jh7110_timerisr.c =>
arm64/src/common/arm64_smpcall.c} (58%)
delete mode 100644 arch/risc-v/src/common/riscv_cpupause.c
copy arch/risc-v/src/{jh7110/jh7110_timerisr.c => common/riscv_smpcall.c} (60%)
delete mode 100644 arch/sparc/src/s698pm/s698pm_cpupause.c
copy arch/{risc-v/src/jh7110/jh7110_timerisr.c =>
sparc/src/s698pm/s698pm_smpcall.c} (57%)
delete mode 100644 arch/x86_64/src/intel64/intel64_cpupause.c
create mode 100644 arch/x86_64/src/intel64/intel64_smpcall.c
delete mode 100644 arch/xtensa/src/common/xtensa_cpupause.c
copy arch/{risc-v/src/jh7110/jh7110_timerisr.c =>
xtensa/src/common/xtensa_smpcall.c} (63%)
delete mode 100644 sched/sched/sched_cpupause.c
