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commit d410eedfde6b3aa550a2c16fe68ca8aac0ea9d9b Author: buxiasen <[email protected]> AuthorDate: Thu Oct 17 12:37:40 2024 +0800 arm/rp2040: use custom vectors to make smp_call work with exception_common Signed-off-by: buxiasen <[email protected]> --- arch/arm/Kconfig | 1 + arch/arm/src/rp2040/Make.defs | 1 + arch/arm/src/rp2040/rp2040_vectors.c | 121 +++++++++++++++++++++++++++++++++++ 3 files changed, 123 insertions(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index a1be67587c..2748ee7c79 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -348,6 +348,7 @@ config ARCH_CHIP_RP2040 select ARM_HAVE_WFE_SEV select ARCH_HAVE_PWM_MULTICHAN select ARCH_BOARD_COMMON + select ARCH_HAVE_CUSTOM_VECTORS ---help--- Raspberry Pi RP2040 architectures (ARM dual Cortex-M0+). diff --git a/arch/arm/src/rp2040/Make.defs b/arch/arm/src/rp2040/Make.defs index 857105f11f..6a1ff9baea 100644 --- a/arch/arm/src/rp2040/Make.defs +++ b/arch/arm/src/rp2040/Make.defs @@ -33,6 +33,7 @@ CHIP_CSRCS += rp2040_pio.c CHIP_CSRCS += rp2040_clock.c CHIP_CSRCS += rp2040_xosc.c CHIP_CSRCS += rp2040_pll.c +CHIP_CSRCS += rp2040_vectors.c ifeq ($(CONFIG_SMP),y) CHIP_CSRCS += rp2040_cpustart.c diff --git a/arch/arm/src/rp2040/rp2040_vectors.c b/arch/arm/src/rp2040/rp2040_vectors.c new file mode 100644 index 0000000000..bc15b969da --- /dev/null +++ b/arch/arm/src/rp2040/rp2040_vectors.c @@ -0,0 +1,121 @@ +/**************************************************************************** + * arch/arm/src/rp2040/rp2040_vectors.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <[email protected]> + * + * Cloned from the ARMv7-M version: + * + * Copyright (C) 2012 Michael Smith. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include "chip.h" +#include "arm_internal.h" +#include "ram_vectors.h" +#include "nvic.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define IDLE_STACK (_ebss + CONFIG_IDLETHREAD_STACKSIZE) + +#ifndef ARMV6M_PERIPHERAL_INTERRUPTS +# error ARMV6M_PERIPHERAL_INTERRUPTS must be defined to the number of I/O interrupts to be supported +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/* Chip-specific entrypoint */ + +extern void __start(void); + +static void start(void) +{ + /* Zero lr to mark the end of backtrace */ + + asm volatile ("mov lr, %0\n\t" + "bx %1\n\t" + : + : "r"(0), "r"(__start)); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/* Common exception entrypoint */ + +extern void exception_common(void); +extern void exception_direct(void); + +/**************************************************************************** + * Public data + ****************************************************************************/ + +/* The v6m vector table consists of an array of function pointers, with the + * first slot (vector zero) used to hold the initial stack pointer. + * + * As all exceptions (interrupts) are routed via exception_common, we just + * need to fill this array with pointers to it. + * + * Note that the [ ... ] designated initializer is a GCC extension. + */ + +const void * const _vectors[] locate_data(".vectors") + aligned_data(VECTAB_ALIGN) = +{ + /* Initial stack */ + + IDLE_STACK, + + /* Reset exception handler */ + + start, + + /* Vectors 2 - n point directly at the generic handler */ + + [2 ... NVIC_IRQ_PENDSV] = &exception_common, + [(NVIC_IRQ_PENDSV + 1) ... (RP2040_SMP_CALL_PROC0 - 1)] + = &exception_direct, + [RP2040_SMP_CALL_PROC0 ... RP2040_SMP_CALL_PROC1] + = &exception_common, + [(RP2040_SMP_CALL_PROC1 + 1) ... (15 + ARMV6M_PERIPHERAL_INTERRUPTS)] + = &exception_direct, +};
