xiaoxiang781216 commented on code in PR #14687: URL: https://github.com/apache/nuttx/pull/14687#discussion_r1838101863
########## arch/arm64/src/imx9/imx9_trdc.c: ########## @@ -0,0 +1,938 @@ +/**************************************************************************** + * arch/arm64/src/imx9/imx9_trdc.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <stdint.h> +#include <stdbool.h> +#include <errno.h> +#include <nuttx/arch.h> +#include <nuttx/clock.h> +#include <debug.h> + +#include <arch/board/board.h> + +#include "chip.h" +#include "arm64_internal.h" +#include "imx9_trdc.h" +#include <arch/board/imx9_trdc_config.h> + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define mmio_read_32(c) getreg32(c) +#define mmio_write_32(c, v) putreg32(v, c) +#define mmio_clrbits_32(addr, clear) modifyreg32(addr, clear, 0) +#define mmio_setbits_32(addr, set) modifyreg32(addr, 0, set) +#define mmio_clrsetbits_32(addr, clear, set) modifyreg32(addr, clear, set) + +/* Bits 8:15 rdc id, bits 0:7 core id */ + +#define TRDC_AON 0x7402 +#define TRDC_WAKEUP 0x7802 +#define TRDC_MEDIA 0x8202 +#define TRDC_NIX 0x8602 + +#define VERBOSE _none + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct mbc_mem_dom +{ + uint32_t mem_glbcfg[4]; + uint32_t nse_blk_index; + uint32_t nse_blk_set; + uint32_t nse_blk_clr; + uint32_t nsr_blk_clr_all; + uint32_t memn_glbac[8]; + + /* The upper only existed in the beginning of each MBC */ + + uint32_t mem0_blk_cfg_w[64]; + uint32_t mem0_blk_nse_w[16]; + uint32_t mem1_blk_cfg_w[8]; + uint32_t mem1_blk_nse_w[2]; + uint32_t mem2_blk_cfg_w[8]; + uint32_t mem2_blk_nse_w[2]; + uint32_t mem3_blk_cfg_w[8]; + uint32_t mem3_blk_nse_w[2]; /* 0x1F0, 0x1F4 */ + uint32_t reserved[2]; +}; + +struct mrc_rgn_dom +{ + uint32_t mrc_glbcfg[4]; + uint32_t nse_rgn_indirect; + uint32_t nse_rgn_set; + uint32_t nse_rgn_clr; + uint32_t nse_rgn_clr_all; + uint32_t memn_glbac[8]; + + /* The upper only existed in the beginning of each MRC */ + + uint32_t rgn_desc_words[16][2]; /* 16 regions at max, 2 words per region */ + uint32_t rgn_nse; + uint32_t reserved2[15]; +}; + +struct mda_inst +{ + uint32_t mda_w[8]; +}; + +struct trdc_mgr +{ + uint32_t trdc_cr; + uint32_t res0[59]; + uint32_t trdc_hwcfg0; + uint32_t trdc_hwcfg1; + uint32_t res1[450]; + struct mda_inst mda[8]; + uint32_t res2[15808]; +}; + +struct trdc_mbc +{ + struct mbc_mem_dom mem_dom[DID_NUM]; +}; + +struct trdc_mrc +{ + struct mrc_rgn_dom mrc_dom[DID_NUM]; +}; + +struct trdc_mgr_info +{ + unsigned long trdc_base; + uint8_t mbc_id; + uint8_t mbc_mem_id; + uint8_t blk_mgr; + uint8_t blk_mc; +}; + +struct trdc_config_info +{ + unsigned long trdc_base; + struct trdc_glbac_config *mbc_glbac; + uint32_t num_mbc_glbac; + struct trdc_mbc_config *mbc_cfg; + uint32_t num_mbc_cfg; + struct trdc_glbac_config *mrc_glbac; + uint32_t num_mrc_glbac; + struct trdc_mrc_config *mrc_cfg; + uint32_t num_mrc_cfg; +}; + +struct trdc_fused_module_info +{ + unsigned long trdc_base; + uint8_t fsb_index; + uint8_t fuse_bit; + uint8_t mbc_id; + uint8_t mem_id; + uint8_t blk_id; + uint8_t blk_num; +}; + +struct trdc_fuse_data +{ + uint8_t fsb_index; + uint32_t value; +}; + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct trdc_mgr_info g_trdc_mgr_blks[] = +{ + { 0x44270000, 0, 0, 39, 40 }, /* TRDC_A */ + { 0x42460000, 0, 0, 70, 71 }, /* TRDC_W */ + { 0x42460000, 1, 0, 1, 2 }, /* TRDC_M */ + { 0x49010000, 0, 1, 1, 2 }, /* TRDC_N */ +}; + +static const struct trdc_config_info g_trdc_cfg_info[] = +{ + { + 0x44270000, + trdc_a_mbc_glbac, nitems(trdc_a_mbc_glbac), + trdc_a_mbc, nitems(trdc_a_mbc), + trdc_a_mrc_glbac, nitems(trdc_a_mrc_glbac), + trdc_a_mrc, nitems(trdc_a_mrc) + }, /* TRDC_A */ + { + 0x42460000, + trdc_w_mbc_glbac, nitems(trdc_w_mbc_glbac), + trdc_w_mbc, nitems(trdc_w_mbc), + trdc_w_mrc_glbac, nitems(trdc_w_mrc_glbac), + trdc_w_mrc, nitems(trdc_w_mrc) + }, /* TRDC_W */ + { + 0x49010000, + trdc_n_mbc_glbac, nitems(trdc_n_mbc_glbac), + trdc_n_mbc, nitems(trdc_n_mbc), + trdc_n_mrc_glbac, nitems(trdc_n_mrc_glbac), + trdc_n_mrc, nitems(trdc_n_mrc) + }, /* TRDC_N */ +}; + +static const struct trdc_config_info g_trdc_boot_cfg_info[] = +{ + { + 0x49010000, + trdc_boot_mbc_glbac, nitems(trdc_boot_mbc_glbac), + trdc_boot_ocram_mbc, nitems(trdc_boot_ocram_mbc), + trdc_n_mrc_glbac, nitems(trdc_n_mrc_glbac), + trdc_n_mrc, nitems(trdc_n_mrc) + }, +}; + +/**************************************************************************** Review Comment: remove dup banner ########## arch/arm64/src/imx9/hardware/imx9_trdc.h: ########## @@ -0,0 +1,97 @@ +/**************************************************************************** + * arch/arm64/src/imx9/hardware/imx9_trdc.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM64_SRC_IMX9_HARDWARE_IMX9_TRDC_H +#define __ARCH_ARM64_SRC_IMX9_HARDWARE_IMX9_TRDC_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <hardware/imx9_memorymap.h> + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define IMX9_TRDC_HWCFG0 (IMX9_TRDC_BASE + 0xf0) + +#define IMX9_MBC0_MEM_GLBAC(n) (0x20 + (n << 2)) +#define IMX9_MBC_MEM_BLK_CFG_0(m, n) (0x200 * m + 0x40 + (n << 2)) +#define IMX9_MBC_MEM_BLK_CFG_I(m, n, i) (0x200 * m + 0x40 + (80 << 2) + (i - 1) * 0x28 + (n << 2)) +#define IMX9_MRC0_DOM_RGD_W(m, n) (0x100 * m + 0x40 + (n << 3)) + +#define ELE_MAX_MSG 255U +#define AHAB_VERSION 0x6 +#define AHAB_CMD_TAG 0x17 +#define AHAB_RESP_TAG 0xe1 +#define ELE_RELEASE_RDC_REQ 0xc4 +#define ELE_READ_FUSE_REQ 0x97 +#define ELE_OK 0xd6 + +#define FSB_BASE 0x47510000UL +#define FSB_SHADOW_OFF 0x8000UL + +#define BLK_CTRL_NS_ANOMIX_BASE IMX9_BLK_CTRL_NS_AONMIX1_BASE + +#define ELE_MU_TCR (IMX9_S3MUA_BASE+ 0x120) +#define ELE_MU_TSR (IMX9_S3MUA_BASE+ 0x124) +#define ELE_MU_RCR (IMX9_S3MUA_BASE+ 0x128) +#define ELE_MU_RSR (IMX9_S3MUA_BASE+ 0x12c) + +#define ELE_RR_NUM 4 +#define ELE_TR_NUM 8 +#define ELE_MU_TR(i) (IMX9_S3MUA_BASE + 0x200 + (i) * 4) +#define ELE_MU_RR(i) (IMX9_S3MUA_BASE + 0x280 + (i) * 4) + +#define DID_NUM 16 Review Comment: align ALL second column to the same position ########## arch/arm64/src/imx9/imx9_trdc.c: ########## @@ -0,0 +1,938 @@ +/**************************************************************************** + * arch/arm64/src/imx9/imx9_trdc.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <stdint.h> +#include <stdbool.h> +#include <errno.h> +#include <nuttx/arch.h> +#include <nuttx/clock.h> +#include <debug.h> + +#include <arch/board/board.h> + +#include "chip.h" +#include "arm64_internal.h" +#include "imx9_trdc.h" +#include <arch/board/imx9_trdc_config.h> + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define mmio_read_32(c) getreg32(c) +#define mmio_write_32(c, v) putreg32(v, c) +#define mmio_clrbits_32(addr, clear) modifyreg32(addr, clear, 0) +#define mmio_setbits_32(addr, set) modifyreg32(addr, 0, set) +#define mmio_clrsetbits_32(addr, clear, set) modifyreg32(addr, clear, set) + +/* Bits 8:15 rdc id, bits 0:7 core id */ + +#define TRDC_AON 0x7402 Review Comment: align ALL second column ########## arch/arm64/src/imx9/hardware/imx9_trdc.h: ########## @@ -0,0 +1,97 @@ +/**************************************************************************** + * arch/arm64/src/imx9/hardware/imx9_trdc.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM64_SRC_IMX9_HARDWARE_IMX9_TRDC_H +#define __ARCH_ARM64_SRC_IMX9_HARDWARE_IMX9_TRDC_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <hardware/imx9_memorymap.h> + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define IMX9_TRDC_HWCFG0 (IMX9_TRDC_BASE + 0xf0) + +#define IMX9_MBC0_MEM_GLBAC(n) (0x20 + (n << 2)) +#define IMX9_MBC_MEM_BLK_CFG_0(m, n) (0x200 * m + 0x40 + (n << 2)) +#define IMX9_MBC_MEM_BLK_CFG_I(m, n, i) (0x200 * m + 0x40 + (80 << 2) + (i - 1) * 0x28 + (n << 2)) +#define IMX9_MRC0_DOM_RGD_W(m, n) (0x100 * m + 0x40 + (n << 3)) + +#define ELE_MAX_MSG 255U +#define AHAB_VERSION 0x6 +#define AHAB_CMD_TAG 0x17 +#define AHAB_RESP_TAG 0xe1 +#define ELE_RELEASE_RDC_REQ 0xc4 +#define ELE_READ_FUSE_REQ 0x97 Review Comment: ditto -- This is an automated message from the Apache Git Service. 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