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commit 0e1b432dd068880d353ae91c01e610f85b4a16ea Author: hujun5 <[email protected]> AuthorDate: Fri Dec 6 21:32:44 2024 +0800 armv7/8m: fix regresion from https://github.com/apache/nuttx/pull/14881 reason: svc call may trigger hardfault Background The origin of this issue is our desire to eliminate the function of storing "regs" in g_current_regs and instead utilize (*running_task)->xcp.regs for storage. The benefits of this approach include faster storage speed and avoiding multiple accesses to g_current_regs during context switching, thus ensuring that whether returning from an interrupt or an exception, we consistently use this_task()->xcp.regs Issue Encountered However, when storing registers, we must ensure that (running_task)->xcp.regs is invalid so that it can be safely overwritten. According to the existing logic, the only scenario where (running_task)->xcp.regs is valid is during restore_context. We must accurately identify this scenario. Initially, we used the condition (running_task)==NULL for this purpose, but we deemed this approach unsatisfactory as it did not align well with the actual logic. (running_task) should not be NULL. Consequently, we adopted other arch-specific methods for judgment, but due to special logic in some arch, the judgment was not accurate, leading to this issue. Solution: For armv6-m, we haven't found a more suitable solution, so we are sticking with (*running_task)==NULL. For armv7-m/armv8-m, by removing support for primask, we can achieve accurate judgment. PRIMASK is a design in armv6-m, that's why arm introduce BASEPRI from armv7-m. It's wrong to provide this option for armv7-m/armv8-m arch. Signed-off-by: hujun5 <[email protected]> --- arch/Kconfig | 5 --- arch/arm/include/armv7-m/irq.h | 48 +-------------------- arch/arm/include/armv7-m/nvicpri.h | 7 +--- arch/arm/include/armv8-m/irq.h | 48 +-------------------- arch/arm/include/armv8-m/nvicpri.h | 7 +--- arch/arm/include/types.h | 2 +- arch/arm/src/armv7-m/Kconfig | 22 +--------- arch/arm/src/armv7-m/arm_exception.S | 17 +------- arch/arm/src/armv7-m/arm_hardfault.c | 49 +--------------------- arch/arm/src/armv7-m/arm_initialstate.c | 10 ----- arch/arm/src/armv7-m/arm_saveusercontext.S | 4 -- arch/arm/src/armv7-m/arm_schedulesigaction.c | 4 -- arch/arm/src/armv7-m/arm_sigdeliver.c | 12 ------ arch/arm/src/armv7-m/arm_tcbinfo.c | 5 --- arch/arm/src/armv8-m/Kconfig | 19 --------- arch/arm/src/armv8-m/arm_exception.S | 16 ------- arch/arm/src/armv8-m/arm_hardfault.c | 49 +--------------------- arch/arm/src/armv8-m/arm_initialstate.c | 6 --- arch/arm/src/armv8-m/arm_saveusercontext.S | 4 -- arch/arm/src/armv8-m/arm_schedulesigaction.c | 4 -- arch/arm/src/armv8-m/arm_sigdeliver.c | 12 ------ arch/arm/src/armv8-m/arm_tcbinfo.c | 5 --- arch/arm/src/at32/at32_irq.c | 5 +-- arch/arm/src/csk6/csk6_irq.c | 4 -- arch/arm/src/cxd32xx/cxd32_irq.c | 19 --------- arch/arm/src/cxd56xx/cxd56_irq.c | 19 --------- arch/arm/src/efm32/efm32_irq.c | 4 -- arch/arm/src/eoss3/eoss3_irq.c | 4 -- arch/arm/src/gd32f4/gd32f4xx_irq.c | 5 +-- arch/arm/src/imxrt/imxrt_irq.c | 19 +-------- arch/arm/src/kinetis/kinetis_irq.c | 4 -- arch/arm/src/lc823450/lc823450_irq.c | 5 +-- arch/arm/src/lpc17xx_40xx/lpc17_40_irq.c | 5 +-- arch/arm/src/lpc43xx/lpc43_irq.c | 19 +-------- arch/arm/src/lpc54xx/lpc54_irq.c | 18 -------- arch/arm/src/max326xx/common/max326_irq.c | 18 -------- arch/arm/src/mx8mp/mx8mp_irq.c | 19 +-------- arch/arm/src/nrf52/Kconfig | 2 - arch/arm/src/nrf52/nrf52_irq.c | 18 -------- arch/arm/src/nrf53/Kconfig | 1 - arch/arm/src/nrf53/nrf53_irq.c | 18 -------- arch/arm/src/nrf91/nrf91_irq.c | 18 -------- arch/arm/src/s32k1xx/s32k14x/s32k14x_irq.c | 18 -------- arch/arm/src/s32k3xx/s32k3xx_irq.c | 18 -------- arch/arm/src/sam34/sam_irq.c | 19 +-------- arch/arm/src/samd5e5/sam_irq.c | 19 +-------- arch/arm/src/samv7/sam_irq.c | 19 +-------- arch/arm/src/stm32/stm32_irq.c | 5 +-- arch/arm/src/stm32f7/stm32_irq.c | 19 +-------- arch/arm/src/stm32h5/stm32_irq.c | 5 +-- arch/arm/src/stm32h7/stm32_irq.c | 19 +-------- arch/arm/src/stm32l4/stm32l4_irq.c | 5 +-- arch/arm/src/stm32l5/stm32l5_irq.c | 5 +-- arch/arm/src/stm32u5/stm32_irq.c | 5 +-- arch/arm/src/stm32wb/stm32wb_irq.c | 5 +-- arch/arm/src/stm32wl5/stm32wl5_irq.c | 5 +-- arch/arm/src/tiva/common/tiva_irq.c | 5 +-- arch/arm/src/xmc4/xmc4_irq.c | 5 +-- .../arm/cxd56xx/spresense/configs/audio/defconfig | 1 - .../cxd56xx/spresense/configs/audio_sdk/defconfig | 1 - .../arm/cxd56xx/spresense/configs/camera/defconfig | 1 - .../cxd56xx/spresense/configs/charger/defconfig | 1 - boards/arm/cxd56xx/spresense/configs/elf/defconfig | 1 - .../spresense/configs/example_camera/defconfig | 1 - .../spresense/configs/example_lcd/defconfig | 1 - .../cxd56xx/spresense/configs/fmsynth/defconfig | 1 - boards/arm/cxd56xx/spresense/configs/lcd/defconfig | 1 - boards/arm/cxd56xx/spresense/configs/lte/defconfig | 1 - .../arm/cxd56xx/spresense/configs/module/defconfig | 1 - boards/arm/cxd56xx/spresense/configs/mpy/defconfig | 1 - boards/arm/cxd56xx/spresense/configs/nsh/defconfig | 1 - .../spresense/configs/nsh_automount/defconfig | 1 - .../cxd56xx/spresense/configs/nsh_trace/defconfig | 1 - .../spresense/configs/posix_spawn/defconfig | 1 - .../arm/cxd56xx/spresense/configs/rndis/defconfig | 1 - .../spresense/configs/rndis_composite/defconfig | 1 - .../cxd56xx/spresense/configs/rndis_smp/defconfig | 1 - boards/arm/cxd56xx/spresense/configs/smp/defconfig | 1 - .../arm/cxd56xx/spresense/configs/usbmsc/defconfig | 1 - .../arm/cxd56xx/spresense/configs/usbnsh/defconfig | 1 - .../arm/cxd56xx/spresense/configs/wifi/defconfig | 1 - .../cxd56xx/spresense/configs/wifi_smp/defconfig | 1 - .../imxrt/imxrt1020-evk/configs/netnsh/defconfig | 1 - .../arm/imxrt/imxrt1020-evk/configs/nsh/defconfig | 1 - .../imxrt/imxrt1020-evk/configs/usdhc/defconfig | 1 - .../arm/imxrt/imxrt1050-evk/configs/knsh/defconfig | 1 - .../imxrt/imxrt1050-evk/configs/netnsh/defconfig | 1 - .../arm/imxrt/imxrt1050-evk/configs/nsh/defconfig | 1 - .../arm/imxrt/imxrt1060-evk/configs/can/defconfig | 1 - .../imxrt/imxrt1060-evk/configs/canfd/defconfig | 1 - .../arm/imxrt/imxrt1060-evk/configs/knsh/defconfig | 1 - .../arm/imxrt/imxrt1060-evk/configs/lvgl/defconfig | 1 - .../imxrt/imxrt1060-evk/configs/netnsh/defconfig | 1 - .../configs/netnsh_dcache_wb/defconfig | 1 - .../arm/imxrt/imxrt1060-evk/configs/nsh/defconfig | 1 - .../imxrt/imxrt1060-evk/configs/nshocram/defconfig | 1 - .../arm/imxrt/imxrt1064-evk/configs/can/defconfig | 1 - .../imxrt/imxrt1064-evk/configs/canfd/defconfig | 1 - .../arm/imxrt/imxrt1064-evk/configs/knsh/defconfig | 1 - .../arm/imxrt/imxrt1064-evk/configs/lvgl/defconfig | 1 - .../imxrt1064-evk/configs/mcuboot-app/defconfig | 1 - .../imxrt1064-evk/configs/mcuboot-loader/defconfig | 1 - .../imxrt/imxrt1064-evk/configs/netnsh/defconfig | 1 - .../arm/imxrt/imxrt1064-evk/configs/nsh/defconfig | 1 - .../imxrt/imxrt1064-evk/configs/nshocram/defconfig | 1 - .../arm/imxrt/imxrt1170-evk/configs/can/defconfig | 1 - .../imxrt/imxrt1170-evk/configs/canfd/defconfig | 1 - .../arm/imxrt/imxrt1170-evk/configs/knsh/defconfig | 1 - .../imxrt/imxrt1170-evk/configs/netnsh/defconfig | 1 - .../arm/imxrt/imxrt1170-evk/configs/nsh/defconfig | 1 - .../arm/imxrt/teensy-4.x/configs/can-4.1/defconfig | 1 - .../arm/imxrt/teensy-4.x/configs/enc-4.1/defconfig | 1 - .../arm/imxrt/teensy-4.x/configs/lcd-4.1/defconfig | 1 - .../arm/imxrt/teensy-4.x/configs/lua-4.1/defconfig | 1 - .../imxrt/teensy-4.x/configs/netnsh-4.1/defconfig | 1 - .../arm/imxrt/teensy-4.x/configs/nsh-4.0/defconfig | 1 - .../arm/imxrt/teensy-4.x/configs/nsh-4.1/defconfig | 1 - .../imxrt/teensy-4.x/configs/pikron-bb/defconfig | 1 - .../arm/imxrt/teensy-4.x/configs/pwm-4.1/defconfig | 1 - .../arm/imxrt/teensy-4.x/configs/sd-4.1/defconfig | 1 - .../kinetis/freedom-k66f/configs/netnsh/defconfig | 1 - .../arm/kinetis/freedom-k66f/configs/nsh/defconfig | 1 - .../max326xx/max32660-evsys/configs/nsh/defconfig | 1 - boards/arm/mps/mps2-an500/configs/nsh/defconfig | 1 - boards/arm/mps/mps3-an547/configs/ap/defconfig | 1 - boards/arm/mps/mps3-an547/configs/clang/defconfig | 1 - boards/arm/mps/mps3-an547/configs/gcov/defconfig | 1 - boards/arm/mps/mps3-an547/configs/nsh/defconfig | 1 - boards/arm/sam34/sam3u-ek/configs/nx/defconfig | 1 - .../sam34/sam4s-xplained-pro/configs/fs/defconfig | 1 - .../sam34/sam4s-xplained-pro/configs/nsh/defconfig | 1 - .../arm/samv7/samv71-xult/configs/module/defconfig | 1 - .../arm/stm32/nucleo-f412zg/configs/nsh/defconfig | 1 - .../stm32/olimex-stm32-p407/configs/kelf/defconfig | 1 - .../olimex-stm32-p407/configs/kmodule/defconfig | 1 - .../olimex-stm32-p407/configs/module/defconfig | 1 - .../stm32/stm32f4discovery/configs/elf/defconfig | 1 - .../arm/stm32f7/stm32f746-ws/configs/nsh/defconfig | 1 - .../stm32u5/b-u585i-iot02a/configs/nsh/defconfig | 1 - .../stm32u5/nucleo-u5a5zj-q/configs/nsh/defconfig | 1 - .../arm/tiva/launchxl-cc1310/configs/nsh/defconfig | 1 - .../tiva/launchxl-cc1312r1/configs/nsh/defconfig | 1 - 142 files changed, 30 insertions(+), 809 deletions(-) diff --git a/arch/Kconfig b/arch/Kconfig index 5d1dbc32af..6df062e5a2 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -1279,11 +1279,6 @@ config ARCH_HIPRI_INTERRUPT is extended to any other family, then this discussion will have to be generalized. - If ARMV7M_USEBASEPRI is selected, then interrupts will be disabled - by setting the BASEPRI register to NVIC_SYSH_DISABLE_PRIORITY so - that most interrupts will not have execution priority. SVCall must - have execution priority in all cases. - In the normal cases, interrupts are not nest-able and all interrupts run at an execution priority between NVIC_SYSH_PRIORITY_MIN and NVIC_SYSH_PRIORITY_MAX (with NVIC_SYSH_PRIORITY_MAX reserved for diff --git a/arch/arm/include/armv7-m/irq.h b/arch/arm/include/armv7-m/irq.h index 95dab513cd..2c5bd03f77 100644 --- a/arch/arm/include/armv7-m/irq.h +++ b/arch/arm/include/armv7-m/irq.h @@ -65,11 +65,7 @@ */ #define REG_R13 (0) /* R13 = SP at time of interrupt */ -#ifdef CONFIG_ARMV7M_USEBASEPRI -# define REG_BASEPRI (1) /* BASEPRI */ -#else -# define REG_PRIMASK (1) /* PRIMASK */ -#endif +#define REG_BASEPRI (1) /* BASEPRI */ #define REG_R4 (2) /* R4 */ #define REG_R5 (3) /* R5 */ #define REG_R6 (4) /* R6 */ @@ -385,13 +381,9 @@ static inline void raisebasepri(uint32_t basepri) static inline void up_irq_disable(void) always_inline_function; static inline void up_irq_disable(void) { -#ifdef CONFIG_ARMV7M_USEBASEPRI /* Probably raising priority */ raisebasepri(NVIC_SYSH_DISABLE_PRIORITY); -#else - __asm__ __volatile__ ("\tcpsid i\n"); -#endif } /* Save the current primask state & disable IRQs */ @@ -400,31 +392,11 @@ static inline irqstate_t up_irq_save(void) always_inline_function noinstrument_function; static inline irqstate_t up_irq_save(void) { -#ifdef CONFIG_ARMV7M_USEBASEPRI /* Probably raising priority */ uint8_t basepri = getbasepri(); raisebasepri(NVIC_SYSH_DISABLE_PRIORITY); return (irqstate_t)basepri; - -#else - - unsigned short primask; - - /* Return the current value of primask register and set - * bit 0 of the primask register to disable interrupts - */ - - __asm__ __volatile__ - ( - "\tmrs %0, primask\n" - "\tcpsid i\n" - : "=r" (primask) - : - : "memory"); - - return primask; -#endif } /* Enable IRQs */ @@ -444,27 +416,9 @@ static inline void up_irq_restore(irqstate_t flags) always_inline_function noinstrument_function; static inline void up_irq_restore(irqstate_t flags) { -#ifdef CONFIG_ARMV7M_USEBASEPRI /* In this case, we are always retaining or lowering the priority value */ setbasepri((uint32_t)flags); - -#else - /* If bit 0 of the primask is 0, then we need to restore - * interrupts. - */ - - __asm__ __volatile__ - ( - "\ttst %0, #1\n" - "\tbne.n 1f\n" - "\tcpsie i\n" - "1:\n" - : - : "r" (flags) - : "cc", "memory"); - -#endif } /* Get/set IPSR */ diff --git a/arch/arm/include/armv7-m/nvicpri.h b/arch/arm/include/armv7-m/nvicpri.h index f745cb6e46..401487b91d 100644 --- a/arch/arm/include/armv7-m/nvicpri.h +++ b/arch/arm/include/armv7-m/nvicpri.h @@ -33,12 +33,7 @@ * Pre-processor Prototypes ****************************************************************************/ -/* If CONFIG_ARMV7M_USEBASEPRI is selected, then interrupts will be disabled - * by setting the BASEPRI register to NVIC_SYSH_DISABLE_PRIORITY so that most - * interrupts will not have execution priority. SVCall must have execution - * priority in all cases. - * - * In the normal cases, interrupts are not nest-able and all interrupts run +/* In the normal cases, interrupts are not nest-able and all interrupts run * at an execution priority between NVIC_SYSH_PRIORITY_MIN and * NVIC_SYSH_PRIORITY_MAX (with NVIC_SYSH_PRIORITY_MAX reserved for SVCall). * diff --git a/arch/arm/include/armv8-m/irq.h b/arch/arm/include/armv8-m/irq.h index f770cd24f5..c2a9ff07bd 100644 --- a/arch/arm/include/armv8-m/irq.h +++ b/arch/arm/include/armv8-m/irq.h @@ -65,11 +65,7 @@ */ #define REG_R13 (0) /* R13 = SP at time of interrupt */ -#ifdef CONFIG_ARMV8M_USEBASEPRI -# define REG_BASEPRI (1) /* BASEPRI */ -#else -# define REG_PRIMASK (1) /* PRIMASK */ -#endif +#define REG_BASEPRI (1) /* BASEPRI */ #define REG_R4 (2) /* R4 */ #define REG_R5 (3) /* R5 */ #define REG_R6 (4) /* R6 */ @@ -358,13 +354,9 @@ static inline void setbasepri(uint32_t basepri) static inline void up_irq_disable(void) always_inline_function; static inline void up_irq_disable(void) { -#ifdef CONFIG_ARMV8M_USEBASEPRI /* Probably raising priority */ raisebasepri(NVIC_SYSH_DISABLE_PRIORITY); -#else - __asm__ __volatile__ ("\tcpsid i\n"); -#endif } /* Save the current primask state & disable IRQs */ @@ -373,31 +365,11 @@ static inline irqstate_t up_irq_save(void) always_inline_function noinstrument_function; static inline irqstate_t up_irq_save(void) { -#ifdef CONFIG_ARMV8M_USEBASEPRI /* Probably raising priority */ uint8_t basepri = getbasepri(); raisebasepri(NVIC_SYSH_DISABLE_PRIORITY); return (irqstate_t)basepri; - -#else - - unsigned short primask; - - /* Return the current value of primask register and set - * bit 0 of the primask register to disable interrupts - */ - - __asm__ __volatile__ - ( - "\tmrs %0, primask\n" - "\tcpsid i\n" - : "=r" (primask) - : - : "memory"); - - return primask; -#endif } /* Enable IRQs */ @@ -417,27 +389,9 @@ static inline void up_irq_restore(irqstate_t flags) always_inline_function noinstrument_function; static inline void up_irq_restore(irqstate_t flags) { -#ifdef CONFIG_ARMV8M_USEBASEPRI /* In this case, we are always retaining or lowering the priority value */ setbasepri((uint32_t)flags); - -#else - /* If bit 0 of the primask is 0, then we need to restore - * interrupts. - */ - - __asm__ __volatile__ - ( - "\ttst %0, #1\n" - "\tbne.n 1f\n" - "\tcpsie i\n" - "1:\n" - : - : "r" (flags) - : "cc", "memory"); - -#endif } /* Get/set IPSR */ diff --git a/arch/arm/include/armv8-m/nvicpri.h b/arch/arm/include/armv8-m/nvicpri.h index 7e5e404f51..35a7707623 100644 --- a/arch/arm/include/armv8-m/nvicpri.h +++ b/arch/arm/include/armv8-m/nvicpri.h @@ -33,12 +33,7 @@ * Pre-processor Prototypes ****************************************************************************/ -/* If CONFIG_ARMV8M_USEBASEPRI is selected, then interrupts will be disabled - * by setting the BASEPRI register to NVIC_SYSH_DISABLE_PRIORITY so that most - * interrupts will not have execution priority. SVCall must have execution - * priority in all cases. - * - * In the normal cases, interrupts are not nest-able and all interrupts run +/* In the normal cases, interrupts are not nest-able and all interrupts run * at an execution priority between NVIC_SYSH_PRIORITY_MIN and * NVIC_SYSH_PRIORITY_MAX (with NVIC_SYSH_PRIORITY_MAX reserved for SVCall). * diff --git a/arch/arm/include/types.h b/arch/arm/include/types.h index b549570dcf..5974189157 100644 --- a/arch/arm/include/types.h +++ b/arch/arm/include/types.h @@ -112,7 +112,7 @@ typedef unsigned int _size_t; */ #ifdef __thumb2__ -#if defined(CONFIG_ARMV7M_USEBASEPRI) || defined(CONFIG_ARCH_ARMV6M) || defined(CONFIG_ARMV8M_USEBASEPRI) +#if defined(CONFIG_ARCH_ARMV6M) || defined(CONFIG_ARCH_ARMV7M) || defined(CONFIG_ARCH_ARMV8M) typedef unsigned char irqstate_t; #else typedef unsigned short irqstate_t; diff --git a/arch/arm/src/armv7-m/Kconfig b/arch/arm/src/armv7-m/Kconfig index b68e8ae5db..0dbf6a342a 100644 --- a/arch/arm/src/armv7-m/Kconfig +++ b/arch/arm/src/armv7-m/Kconfig @@ -13,30 +13,10 @@ config ARMV7M_HAVE_DCACHE bool default n -config ARMV7M_USEBASEPRI - bool "Use BASEPRI Register" - default ARCH_HIPRI_INTERRUPT - depends on ARCH_CORTEXM3 || ARCH_CORTEXM4 || ARCH_CORTEXM7 - ---help--- - Use the BASEPRI register to enable and disable interrupts. By - default, the PRIMASK register is used for this purpose. This - usually results in hardfaults when supervisor calls are made. - Though, these hardfaults are properly handled by the RTOS, the - hardfaults can confuse some debuggers. With the BASEPRI - register, these hardfaults, will be avoided. For more details see - https://cwiki.apache.org/confluence/display/NUTTX/ARMv7-M+Hardfaults%2C+SVCALL%2C+and+Debuggers - - WARNING: If CONFIG_ARCH_HIPRI_INTERRUPT is selected, then you - MUST select CONFIG_ARMV7M_USEBASEPRI. The Kconfig dependencies - here will permit to select an invalid configuration because it - cannot enforce that requirement. If you create this invalid - configuration, you will encounter some problems that may be - very difficult to debug. - config ARMV7M_BASEPRI_WAR bool "Cortex-M7 r0p1 Errata 837070 Workaround" default n - depends on ARMV7M_USEBASEPRI && ARCH_CORTEXM7 + depends on ARCH_CORTEXM7 ---help--- Enable workaround for r0p1 Errata 837070: Increasing priority using write to BASEPRI does not take effect immediately. diff --git a/arch/arm/src/armv7-m/arm_exception.S b/arch/arm/src/armv7-m/arm_exception.S index 2545c26837..9da545d066 100644 --- a/arch/arm/src/armv7-m/arm_exception.S +++ b/arch/arm/src/armv7-m/arm_exception.S @@ -71,14 +71,6 @@ # if defined(CONFIG_BUILD_PROTECTED) && CONFIG_ARCH_INTERRUPTSTACK < 8 # error Interrupt stack must be used with high priority interrupts in protected mode -# endif - - /* Use the BASEPRI to control interrupts is required if nested, high - * priority interrupts are supported. - */ - -# ifndef CONFIG_ARMV7M_USEBASEPRI -# error CONFIG_ARMV7M_USEBASEPRI must be used with CONFIG_ARCH_HIPRI_INTERRUPT # endif #endif @@ -151,11 +143,8 @@ exception_common: mov r2, r1 /* R2=Copy of the main/process stack pointer */ add r2, #HW_XCPT_SIZE /* R2=MSP/PSP before the interrupt was taken */ /* (ignoring the xPSR[9] alignment bit) */ -#ifdef CONFIG_ARMV7M_USEBASEPRI + mrs r3, basepri /* R3=Current BASEPRI setting */ -#else - mrs r3, primask /* R3=Current PRIMASK setting */ -#endif #ifdef CONFIG_ARCH_FPU @@ -237,11 +226,7 @@ exception_common: /* Restore the interrupt state */ -#ifdef CONFIG_ARMV7M_USEBASEPRI msr basepri, r3 /* Restore interrupts priority masking */ -#else - msr primask, r3 /* Restore interrupts */ -#endif msr control, r12 /* Restore control */ diff --git a/arch/arm/src/armv7-m/arm_hardfault.c b/arch/arm/src/armv7-m/arm_hardfault.c index a91dbd1811..3c1c79c9fe 100644 --- a/arch/arm/src/armv7-m/arm_hardfault.c +++ b/arch/arm/src/armv7-m/arm_hardfault.c @@ -42,10 +42,6 @@ * Pre-processor Definitions ****************************************************************************/ -/* If CONFIG_ARMV7M_USEBASEPRI=n, then debug output from this file may - * interfere with context switching! - */ - #ifdef CONFIG_DEBUG_HARDFAULT_ALERT # define hfalert(format, ...) _alert(format, ##__VA_ARGS__) #else @@ -79,50 +75,7 @@ int arm_hardfault(int irq, void *context, void *arg) uint32_t cfsr = getreg32(NVIC_CFAULTS); UNUSED(cfsr); - - /* Get the value of the program counter where the fault occurred */ - -#ifndef CONFIG_ARMV7M_USEBASEPRI - uint32_t *regs = (uint32_t *)context; - uint16_t *pc = (uint16_t *)regs[REG_PC] - 1; - - /* Check if the pc lies in known FLASH memory. - * REVISIT: What if the PC lies in "unknown" external memory? Best - * use the BASEPRI register if you have external memory. - */ - -#ifdef CONFIG_BUILD_PROTECTED - /* In the kernel build, SVCalls are expected in either the base, kernel - * FLASH region or in the user FLASH region. - */ - - if (((uintptr_t)pc >= (uintptr_t)_START_TEXT && - (uintptr_t)pc < (uintptr_t)_END_TEXT) || - ((uintptr_t)pc >= (uintptr_t)USERSPACE->us_textstart && - (uintptr_t)pc < (uintptr_t)USERSPACE->us_textend)) -#else - /* SVCalls are expected only from the base, kernel FLASH region */ - - if ((uintptr_t)pc >= (uintptr_t)_START_TEXT && - (uintptr_t)pc < (uintptr_t)_END_TEXT) -#endif - { - /* Fetch the instruction that caused the Hard fault */ - - uint16_t insn = *pc; - hfinfo(" PC: %p INSN: %04x\n", pc, insn); - - /* If this was the instruction 'svc 0', then forward processing - * to the SVCall handler - */ - - if (insn == INSN_SVC0) - { - hfinfo("Forward SVCall\n"); - return arm_svcall(irq, context, arg); - } - } -#endif + UNUSED(hfsr); if (hfsr & NVIC_HFAULTS_FORCED) { diff --git a/arch/arm/src/armv7-m/arm_initialstate.c b/arch/arm/src/armv7-m/arm_initialstate.c index 36c5a96cb8..0cab69f30d 100644 --- a/arch/arm/src/armv7-m/arm_initialstate.c +++ b/arch/arm/src/armv7-m/arm_initialstate.c @@ -161,19 +161,9 @@ void up_initial_state(struct tcb_s *tcb) /* Enable or disable interrupts, based on user configuration */ #ifdef CONFIG_SUPPRESS_INTERRUPTS - -#ifdef CONFIG_ARMV7M_USEBASEPRI xcp->regs[REG_BASEPRI] = NVIC_SYSH_DISABLE_PRIORITY; -#else - xcp->regs[REG_PRIMASK] = 1; -#endif - #else /* CONFIG_SUPPRESS_INTERRUPTS */ - -#ifdef CONFIG_ARMV7M_USEBASEPRI xcp->regs[REG_BASEPRI] = 0; -#endif - #endif /* CONFIG_SUPPRESS_INTERRUPTS */ } diff --git a/arch/arm/src/armv7-m/arm_saveusercontext.S b/arch/arm/src/armv7-m/arm_saveusercontext.S index a62136f517..52e2af3e31 100644 --- a/arch/arm/src/armv7-m/arm_saveusercontext.S +++ b/arch/arm/src/armv7-m/arm_saveusercontext.S @@ -91,11 +91,7 @@ up_saveusercontext: /* Save r13, primask, r4~r11 */ mov r2, sp -#ifdef CONFIG_ARMV7M_USEBASEPRI mrs r3, basepri -#else - mrs r3, primask -#endif stmia r0!, {r2-r11} /* Save EXC_RETURN to 0xffffffff */ diff --git a/arch/arm/src/armv7-m/arm_schedulesigaction.c b/arch/arm/src/armv7-m/arm_schedulesigaction.c index 2544267489..ad430e4468 100644 --- a/arch/arm/src/armv7-m/arm_schedulesigaction.c +++ b/arch/arm/src/armv7-m/arm_schedulesigaction.c @@ -138,11 +138,7 @@ void up_schedule_sigaction(struct tcb_s *tcb) */ tcb->xcp.regs[REG_PC] = (uint32_t)arm_sigdeliver; -#ifdef CONFIG_ARMV7M_USEBASEPRI tcb->xcp.regs[REG_BASEPRI] = NVIC_SYSH_DISABLE_PRIORITY; -#else - tcb->xcp.regs[REG_PRIMASK] = 1; -#endif tcb->xcp.regs[REG_XPSR] = ARMV7M_XPSR_T; #ifdef CONFIG_BUILD_PROTECTED tcb->xcp.regs[REG_LR] = EXC_RETURN_THREAD; diff --git a/arch/arm/src/armv7-m/arm_sigdeliver.c b/arch/arm/src/armv7-m/arm_sigdeliver.c index 171fe29598..7dff72944b 100644 --- a/arch/arm/src/armv7-m/arm_sigdeliver.c +++ b/arch/arm/src/armv7-m/arm_sigdeliver.c @@ -89,11 +89,7 @@ retry: while (rtcb->irqcount > 0) { -#ifdef CONFIG_ARMV7M_USEBASEPRI leave_critical_section((uint8_t)regs[REG_BASEPRI]); -#else - leave_critical_section((uint16_t)regs[REG_PRIMASK]); -#endif } #endif /* CONFIG_SMP */ @@ -139,11 +135,7 @@ retry: (rtcb->flags & TCB_FLAG_SIGNAL_ACTION) == 0) { #ifdef CONFIG_SMP -# ifdef CONFIG_ARMV7M_USEBASEPRI leave_critical_section((uint8_t)regs[REG_BASEPRI]); -# else - leave_critical_section((uint16_t)regs[REG_PRIMASK]); -# endif #endif goto retry; } @@ -169,11 +161,7 @@ retry: /* We need to keep the IRQ lock until task switching */ rtcb->irqcount++; -#ifdef CONFIG_ARMV7M_USEBASEPRI leave_critical_section((uint8_t)regs[REG_BASEPRI]); -#else - leave_critical_section((uint16_t)regs[REG_PRIMASK]); -#endif rtcb->irqcount--; #endif diff --git a/arch/arm/src/armv7-m/arm_tcbinfo.c b/arch/arm/src/armv7-m/arm_tcbinfo.c index abb0598ebc..663c519ffd 100644 --- a/arch/arm/src/armv7-m/arm_tcbinfo.c +++ b/arch/arm/src/armv7-m/arm_tcbinfo.c @@ -57,13 +57,8 @@ static const uint16_t g_reg_offs[] = #if 0 UINT16_MAX, /* msp */ TCB_REG_OFF(REG_R13), -# ifdef CONFIG_ARMV7M_USEBASEPRI UINT16_MAX, /* primask */ TCB_REG_OFF(REG_BASEPRI), -# else - TCB_REG_OFF(REG_PRIMASK), - UINT16_MAX, /* basepri */ -# endif UINT16_MAX, /* faultmask */ UINT16_MAX, /* control */ diff --git a/arch/arm/src/armv8-m/Kconfig b/arch/arm/src/armv8-m/Kconfig index 7e86e82279..b0b06a3477 100644 --- a/arch/arm/src/armv8-m/Kconfig +++ b/arch/arm/src/armv8-m/Kconfig @@ -13,25 +13,6 @@ config ARMV8M_HAVE_DCACHE bool default n -config ARMV8M_USEBASEPRI - bool "Use BASEPRI Register" - default ARCH_HIPRI_INTERRUPT - ---help--- - Use the BASEPRI register to enable and disable interrupts. By - default, the PRIMASK register is used for this purpose. This - usually results in hardfaults when supervisor calls are made. - Though, these hardfaults are properly handled by the RTOS, the - hardfaults can confuse some debuggers. With the BASEPRI - register, these hardfaults, will be avoided. For more details see - https://cwiki.apache.org/confluence/display/NUTTX/ARMv7-M+Hardfaults%2C+SVCALL%2C+and+Debuggers - - WARNING: If CONFIG_ARCH_HIPRI_INTERRUPT is selected, then you - MUST select CONFIG_ARMV8M_USEBASEPRI. The Kconfig dependencies - here will permit to select an invalid configuration because it - cannot enforce that requirement. If you create this invalid - configuration, you will encounter some problems that may be - very difficult to debug. - config ARMV8M_ICACHE bool "Use I-Cache" default n diff --git a/arch/arm/src/armv8-m/arm_exception.S b/arch/arm/src/armv8-m/arm_exception.S index e2e7698779..b2bc30f876 100644 --- a/arch/arm/src/armv8-m/arm_exception.S +++ b/arch/arm/src/armv8-m/arm_exception.S @@ -72,14 +72,6 @@ # if defined(CONFIG_BUILD_PROTECTED) && CONFIG_ARCH_INTERRUPTSTACK < 8 # error Interrupt stack must be used with high priority interrupts in protected mode -# endif - - /* Use the BASEPRI to control interrupts is required if nested, high - * priority interrupts are supported. - */ - -# ifndef CONFIG_ARMV8M_USEBASEPRI -# error CONFIG_ARMV8M_USEBASEPRI must be used with CONFIG_ARCH_HIPRI_INTERRUPT # endif #endif @@ -154,11 +146,7 @@ exception_common: stmdb r1!, {r0} #endif -#ifdef CONFIG_ARMV8M_USEBASEPRI mrs r3, basepri /* R3=Current BASEPRI setting */ -#else - mrs r3, primask /* R3=Current PRIMASK setting */ -#endif #ifdef CONFIG_ARCH_FPU @@ -258,11 +246,7 @@ exception_common: /* Restore the interrupt state */ -#ifdef CONFIG_ARMV8M_USEBASEPRI msr basepri, r3 /* Restore interrupts priority masking */ -#else - msr primask, r3 /* Restore interrupts */ -#endif msr control, r12 diff --git a/arch/arm/src/armv8-m/arm_hardfault.c b/arch/arm/src/armv8-m/arm_hardfault.c index 28f13e4b1b..2a64277085 100644 --- a/arch/arm/src/armv8-m/arm_hardfault.c +++ b/arch/arm/src/armv8-m/arm_hardfault.c @@ -42,10 +42,6 @@ * Pre-processor Definitions ****************************************************************************/ -/* If CONFIG_ARMV8M_USEBASEPRI=n, then debug output from this file may - * interfere with context switching! - */ - #ifdef CONFIG_DEBUG_HARDFAULT_ALERT # define hfalert(format, ...) _alert(format, ##__VA_ARGS__) #else @@ -82,50 +78,7 @@ int arm_hardfault(int irq, void *context, void *arg) #endif /* CONFIG_DEBUG_SECUREFAULT */ UNUSED(cfsr); - - /* Get the value of the program counter where the fault occurred */ - -#ifndef CONFIG_ARMV8M_USEBASEPRI - uint32_t *regs = (uint32_t *)context; - uint16_t *pc = (uint16_t *)regs[REG_PC] - 1; - - /* Check if the pc lies in known FLASH memory. - * REVISIT: What if the PC lies in "unknown" external memory? Best - * use the BASEPRI register if you have external memory. - */ - -#ifdef CONFIG_BUILD_PROTECTED - /* In the kernel build, SVCalls are expected in either the base, kernel - * FLASH region or in the user FLASH region. - */ - - if (((uintptr_t)pc >= (uintptr_t)_START_TEXT && - (uintptr_t)pc < (uintptr_t)_END_TEXT) || - ((uintptr_t)pc >= (uintptr_t)USERSPACE->us_textstart && - (uintptr_t)pc < (uintptr_t)USERSPACE->us_textend)) -#else - /* SVCalls are expected only from the base, kernel FLASH region */ - - if ((uintptr_t)pc >= (uintptr_t)_START_TEXT && - (uintptr_t)pc < (uintptr_t)_END_TEXT) -#endif - { - /* Fetch the instruction that caused the Hard fault */ - - uint16_t insn = *pc; - hfinfo(" PC: %p INSN: %04x\n", pc, insn); - - /* If this was the instruction 'svc 0', then forward processing - * to the SVCall handler - */ - - if (insn == INSN_SVC0) - { - hfinfo("Forward SVCall\n"); - return arm_svcall(irq, context, arg); - } - } -#endif + UNUSED(hfsr); if (hfsr & NVIC_HFAULTS_FORCED) { diff --git a/arch/arm/src/armv8-m/arm_initialstate.c b/arch/arm/src/armv8-m/arm_initialstate.c index 1f78727634..162335b9d6 100644 --- a/arch/arm/src/armv8-m/arm_initialstate.c +++ b/arch/arm/src/armv8-m/arm_initialstate.c @@ -168,17 +168,11 @@ void up_initial_state(struct tcb_s *tcb) #ifdef CONFIG_SUPPRESS_INTERRUPTS -#ifdef CONFIG_ARMV8M_USEBASEPRI xcp->regs[REG_BASEPRI] = NVIC_SYSH_DISABLE_PRIORITY; -#else - xcp->regs[REG_PRIMASK] = 1; -#endif #else /* CONFIG_SUPPRESS_INTERRUPTS */ -#ifdef CONFIG_ARMV8M_USEBASEPRI xcp->regs[REG_BASEPRI] = 0; -#endif #endif /* CONFIG_SUPPRESS_INTERRUPTS */ } diff --git a/arch/arm/src/armv8-m/arm_saveusercontext.S b/arch/arm/src/armv8-m/arm_saveusercontext.S index cffae1aecd..5b49df6aac 100644 --- a/arch/arm/src/armv8-m/arm_saveusercontext.S +++ b/arch/arm/src/armv8-m/arm_saveusercontext.S @@ -83,11 +83,7 @@ up_saveusercontext: /* Save r13, primask, r4~r11 */ mov r2, sp -#ifdef CONFIG_ARMV7M_USEBASEPRI mrs r3, basepri -#else - mrs r3, primask -#endif stmia r0!, {r2-r11} /* Save EXC_RETURN to 0xffffffff */ diff --git a/arch/arm/src/armv8-m/arm_schedulesigaction.c b/arch/arm/src/armv8-m/arm_schedulesigaction.c index 3b9c0ce70f..523082806c 100644 --- a/arch/arm/src/armv8-m/arm_schedulesigaction.c +++ b/arch/arm/src/armv8-m/arm_schedulesigaction.c @@ -138,11 +138,7 @@ void up_schedule_sigaction(struct tcb_s *tcb) */ tcb->xcp.regs[REG_PC] = (uint32_t)arm_sigdeliver; -#ifdef CONFIG_ARMV8M_USEBASEPRI tcb->xcp.regs[REG_BASEPRI] = NVIC_SYSH_DISABLE_PRIORITY; -#else - tcb->xcp.regs[REG_PRIMASK] = 1; -#endif tcb->xcp.regs[REG_XPSR] = ARMV8M_XPSR_T; #ifdef CONFIG_BUILD_PROTECTED tcb->xcp.regs[REG_LR] = EXC_RETURN_THREAD; diff --git a/arch/arm/src/armv8-m/arm_sigdeliver.c b/arch/arm/src/armv8-m/arm_sigdeliver.c index 707ce7d528..6f5e91814f 100644 --- a/arch/arm/src/armv8-m/arm_sigdeliver.c +++ b/arch/arm/src/armv8-m/arm_sigdeliver.c @@ -89,11 +89,7 @@ retry: while (rtcb->irqcount > 0) { -#ifdef CONFIG_ARMV8M_USEBASEPRI leave_critical_section((uint8_t)regs[REG_BASEPRI]); -#else - leave_critical_section((uint16_t)regs[REG_PRIMASK]); -#endif } #endif /* CONFIG_SMP */ @@ -139,11 +135,7 @@ retry: (rtcb->flags & TCB_FLAG_SIGNAL_ACTION) == 0) { #ifdef CONFIG_SMP -# ifdef CONFIG_ARMV8M_USEBASEPRI leave_critical_section((uint8_t)regs[REG_BASEPRI]); -# else - leave_critical_section((uint16_t)regs[REG_PRIMASK]); -# endif #endif goto retry; } @@ -169,11 +161,7 @@ retry: /* We need to keep the IRQ lock until task switching */ rtcb->irqcount++; -#ifdef CONFIG_ARMV8M_USEBASEPRI leave_critical_section((uint8_t)regs[REG_BASEPRI]); -#else - leave_critical_section((uint16_t)regs[REG_PRIMASK]); -#endif rtcb->irqcount--; #endif diff --git a/arch/arm/src/armv8-m/arm_tcbinfo.c b/arch/arm/src/armv8-m/arm_tcbinfo.c index e07c460e5a..f24a160977 100644 --- a/arch/arm/src/armv8-m/arm_tcbinfo.c +++ b/arch/arm/src/armv8-m/arm_tcbinfo.c @@ -57,13 +57,8 @@ static const uint16_t g_reg_offs[] = #if 0 UINT16_MAX, /* msp */ TCB_REG_OFF(REG_R13), -# ifdef CONFIG_ARMV8M_USEBASEPRI UINT16_MAX, /* primask */ TCB_REG_OFF(REG_BASEPRI), -# else - TCB_REG_OFF(REG_PRIMASK), - UINT16_MAX, /* basepri */ -# endif UINT16_MAX, /* faultmask */ UINT16_MAX, /* control */ diff --git a/arch/arm/src/at32/at32_irq.c b/arch/arm/src/at32/at32_irq.c index dac55b0369..96f11fb247 100644 --- a/arch/arm/src/at32/at32_irq.c +++ b/arch/arm/src/at32/at32_irq.c @@ -183,7 +183,6 @@ static int at32_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV7M_USEBASEPRI static inline void at32_prioritize_syscall(int priority) { uint32_t regval; @@ -195,7 +194,6 @@ static inline void at32_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Name: at32_irqinfo @@ -328,9 +326,8 @@ void up_irqinitialize(void) #ifdef CONFIG_ARCH_IRQPRIO /* up_prioritize_irq(AT32_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */ #endif -#ifdef CONFIG_ARMV7M_USEBASEPRI + at32_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif /* If the MPU is enabled, then attach and enable the Memory Management * Fault handler. diff --git a/arch/arm/src/csk6/csk6_irq.c b/arch/arm/src/csk6/csk6_irq.c index 415a4ae6b8..5303695251 100644 --- a/arch/arm/src/csk6/csk6_irq.c +++ b/arch/arm/src/csk6/csk6_irq.c @@ -87,7 +87,6 @@ static int csk6_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV8M_USEBASEPRI static inline void csk6_prioritize_syscall(int priority) { uint32_t regval; @@ -99,7 +98,6 @@ static inline void csk6_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Public Functions @@ -180,9 +178,7 @@ void up_irqinitialize(void) /* up_prioritize_irq(CSK6_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */ #endif -#ifdef CONFIG_ARMV8M_USEBASEPRI csk6_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif /* If the MPU is enabled, then attach and enable the Memory Management * Fault handler. diff --git a/arch/arm/src/cxd32xx/cxd32_irq.c b/arch/arm/src/cxd32xx/cxd32_irq.c index c16f52556e..174b998f6a 100644 --- a/arch/arm/src/cxd32xx/cxd32_irq.c +++ b/arch/arm/src/cxd32xx/cxd32_irq.c @@ -154,7 +154,6 @@ static int cxd32_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV7M_USEBASEPRI static inline void cxd32_prioritize_syscall(int priority) { uint32_t regval; @@ -166,7 +165,6 @@ static inline void cxd32_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif static int excinfo(int irq, uintptr_t *regaddr, uint32_t *bit) { @@ -282,9 +280,7 @@ void up_irqinitialize(void) #endif -#ifdef CONFIG_ARMV7M_USEBASEPRI cxd32_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif /* If the MPU is enabled, then attach and enable the Memory Management * Fault handler. @@ -312,21 +308,6 @@ void up_irqinitialize(void) cxd32_dumpnvic("initial", CXD32_IRQ_NIRQS); - /* If a debugger is connected, try to prevent it from catching hardfaults. - * If CONFIG_ARMV7M_USEBASEPRI, no hardfaults are expected in normal - * operation. - */ - -#if defined(CONFIG_DEBUG_FEATURES) && !defined(CONFIG_ARMV7M_USEBASEPRI) - { - uint32_t regval; - - regval = getreg32(NVIC_DEMCR); - regval &= ~NVIC_DEMCR_VCHARDERR; - putreg32(regval, NVIC_DEMCR); - } -#endif - /* And finally, enable interrupts */ #ifndef CONFIG_SUPPRESS_INTERRUPTS diff --git a/arch/arm/src/cxd56xx/cxd56_irq.c b/arch/arm/src/cxd56xx/cxd56_irq.c index a0f733dd37..db363d72dc 100644 --- a/arch/arm/src/cxd56xx/cxd56_irq.c +++ b/arch/arm/src/cxd56xx/cxd56_irq.c @@ -197,7 +197,6 @@ static int cxd56_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV7M_USEBASEPRI static inline void cxd56_prioritize_syscall(int priority) { uint32_t regval; @@ -209,7 +208,6 @@ static inline void cxd56_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif static int excinfo(int irq, uintptr_t *regaddr, uint32_t *bit) { @@ -333,9 +331,7 @@ void up_irqinitialize(void) #endif -#ifdef CONFIG_ARMV7M_USEBASEPRI cxd56_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif /* If the MPU is enabled, then attach and enable the Memory Management * Fault handler. @@ -363,21 +359,6 @@ void up_irqinitialize(void) cxd56_dumpnvic("initial", CXD56_IRQ_NIRQS); - /* If a debugger is connected, try to prevent it from catching hardfaults. - * If CONFIG_ARMV7M_USEBASEPRI, no hardfaults are expected in normal - * operation. - */ - -#if defined(CONFIG_DEBUG_FEATURES) && !defined(CONFIG_ARMV7M_USEBASEPRI) - { - uint32_t regval; - - regval = getreg32(NVIC_DEMCR); - regval &= ~NVIC_DEMCR_VCHARDERR; - putreg32(regval, NVIC_DEMCR); - } -#endif - /* And finally, enable interrupts */ #ifndef CONFIG_SUPPRESS_INTERRUPTS diff --git a/arch/arm/src/efm32/efm32_irq.c b/arch/arm/src/efm32/efm32_irq.c index 500aea99f8..5912f49090 100644 --- a/arch/arm/src/efm32/efm32_irq.c +++ b/arch/arm/src/efm32/efm32_irq.c @@ -178,7 +178,6 @@ static int efm32_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV7M_USEBASEPRI static inline void efm32_prioritize_syscall(int priority) { uint32_t regval; @@ -190,7 +189,6 @@ static inline void efm32_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Name: efm32_irqinfo @@ -328,11 +326,9 @@ void up_irqinitialize(void) irq_attach(EFM32_IRQ_SVCALL, arm_svcall, NULL); irq_attach(EFM32_IRQ_HARDFAULT, arm_hardfault, NULL); -#ifdef CONFIG_ARMV7M_USEBASEPRI /* Set the priority of the SVCall interrupt */ efm32_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif /* If the MPU is enabled, then attach and enable the Memory Management * Fault handler. diff --git a/arch/arm/src/eoss3/eoss3_irq.c b/arch/arm/src/eoss3/eoss3_irq.c index d057f0ed07..9ce29d9538 100644 --- a/arch/arm/src/eoss3/eoss3_irq.c +++ b/arch/arm/src/eoss3/eoss3_irq.c @@ -159,7 +159,6 @@ static int eoss3_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV7M_USEBASEPRI static inline void eoss3_prioritize_syscall(int priority) { uint32_t regval; @@ -171,7 +170,6 @@ static inline void eoss3_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Name: eoss3_irqinfo @@ -309,11 +307,9 @@ void up_irqinitialize(void) irq_attach(EOSS3_IRQ_SVCALL, arm_svcall, NULL); irq_attach(EOSS3_IRQ_HARDFAULT, arm_hardfault, NULL); -#ifdef CONFIG_ARMV7M_USEBASEPRI /* Set the priority of the SVCall interrupt */ eoss3_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif /* If the MPU is enabled, then attach and enable the Memory Management * Fault handler. diff --git a/arch/arm/src/gd32f4/gd32f4xx_irq.c b/arch/arm/src/gd32f4/gd32f4xx_irq.c index 9d9b521fd0..bb091e7631 100644 --- a/arch/arm/src/gd32f4/gd32f4xx_irq.c +++ b/arch/arm/src/gd32f4/gd32f4xx_irq.c @@ -184,7 +184,6 @@ static int gd32_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV7M_USEBASEPRI static inline void gd32_prioritize_syscall(int priority) { uint32_t regval; @@ -196,7 +195,6 @@ static inline void gd32_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Name: gd32_irqinfo @@ -332,9 +330,8 @@ void up_irqinitialize(void) #ifdef CONFIG_ARCH_IRQPRIO /* up_prioritize_irq(GD32_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */ #endif -#ifdef CONFIG_ARMV7M_USEBASEPRI + gd32_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif /* If the MPU is enabled, then attach and enable the Memory Management * Fault handler. diff --git a/arch/arm/src/imxrt/imxrt_irq.c b/arch/arm/src/imxrt/imxrt_irq.c index ab7205fad0..1188bce4e8 100644 --- a/arch/arm/src/imxrt/imxrt_irq.c +++ b/arch/arm/src/imxrt/imxrt_irq.c @@ -260,7 +260,6 @@ static int imxrt_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV7M_USEBASEPRI static inline void imxrt_prioritize_syscall(int priority) { uint32_t regval; @@ -272,7 +271,6 @@ static inline void imxrt_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Name: imxrt_irqinfo @@ -398,9 +396,6 @@ static int imxrt_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit, void up_irqinitialize(void) { uintptr_t regaddr; -#if defined(CONFIG_DEBUG_SYMBOLS) && !defined(CONFIG_ARMV7M_USEBASEPRI) - uint32_t regval; -#endif int nintlines; int i; @@ -475,9 +470,8 @@ void up_irqinitialize(void) #ifdef CONFIG_ARCH_IRQPRIO /* up_prioritize_irq(IMXRT_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */ #endif -#ifdef CONFIG_ARMV7M_USEBASEPRI + imxrt_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif /* If the MPU is enabled, then attach and enable the Memory Management * Fault handler. @@ -505,17 +499,6 @@ void up_irqinitialize(void) imxrt_dumpnvic("initial", NR_IRQS); - /* If a debugger is connected, try to prevent it from catching hardfaults. - * If CONFIG_ARMV7M_USEBASEPRI, no hardfaults are expected in normal - * operation. - */ - -#if defined(CONFIG_DEBUG_SYMBOLS) && !defined(CONFIG_ARMV7M_USEBASEPRI) - regval = getreg32(NVIC_DEMCR); - regval &= ~NVIC_DEMCR_VCHARDERR; - putreg32(regval, NVIC_DEMCR); -#endif - #ifndef CONFIG_SUPPRESS_INTERRUPTS /* Initialize logic to support a second level of interrupt decoding for * GPIO pins. diff --git a/arch/arm/src/kinetis/kinetis_irq.c b/arch/arm/src/kinetis/kinetis_irq.c index 2dc04929ce..796d8f4947 100644 --- a/arch/arm/src/kinetis/kinetis_irq.c +++ b/arch/arm/src/kinetis/kinetis_irq.c @@ -190,7 +190,6 @@ static int kinetis_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV7M_USEBASEPRI static inline void kinetis_prioritize_syscall(int priority) { uint32_t regval; @@ -202,7 +201,6 @@ static inline void kinetis_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Name: kinetis_irqinfo @@ -361,9 +359,7 @@ void up_irqinitialize(void) /* Set the priority of the SVCall interrupt */ -#ifdef CONFIG_ARMV7M_USEBASEPRI kinetis_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif /* If the MPU is enabled, then attach and enable the Memory Management * Fault handler. diff --git a/arch/arm/src/lc823450/lc823450_irq.c b/arch/arm/src/lc823450/lc823450_irq.c index a1553dde4c..2529cdf089 100644 --- a/arch/arm/src/lc823450/lc823450_irq.c +++ b/arch/arm/src/lc823450/lc823450_irq.c @@ -216,7 +216,6 @@ static int lc823450_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV7M_USEBASEPRI static inline void lc823450_prioritize_syscall(int priority) { uint32_t regval; @@ -228,7 +227,6 @@ static inline void lc823450_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Name: lc823450_extint_clr @@ -488,9 +486,8 @@ void up_irqinitialize(void) #ifdef CONFIG_ARCH_IRQPRIO /* up_prioritize_irq(LC823450_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */ #endif -#ifdef CONFIG_ARMV7M_USEBASEPRI + lc823450_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif /* If the MPU is enabled, then attach and enable the Memory Management * Fault handler. diff --git a/arch/arm/src/lpc17xx_40xx/lpc17_40_irq.c b/arch/arm/src/lpc17xx_40xx/lpc17_40_irq.c index 8ac09b8b6d..1dfbc899c0 100644 --- a/arch/arm/src/lpc17xx_40xx/lpc17_40_irq.c +++ b/arch/arm/src/lpc17xx_40xx/lpc17_40_irq.c @@ -165,7 +165,6 @@ static int lpc17_40_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV7M_USEBASEPRI static inline void lpc17_40_prioritize_syscall(int priority) { uint32_t regval; @@ -177,7 +176,6 @@ static inline void lpc17_40_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Name: lpc17_40_irqinfo @@ -333,9 +331,8 @@ void up_irqinitialize(void) #ifdef CONFIG_ARCH_IRQPRIO /* up_prioritize_irq(LPC17_40_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */ #endif -#ifdef CONFIG_ARMV7M_USEBASEPRI + lpc17_40_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif /* If the MPU is enabled, then attach and enable the Memory Management * Fault handler. diff --git a/arch/arm/src/lpc43xx/lpc43_irq.c b/arch/arm/src/lpc43xx/lpc43_irq.c index 34af5b8384..fc5440d984 100644 --- a/arch/arm/src/lpc43xx/lpc43_irq.c +++ b/arch/arm/src/lpc43xx/lpc43_irq.c @@ -168,7 +168,6 @@ static int lpc43_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV7M_USEBASEPRI static inline void lpc43_prioritize_syscall(int priority) { uint32_t regval; @@ -180,7 +179,6 @@ static inline void lpc43_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Name: lpc43_irqinfo @@ -254,9 +252,6 @@ static int lpc43_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit, void up_irqinitialize(void) { uint32_t regaddr; -#if defined(CONFIG_DEBUG_FEATURES) && !defined(CONFIG_ARMV7M_USEBASEPRI) - uint32_t regval; -#endif int num_priority_registers; int i; @@ -324,9 +319,8 @@ void up_irqinitialize(void) #ifdef CONFIG_ARCH_IRQPRIO /* up_prioritize_irq(LPC43_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */ #endif -#ifdef CONFIG_ARMV7M_USEBASEPRI + lpc43_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif /* If the MPU is enabled, then attach and enable the Memory Management * Fault handler. @@ -354,17 +348,6 @@ void up_irqinitialize(void) lpc43_dumpnvic("initial", LPC43M4_IRQ_NIRQS); - /* If a debugger is connected, try to prevent it from catching hardfaults. - * If CONFIG_ARMV7M_USEBASEPRI, no hardfaults are expected in normal - * operation. - */ - -#if defined(CONFIG_DEBUG_FEATURES) && !defined(CONFIG_ARMV7M_USEBASEPRI) - regval = getreg32(NVIC_DEMCR); - regval &= ~NVIC_DEMCR_VCHARDERR; - putreg32(regval, NVIC_DEMCR); -#endif - /* And finally, enable interrupts */ #ifndef CONFIG_SUPPRESS_INTERRUPTS diff --git a/arch/arm/src/lpc54xx/lpc54_irq.c b/arch/arm/src/lpc54xx/lpc54_irq.c index d16f3274fb..ccb7a4b1a6 100644 --- a/arch/arm/src/lpc54xx/lpc54_irq.c +++ b/arch/arm/src/lpc54xx/lpc54_irq.c @@ -167,7 +167,6 @@ static int lpc54_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV7M_USEBASEPRI static inline void lpc54_prioritize_syscall(int priority) { uint32_t regval; @@ -179,7 +178,6 @@ static inline void lpc54_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Name: lpc54_irqinfo @@ -253,9 +251,6 @@ static int lpc54_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit, void up_irqinitialize(void) { uint32_t regaddr; -#if defined(CONFIG_DEBUG_FEATURES) && !defined(CONFIG_ARMV7M_USEBASEPRI) - uint32_t regval; -#endif int num_priority_registers; int i; @@ -324,9 +319,7 @@ void up_irqinitialize(void) /* up_prioritize_irq(LPC54_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */ #endif -#ifdef CONFIG_ARMV7M_USEBASEPRI lpc54_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif #ifdef CONFIG_ARM_MPU /* If the MPU is enabled, then attach and enable the Memory Management @@ -354,17 +347,6 @@ void up_irqinitialize(void) lpc54_dumpnvic("initial", LPC54_IRQ_NIRQS); -#if defined(CONFIG_DEBUG_FEATURES) && !defined(CONFIG_ARMV7M_USEBASEPRI) - /* If a debugger is connected, try to prevent it from catching hardfaults. - * If CONFIG_ARMV7M_USEBASEPRI, no hardfaults are expected in normal - * operation. - */ - - regval = getreg32(NVIC_DEMCR); - regval &= ~NVIC_DEMCR_VCHARDERR; - putreg32(regval, NVIC_DEMCR); -#endif - #ifdef CONFIG_LPC54_GPIOIRQ /* Initialize GPIO interrupts */ diff --git a/arch/arm/src/max326xx/common/max326_irq.c b/arch/arm/src/max326xx/common/max326_irq.c index 9f1ab99387..aef91ba711 100644 --- a/arch/arm/src/max326xx/common/max326_irq.c +++ b/arch/arm/src/max326xx/common/max326_irq.c @@ -168,7 +168,6 @@ static int max326_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV7M_USEBASEPRI static inline void max326_prioritize_syscall(int priority) { uint32_t regval; @@ -180,7 +179,6 @@ static inline void max326_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Name: max326_irqinfo @@ -254,9 +252,6 @@ static int max326_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit, void up_irqinitialize(void) { uint32_t regaddr; -#if defined(CONFIG_DEBUG_FEATURES) && !defined(CONFIG_ARMV7M_USEBASEPRI) - uint32_t regval; -#endif int num_priority_registers; int i; @@ -324,9 +319,7 @@ void up_irqinitialize(void) /* up_prioritize_irq(MAX326_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */ #endif -#ifdef CONFIG_ARMV7M_USEBASEPRI max326_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif #ifdef CONFIG_ARM_MPU /* If the MPU is enabled, then attach and enable the Memory Management @@ -354,17 +347,6 @@ void up_irqinitialize(void) max326_dumpnvic("initial", MAX326_IRQ_NIRQS); -#if defined(CONFIG_DEBUG_FEATURES) && !defined(CONFIG_ARMV7M_USEBASEPRI) - /* If a debugger is connected, try to prevent it from catching hardfaults. - * If CONFIG_ARMV7M_USEBASEPRI, no hardfaults are expected in normal - * operation. - */ - - regval = getreg32(NVIC_DEMCR); - regval &= ~NVIC_DEMCR_VCHARDERR; - putreg32(regval, NVIC_DEMCR); -#endif - #ifdef CONFIG_MAX326XX_GPIOIRQ /* Initialize GPIO interrupts */ diff --git a/arch/arm/src/mx8mp/mx8mp_irq.c b/arch/arm/src/mx8mp/mx8mp_irq.c index 9f742f5be0..9ed6371f8d 100644 --- a/arch/arm/src/mx8mp/mx8mp_irq.c +++ b/arch/arm/src/mx8mp/mx8mp_irq.c @@ -207,7 +207,6 @@ static int mx8mp_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV7M_USEBASEPRI static inline void mx8mp_prioritize_syscall(int priority) { uint32_t regval; @@ -219,7 +218,6 @@ static inline void mx8mp_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Name: mx8mp_irqinfo @@ -309,9 +307,6 @@ void up_irqinitialize(void) uintptr_t regaddr; int nintlines; int i; -#if defined(CONFIG_DEBUG_SYMBOLS) && !defined(CONFIG_ARMV7M_USEBASEPRI) - uint32_t regval; -#endif /* The NVIC ICTR register (bits 0-4) holds the number of interrupt * lines that the NVIC supports, defined in groups of 32. That is, @@ -384,9 +379,8 @@ void up_irqinitialize(void) #ifdef CONFIG_ARCH_IRQPRIO /* up_prioritize_irq(MX8MP_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */ #endif -#ifdef CONFIG_ARMV7M_USEBASEPRI + mx8mp_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif /* If the MPU is enabled, then attach and enable the Memory Management * Fault handler. @@ -413,17 +407,6 @@ void up_irqinitialize(void) mx8mp_dump_nvic("initial", NR_IRQS); - /* If a debugger is connected, try to prevent it from catching hardfaults. - * If CONFIG_ARMV7M_USEBASEPRI, no hardfaults are expected in normal - * operation. - */ - -#if defined(CONFIG_DEBUG_SYMBOLS) && !defined(CONFIG_ARMV7M_USEBASEPRI) - regval = getreg32(NVIC_DEMCR); - regval &= ~NVIC_DEMCR_VCHARDERR; - putreg32(regval, NVIC_DEMCR); -#endif - #ifndef CONFIG_SUPPRESS_INTERRUPTS /* Initialize logic to support a second level of interrupt decoding for * GPIO pins. diff --git a/arch/arm/src/nrf52/Kconfig b/arch/arm/src/nrf52/Kconfig index c0818ad2a6..bd3af5ff3a 100644 --- a/arch/arm/src/nrf52/Kconfig +++ b/arch/arm/src/nrf52/Kconfig @@ -633,7 +633,6 @@ config NRF52_RADIO_IEEE802154 bool "RADIO IEEE802.15.4 protocol" default n depends on NRF52_HAVE_IEEE802154 - select ARMV7M_USEBASEPRI select ARCH_RAMVECTORS select ARCH_IRQPRIO select NRF52_RADIO_CUSTOM @@ -807,7 +806,6 @@ endmenu # USBDEV Configuration menuconfig NRF52_SOFTDEVICE_CONTROLLER bool "SoftDevice Controller" depends on ALLOW_BSDNORDIC_COMPONENTS - select ARMV7M_USEBASEPRI select ARCH_RAMVECTORS select ARCH_IRQPRIO select CRYPTO diff --git a/arch/arm/src/nrf52/nrf52_irq.c b/arch/arm/src/nrf52/nrf52_irq.c index c9088d1b17..bece0cf0f9 100644 --- a/arch/arm/src/nrf52/nrf52_irq.c +++ b/arch/arm/src/nrf52/nrf52_irq.c @@ -171,7 +171,6 @@ static int nrf52_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV7M_USEBASEPRI static inline void nrf52_prioritize_syscall(int priority) { uint32_t regval; @@ -183,7 +182,6 @@ static inline void nrf52_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Name: nrf52_irqinfo @@ -257,9 +255,6 @@ static int nrf52_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit, void up_irqinitialize(void) { uint32_t regaddr; -#if defined(CONFIG_DEBUG_FEATURES) && !defined(CONFIG_ARMV7M_USEBASEPRI) - uint32_t regval; -#endif int num_priority_registers; int i; @@ -330,9 +325,7 @@ void up_irqinitialize(void) # endif #endif -#ifdef CONFIG_ARMV7M_USEBASEPRI nrf52_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif #ifdef CONFIG_ARM_MPU /* If the MPU is enabled, then attach and enable the Memory Management @@ -360,17 +353,6 @@ void up_irqinitialize(void) nrf52_dumpnvic("initial", NRF52_IRQ_NIRQS); -#if defined(CONFIG_DEBUG_FEATURES) && !defined(CONFIG_ARMV7M_USEBASEPRI) - /* If a debugger is connected, try to prevent it from catching hardfaults. - * If CONFIG_ARMV7M_USEBASEPRI, no hardfaults are expected in normal - * operation. - */ - - regval = getreg32(NVIC_DEMCR); - regval &= ~NVIC_DEMCR_VCHARDERR; - putreg32(regval, NVIC_DEMCR); -#endif - #ifdef CONFIG_NRF52_GPIOTE /* Initialize GPIOTE */ diff --git a/arch/arm/src/nrf53/Kconfig b/arch/arm/src/nrf53/Kconfig index 944bb3f7e1..a629b2d5a2 100644 --- a/arch/arm/src/nrf53/Kconfig +++ b/arch/arm/src/nrf53/Kconfig @@ -718,7 +718,6 @@ menuconfig NRF53_SOFTDEVICE_CONTROLLER bool "SoftDevice Controller" depends on ALLOW_BSDNORDIC_COMPONENTS depends on NRF53_NETCORE - select ARMV8M_USEBASEPRI select ARCH_RAMVECTORS select ARCH_IRQPRIO select CRYPTO diff --git a/arch/arm/src/nrf53/nrf53_irq.c b/arch/arm/src/nrf53/nrf53_irq.c index dc17ac53b1..019fb09965 100644 --- a/arch/arm/src/nrf53/nrf53_irq.c +++ b/arch/arm/src/nrf53/nrf53_irq.c @@ -169,7 +169,6 @@ static int nrf53_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV8M_USEBASEPRI static inline void nrf53_prioritize_syscall(int priority) { uint32_t regval; @@ -181,7 +180,6 @@ static inline void nrf53_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Name: nrf53_irqinfo @@ -255,9 +253,6 @@ static int nrf53_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit, void up_irqinitialize(void) { uint32_t regaddr; -#if defined(CONFIG_DEBUG_FEATURES) && !defined(CONFIG_ARMV8M_USEBASEPRI) - uint32_t regval; -#endif int num_priority_registers; int i; @@ -328,9 +323,7 @@ void up_irqinitialize(void) # endif #endif -#ifdef CONFIG_ARMV8M_USEBASEPRI nrf53_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif #ifdef CONFIG_ARM_MPU /* If the MPU is enabled, then attach and enable the Memory Management @@ -358,17 +351,6 @@ void up_irqinitialize(void) nrf53_dumpnvic("initial", NRF53_IRQ_NIRQS); -#if defined(CONFIG_DEBUG_FEATURES) && !defined(CONFIG_ARMV8M_USEBASEPRI) - /* If a debugger is connected, try to prevent it from catching hardfaults. - * If CONFIG_ARMV8M_USEBASEPRI, no hardfaults are expected in normal - * operation. - */ - - regval = getreg32(NVIC_DEMCR); - regval &= ~NVIC_DEMCR_VCHARDERR; - putreg32(regval, NVIC_DEMCR); -#endif - #ifdef CONFIG_NRF53_GPIOTE /* Initialize GPIOTE */ diff --git a/arch/arm/src/nrf91/nrf91_irq.c b/arch/arm/src/nrf91/nrf91_irq.c index e6f4313ebd..d621e9db60 100644 --- a/arch/arm/src/nrf91/nrf91_irq.c +++ b/arch/arm/src/nrf91/nrf91_irq.c @@ -178,7 +178,6 @@ static int nrf91_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV8M_USEBASEPRI static inline void nrf91_prioritize_syscall(int priority) { uint32_t regval; @@ -190,7 +189,6 @@ static inline void nrf91_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Name: nrf91_irqinfo @@ -264,9 +262,6 @@ static int nrf91_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit, void up_irqinitialize(void) { uint32_t regaddr; -#if defined(CONFIG_DEBUG_FEATURES) && !defined(CONFIG_ARMV8M_USEBASEPRI) - uint32_t regval; -#endif int num_priority_registers; int i; @@ -337,9 +332,7 @@ void up_irqinitialize(void) # endif #endif -#ifdef CONFIG_ARMV8M_USEBASEPRI nrf91_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif #ifdef CONFIG_ARM_MPU /* If the MPU is enabled, then attach and enable the Memory Management @@ -366,17 +359,6 @@ void up_irqinitialize(void) nrf91_dumpnvic("initial", NRF91_IRQ_NIRQS); -#if defined(CONFIG_DEBUG_FEATURES) && !defined(CONFIG_ARMV8M_USEBASEPRI) - /* If a debugger is connected, try to prevent it from catching hardfaults. - * If CONFIG_ARMV8M_USEBASEPRI, no hardfaults are expected in normal - * operation. - */ - - regval = getreg32(NVIC_DEMCR); - regval &= ~NVIC_DEMCR_VCHARDERR; - putreg32(regval, NVIC_DEMCR); -#endif - #ifdef CONFIG_NRF91_GPIOTE /* Initialize GPIOTE */ diff --git a/arch/arm/src/s32k1xx/s32k14x/s32k14x_irq.c b/arch/arm/src/s32k1xx/s32k14x/s32k14x_irq.c index b835b608ec..af04934b6e 100644 --- a/arch/arm/src/s32k1xx/s32k14x/s32k14x_irq.c +++ b/arch/arm/src/s32k1xx/s32k14x/s32k14x_irq.c @@ -202,7 +202,6 @@ static int s32k14x_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV7M_USEBASEPRI static inline void s32k14x_prioritize_syscall(int priority) { uint32_t regval; @@ -214,7 +213,6 @@ static inline void s32k14x_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Name: s32k14x_irqinfo @@ -288,9 +286,6 @@ static int s32k14x_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit, void up_irqinitialize(void) { uint32_t regaddr; -#if defined(CONFIG_DEBUG_FEATURES) && !defined(CONFIG_ARMV7M_USEBASEPRI) - uint32_t regval; -#endif int num_priority_registers; int i; @@ -359,9 +354,7 @@ void up_irqinitialize(void) /* up_prioritize_irq(S32K1XX_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */ #endif -#ifdef CONFIG_ARMV7M_USEBASEPRI s32k14x_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif #ifdef CONFIG_ARM_MPU /* If the MPU is enabled, then attach and enable the Memory Management @@ -389,17 +382,6 @@ void up_irqinitialize(void) s32k14x_dumpnvic("initial", S32K1XX_IRQ_NIRQS); -#if defined(CONFIG_DEBUG_FEATURES) && !defined(CONFIG_ARMV7M_USEBASEPRI) - /* If a debugger is connected, try to prevent it from catching hardfaults. - * If CONFIG_ARMV7M_USEBASEPRI, no hardfaults are expected in normal - * operation. - */ - - regval = getreg32(NVIC_DEMCR); - regval &= ~NVIC_DEMCR_VCHARDERR; - putreg32(regval, NVIC_DEMCR); -#endif - #ifdef CONFIG_S32K1XX_GPIOIRQ /* Initialize GPIO PIN interrupts */ diff --git a/arch/arm/src/s32k3xx/s32k3xx_irq.c b/arch/arm/src/s32k3xx/s32k3xx_irq.c index 81110aab83..403970c60e 100644 --- a/arch/arm/src/s32k3xx/s32k3xx_irq.c +++ b/arch/arm/src/s32k3xx/s32k3xx_irq.c @@ -207,7 +207,6 @@ static int s32k3xx_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV7M_USEBASEPRI static inline void s32k3xx_prioritize_syscall(int priority) { uint32_t regval; @@ -219,7 +218,6 @@ static inline void s32k3xx_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Name: s32k3xx_irqinfo @@ -293,9 +291,6 @@ static int s32k3xx_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit, void up_irqinitialize(void) { uint32_t regaddr; -#if defined(CONFIG_DEBUG_FEATURES) && !defined(CONFIG_ARMV7M_USEBASEPRI) - uint32_t regval; -#endif int num_priority_registers; int i; @@ -364,9 +359,7 @@ void up_irqinitialize(void) /* up_prioritize_irq(S32K3XX_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */ #endif -#ifdef CONFIG_ARMV7M_USEBASEPRI s32k3xx_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif #ifdef CONFIG_ARM_MPU /* If the MPU is enabled, then attach and enable the Memory Management @@ -394,17 +387,6 @@ void up_irqinitialize(void) s32k3xx_dumpnvic("initial", S32K3XX_IRQ_NIRQS); -#if defined(CONFIG_DEBUG_FEATURES) && !defined(CONFIG_ARMV7M_USEBASEPRI) - /* If a debugger is connected, try to prevent it from catching hardfaults. - * If CONFIG_ARMV7M_USEBASEPRI, no hardfaults are expected in normal - * operation. - */ - - regval = getreg32(NVIC_DEMCR); - regval &= ~NVIC_DEMCR_VCHARDERR; - putreg32(regval, NVIC_DEMCR); -#endif - #ifdef CONFIG_S32K3XX_GPIOIRQ /* Initialize GPIO PIN interrupts */ diff --git a/arch/arm/src/sam34/sam_irq.c b/arch/arm/src/sam34/sam_irq.c index c59cae3ee1..dc139a62fa 100644 --- a/arch/arm/src/sam34/sam_irq.c +++ b/arch/arm/src/sam34/sam_irq.c @@ -188,7 +188,6 @@ static int sam_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV7M_USEBASEPRI static inline void sam_prioritize_syscall(int priority) { uint32_t regval; @@ -200,7 +199,6 @@ static inline void sam_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Name: sam_irqinfo @@ -308,9 +306,6 @@ static int sam_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit, void up_irqinitialize(void) { uintptr_t regaddr; -#if defined(CONFIG_DEBUG_SYMBOLS) && !defined(CONFIG_ARMV7M_USEBASEPRI) - uint32_t regval; -#endif int nintlines; int i; @@ -385,9 +380,8 @@ void up_irqinitialize(void) #ifdef CONFIG_ARCH_IRQPRIO /* up_prioritize_irq(SAM_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */ #endif -#ifdef CONFIG_ARMV7M_USEBASEPRI + sam_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif /* If the MPU is enabled, then attach and enable the Memory Management * Fault handler. @@ -415,17 +409,6 @@ void up_irqinitialize(void) sam_dumpnvic("initial", SAM_IRQ_NIRQS); - /* If a debugger is connected, try to prevent it from catching hardfaults. - * If CONFIG_ARMV7M_USEBASEPRI, no hardfaults are expected in normal - * operation. - */ - -#if defined(CONFIG_DEBUG_SYMBOLS) && !defined(CONFIG_ARMV7M_USEBASEPRI) - regval = getreg32(NVIC_DEMCR); - regval &= ~NVIC_DEMCR_VCHARDERR; - putreg32(regval, NVIC_DEMCR); -#endif - #ifndef CONFIG_SUPPRESS_INTERRUPTS /* Initialize logic to support a second level of interrupt decoding for * GPIO pins. diff --git a/arch/arm/src/samd5e5/sam_irq.c b/arch/arm/src/samd5e5/sam_irq.c index 63a7c23ab8..bee8201d75 100644 --- a/arch/arm/src/samd5e5/sam_irq.c +++ b/arch/arm/src/samd5e5/sam_irq.c @@ -226,7 +226,6 @@ static int sam_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV7M_USEBASEPRI static inline void sam_prioritize_syscall(int priority) { uint32_t regval; @@ -238,7 +237,6 @@ static inline void sam_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Name: sam_irqinfo @@ -395,9 +393,6 @@ static int sam_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit, void up_irqinitialize(void) { uintptr_t regaddr; -#if defined(CONFIG_DEBUG_SYMBOLS) && !defined(CONFIG_ARMV7M_USEBASEPRI) - uint32_t regval; -#endif int nintlines; int i; @@ -472,9 +467,8 @@ void up_irqinitialize(void) #ifdef CONFIG_ARCH_IRQPRIO /* up_prioritize_irq(SAM_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */ #endif -#ifdef CONFIG_ARMV7M_USEBASEPRI + sam_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif /* If the MPU is enabled, then attach and enable the Memory Management * Fault handler. @@ -502,17 +496,6 @@ void up_irqinitialize(void) sam_dumpnvic("initial", SAM_IRQ_NIRQS); - /* If a debugger is connected, try to prevent it from catching hardfaults. - * If CONFIG_ARMV7M_USEBASEPRI, no hardfaults are expected in normal - * operation. - */ - -#if defined(CONFIG_DEBUG_SYMBOLS) && !defined(CONFIG_ARMV7M_USEBASEPRI) - regval = getreg32(NVIC_DEMCR); - regval &= ~NVIC_DEMCR_VCHARDERR; - putreg32(regval, NVIC_DEMCR); -#endif - #ifdef CONFIG_SAMD5E5_EIC /* Initialize the external interrupt controller. */ diff --git a/arch/arm/src/samv7/sam_irq.c b/arch/arm/src/samv7/sam_irq.c index 67f60c0ecd..3ab7cfb1b6 100644 --- a/arch/arm/src/samv7/sam_irq.c +++ b/arch/arm/src/samv7/sam_irq.c @@ -190,7 +190,6 @@ static int sam_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV7M_USEBASEPRI static inline void sam_prioritize_syscall(int priority) { uint32_t regval; @@ -202,7 +201,6 @@ static inline void sam_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Name: sam_irqinfo @@ -310,9 +308,6 @@ static int sam_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit, void up_irqinitialize(void) { uintptr_t regaddr; -#if defined(CONFIG_DEBUG_SYMBOLS) && !defined(CONFIG_ARMV7M_USEBASEPRI) - uint32_t regval; -#endif int nintlines; int i; @@ -394,9 +389,8 @@ void up_irqinitialize(void) #ifdef CONFIG_ARCH_IRQPRIO /* up_prioritize_irq(SAM_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */ #endif -#ifdef CONFIG_ARMV7M_USEBASEPRI + sam_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif /* If the MPU is enabled, then attach and enable the Memory Management * Fault handler. @@ -424,17 +418,6 @@ void up_irqinitialize(void) sam_dumpnvic("initial", SAM_IRQ_NIRQS); - /* If a debugger is connected, try to prevent it from catching hardfaults. - * If CONFIG_ARMV7M_USEBASEPRI, no hardfaults are expected in normal - * operation. - */ - -#if defined(CONFIG_DEBUG_SYMBOLS) && !defined(CONFIG_ARMV7M_USEBASEPRI) - regval = getreg32(NVIC_DEMCR); - regval &= ~NVIC_DEMCR_VCHARDERR; - putreg32(regval, NVIC_DEMCR); -#endif - #ifndef CONFIG_SUPPRESS_INTERRUPTS /* Initialize logic to support a second level of interrupt decoding for * GPIO pins. diff --git a/arch/arm/src/stm32/stm32_irq.c b/arch/arm/src/stm32/stm32_irq.c index 51789e346a..b058ce23e8 100644 --- a/arch/arm/src/stm32/stm32_irq.c +++ b/arch/arm/src/stm32/stm32_irq.c @@ -176,7 +176,6 @@ static int stm32_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV7M_USEBASEPRI static inline void stm32_prioritize_syscall(int priority) { uint32_t regval; @@ -188,7 +187,6 @@ static inline void stm32_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Name: stm32_irqinfo @@ -328,9 +326,8 @@ void up_irqinitialize(void) #ifdef CONFIG_ARCH_IRQPRIO /* up_prioritize_irq(STM32_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */ #endif -#ifdef CONFIG_ARMV7M_USEBASEPRI + stm32_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif /* If the MPU is enabled, then attach and enable the Memory Management * Fault handler. diff --git a/arch/arm/src/stm32f7/stm32_irq.c b/arch/arm/src/stm32f7/stm32_irq.c index 43aa5b5387..af496f9337 100644 --- a/arch/arm/src/stm32f7/stm32_irq.c +++ b/arch/arm/src/stm32f7/stm32_irq.c @@ -210,7 +210,6 @@ static int stm32_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV7M_USEBASEPRI static inline void stm32_prioritize_syscall(int priority) { uint32_t regval; @@ -222,7 +221,6 @@ static inline void stm32_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Name: stm32_irqinfo @@ -352,9 +350,6 @@ static int stm32_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit, void up_irqinitialize(void) { uintptr_t regaddr; -#if defined(CONFIG_DEBUG_SYMBOLS) && !defined(CONFIG_ARMV7M_USEBASEPRI) - uint32_t regval; -#endif int nintlines; int i; @@ -429,9 +424,8 @@ void up_irqinitialize(void) #ifdef CONFIG_ARCH_IRQPRIO /* up_prioritize_irq(STM32_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */ #endif -#ifdef CONFIG_ARMV7M_USEBASEPRI + stm32_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif /* If the MPU is enabled, then attach and enable the Memory Management * Fault handler. @@ -459,17 +453,6 @@ void up_irqinitialize(void) stm32_dumpnvic("initial", NR_IRQS); - /* If a debugger is connected, try to prevent it from catching hardfaults. - * If CONFIG_ARMV7M_USEBASEPRI, no hardfaults are expected in normal - * operation. - */ - -#if defined(CONFIG_DEBUG_SYMBOLS) && !defined(CONFIG_ARMV7M_USEBASEPRI) - regval = getreg32(NVIC_DEMCR); - regval &= ~NVIC_DEMCR_VCHARDERR; - putreg32(regval, NVIC_DEMCR); -#endif - #ifndef CONFIG_SUPPRESS_INTERRUPTS /* Initialize logic to support a second level of interrupt decoding for * GPIO pins. diff --git a/arch/arm/src/stm32h5/stm32_irq.c b/arch/arm/src/stm32h5/stm32_irq.c index f035808dfb..2b1a1a5862 100644 --- a/arch/arm/src/stm32h5/stm32_irq.c +++ b/arch/arm/src/stm32h5/stm32_irq.c @@ -156,7 +156,6 @@ static int stm32_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV8M_USEBASEPRI static inline void stm32_prioritize_syscall(int priority) { uint32_t regval; @@ -168,7 +167,6 @@ static inline void stm32_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Name: stm32_irqinfo @@ -306,9 +304,8 @@ void up_irqinitialize(void) /* up_prioritize_irq(STM32_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */ #endif -#ifdef CONFIG_ARMV8M_USEBASEPRI + stm32_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif /* If the MPU is enabled, then attach and enable the Memory Management * Fault handler. diff --git a/arch/arm/src/stm32h7/stm32_irq.c b/arch/arm/src/stm32h7/stm32_irq.c index b80f5f9210..88bb41631c 100644 --- a/arch/arm/src/stm32h7/stm32_irq.c +++ b/arch/arm/src/stm32h7/stm32_irq.c @@ -205,7 +205,6 @@ static int stm32_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV7M_USEBASEPRI static inline void stm32_prioritize_syscall(int priority) { uint32_t regval; @@ -217,7 +216,6 @@ static inline void stm32_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Name: stm32_irqinfo @@ -374,9 +372,6 @@ static int stm32_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit, void up_irqinitialize(void) { uintptr_t regaddr; -#if defined(CONFIG_DEBUG_SYMBOLS) && !defined(CONFIG_ARMV7M_USEBASEPRI) - uint32_t regval; -#endif int nintlines; int i; @@ -451,9 +446,8 @@ void up_irqinitialize(void) #ifdef CONFIG_ARCH_IRQPRIO /* up_prioritize_irq(STM32_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */ #endif -#ifdef CONFIG_ARMV7M_USEBASEPRI + stm32_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif /* If the MPU is enabled, then attach and enable the Memory Management * Fault handler. @@ -481,17 +475,6 @@ void up_irqinitialize(void) stm32_dumpnvic("initial", NR_IRQS); - /* If a debugger is connected, try to prevent it from catching hardfaults. - * If CONFIG_ARMV7M_USEBASEPRI, no hardfaults are expected in normal - * operation. - */ - -#if defined(CONFIG_DEBUG_SYMBOLS) && !defined(CONFIG_ARMV7M_USEBASEPRI) - regval = getreg32(NVIC_DEMCR); - regval &= ~NVIC_DEMCR_VCHARDERR; - putreg32(regval, NVIC_DEMCR); -#endif - #ifndef CONFIG_SUPPRESS_INTERRUPTS /* Initialize logic to support a second level of interrupt decoding for * GPIO pins. diff --git a/arch/arm/src/stm32l4/stm32l4_irq.c b/arch/arm/src/stm32l4/stm32l4_irq.c index 24cd7f0bea..7253e47555 100644 --- a/arch/arm/src/stm32l4/stm32l4_irq.c +++ b/arch/arm/src/stm32l4/stm32l4_irq.c @@ -173,7 +173,6 @@ static int stm32l4_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV7M_USEBASEPRI static inline void stm32l4_prioritize_syscall(int priority) { uint32_t regval; @@ -185,7 +184,6 @@ static inline void stm32l4_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Name: stm32l4_irqinfo @@ -321,9 +319,8 @@ void up_irqinitialize(void) #ifdef CONFIG_ARCH_IRQPRIO /* up_prioritize_irq(STM32L4_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */ #endif -#ifdef CONFIG_ARMV7M_USEBASEPRI + stm32l4_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif /* If the MPU is enabled, then attach and enable the Memory Management * Fault handler. diff --git a/arch/arm/src/stm32l5/stm32l5_irq.c b/arch/arm/src/stm32l5/stm32l5_irq.c index f459bd63c9..8a5d14483c 100644 --- a/arch/arm/src/stm32l5/stm32l5_irq.c +++ b/arch/arm/src/stm32l5/stm32l5_irq.c @@ -156,7 +156,6 @@ static int stm32l5_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV8M_USEBASEPRI static inline void stm32l5_prioritize_syscall(int priority) { uint32_t regval; @@ -168,7 +167,6 @@ static inline void stm32l5_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Name: stm32l5_irqinfo @@ -306,9 +304,8 @@ void up_irqinitialize(void) /* up_prioritize_irq(STM32L5_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */ #endif -#ifdef CONFIG_ARMV8M_USEBASEPRI + stm32l5_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif /* If the MPU is enabled, then attach and enable the Memory Management * Fault handler. diff --git a/arch/arm/src/stm32u5/stm32_irq.c b/arch/arm/src/stm32u5/stm32_irq.c index 1a9dbcd86e..74bccf5143 100644 --- a/arch/arm/src/stm32u5/stm32_irq.c +++ b/arch/arm/src/stm32u5/stm32_irq.c @@ -156,7 +156,6 @@ static int stm32_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV8M_USEBASEPRI static inline void stm32_prioritize_syscall(int priority) { uint32_t regval; @@ -168,7 +167,6 @@ static inline void stm32_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Name: stm32_irqinfo @@ -306,9 +304,8 @@ void up_irqinitialize(void) /* up_prioritize_irq(STM32_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */ #endif -#ifdef CONFIG_ARMV8M_USEBASEPRI + stm32_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif /* If the MPU is enabled, then attach and enable the Memory Management * Fault handler. diff --git a/arch/arm/src/stm32wb/stm32wb_irq.c b/arch/arm/src/stm32wb/stm32wb_irq.c index 6551bcba49..edf2c66dc6 100644 --- a/arch/arm/src/stm32wb/stm32wb_irq.c +++ b/arch/arm/src/stm32wb/stm32wb_irq.c @@ -172,7 +172,6 @@ static int stm32wb_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV7M_USEBASEPRI static inline void stm32wb_prioritize_syscall(int priority) { uint32_t regval; @@ -184,7 +183,6 @@ static inline void stm32wb_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Name: stm32wb_irqinfo @@ -324,9 +322,8 @@ void up_irqinitialize(void) #ifdef CONFIG_ARCH_IRQPRIO /* up_prioritize_irq(STM32WB_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */ #endif -#ifdef CONFIG_ARMV7M_USEBASEPRI + stm32wb_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif /* If the MPU is enabled, then attach and enable the Memory Management * Fault handler. diff --git a/arch/arm/src/stm32wl5/stm32wl5_irq.c b/arch/arm/src/stm32wl5/stm32wl5_irq.c index 48656c0e0f..11ad5cbc7c 100644 --- a/arch/arm/src/stm32wl5/stm32wl5_irq.c +++ b/arch/arm/src/stm32wl5/stm32wl5_irq.c @@ -172,7 +172,6 @@ static int stm32wl5_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV7M_USEBASEPRI static inline void stm32wl5_prioritize_syscall(int priority) { uint32_t regval; @@ -184,7 +183,6 @@ static inline void stm32wl5_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Name: stm32wl5_irqinfo @@ -320,9 +318,8 @@ void up_irqinitialize(void) #ifdef CONFIG_ARCH_IRQPRIO /* up_prioritize_irq(STM32WL5_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */ #endif -#ifdef CONFIG_ARMV7M_USEBASEPRI + stm32wl5_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif /* If the MPU is enabled, then attach and enable the Memory Management * Fault handler. diff --git a/arch/arm/src/tiva/common/tiva_irq.c b/arch/arm/src/tiva/common/tiva_irq.c index 8077d056dd..ff68df70dd 100644 --- a/arch/arm/src/tiva/common/tiva_irq.c +++ b/arch/arm/src/tiva/common/tiva_irq.c @@ -239,7 +239,6 @@ static int tiva_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV7M_USEBASEPRI static inline void tiva_prioritize_syscall(int priority) { uint32_t regval; @@ -251,7 +250,6 @@ static inline void tiva_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Name: tiva_irqinfo @@ -449,9 +447,8 @@ void up_irqinitialize(void) #ifdef CONFIG_ARCH_IRQPRIO /* up_prioritize_irq(TIVA_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */ #endif -#ifdef CONFIG_ARMV7M_USEBASEPRI + tiva_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif /* If the MPU is enabled, then attach and enable the Memory Management * Fault handler. diff --git a/arch/arm/src/xmc4/xmc4_irq.c b/arch/arm/src/xmc4/xmc4_irq.c index fa7b263430..7270e9f86a 100644 --- a/arch/arm/src/xmc4/xmc4_irq.c +++ b/arch/arm/src/xmc4/xmc4_irq.c @@ -189,7 +189,6 @@ static int xmc4_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV7M_USEBASEPRI static inline void xmc4_prioritize_syscall(int priority) { uint32_t regval; @@ -201,7 +200,6 @@ static inline void xmc4_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Name: xmc4_irqinfo @@ -363,9 +361,8 @@ void up_irqinitialize(void) #ifdef CONFIG_ARCH_IRQPRIO /* up_prioritize_irq(XMC4_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */ #endif -#ifdef CONFIG_ARMV7M_USEBASEPRI + xmc4_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif /* If the MPU is enabled, then attach and enable the Memory Management * Fault handler. diff --git a/boards/arm/cxd56xx/spresense/configs/audio/defconfig b/boards/arm/cxd56xx/spresense/configs/audio/defconfig index 7ba6726584..d75749f84e 100644 --- a/boards/arm/cxd56xx/spresense/configs/audio/defconfig +++ b/boards/arm/cxd56xx/spresense/configs/audio/defconfig @@ -17,7 +17,6 @@ CONFIG_ARCH_BOARD_SPRESENSE=y CONFIG_ARCH_CHIP="cxd56xx" CONFIG_ARCH_CHIP_CXD56XX=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_AUDIO=y CONFIG_AUDIO_CXD56=y CONFIG_BOARD_LOOPSPERMSEC=5434 diff --git a/boards/arm/cxd56xx/spresense/configs/audio_sdk/defconfig b/boards/arm/cxd56xx/spresense/configs/audio_sdk/defconfig index 10031e44cf..ed3e8ca10a 100644 --- a/boards/arm/cxd56xx/spresense/configs/audio_sdk/defconfig +++ b/boards/arm/cxd56xx/spresense/configs/audio_sdk/defconfig @@ -17,7 +17,6 @@ CONFIG_ARCH_BOARD_SPRESENSE=y CONFIG_ARCH_CHIP="cxd56xx" CONFIG_ARCH_CHIP_CXD56XX=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_AUDIO=y CONFIG_BOARD_LOOPSPERMSEC=5434 CONFIG_BOOT_RUNFROMISRAM=y diff --git a/boards/arm/cxd56xx/spresense/configs/camera/defconfig b/boards/arm/cxd56xx/spresense/configs/camera/defconfig index 76f11cb1ad..bf1051da17 100644 --- a/boards/arm/cxd56xx/spresense/configs/camera/defconfig +++ b/boards/arm/cxd56xx/spresense/configs/camera/defconfig @@ -17,7 +17,6 @@ CONFIG_ARCH_BOARD_SPRESENSE=y CONFIG_ARCH_CHIP="cxd56xx" CONFIG_ARCH_CHIP_CXD56XX=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=5434 CONFIG_BOOT_RUNFROMISRAM=y CONFIG_BUILTIN=y diff --git a/boards/arm/cxd56xx/spresense/configs/charger/defconfig b/boards/arm/cxd56xx/spresense/configs/charger/defconfig index 548cdf4914..898250a0ce 100644 --- a/boards/arm/cxd56xx/spresense/configs/charger/defconfig +++ b/boards/arm/cxd56xx/spresense/configs/charger/defconfig @@ -14,7 +14,6 @@ CONFIG_ARCH_BOARD_SPRESENSE=y CONFIG_ARCH_CHIP="cxd56xx" CONFIG_ARCH_CHIP_CXD56XX=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=5434 CONFIG_BOOT_RUNFROMISRAM=y CONFIG_BUILTIN=y diff --git a/boards/arm/cxd56xx/spresense/configs/elf/defconfig b/boards/arm/cxd56xx/spresense/configs/elf/defconfig index a9e3274577..5e440f0e4a 100644 --- a/boards/arm/cxd56xx/spresense/configs/elf/defconfig +++ b/boards/arm/cxd56xx/spresense/configs/elf/defconfig @@ -14,7 +14,6 @@ CONFIG_ARCH_BOARD_SPRESENSE=y CONFIG_ARCH_CHIP="cxd56xx" CONFIG_ARCH_CHIP_CXD56XX=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BINFMT_CONSTRUCTORS=y CONFIG_BOARDCTL=y CONFIG_BOARDCTL_ROMDISK=y diff --git a/boards/arm/cxd56xx/spresense/configs/example_camera/defconfig b/boards/arm/cxd56xx/spresense/configs/example_camera/defconfig index 2c326d682d..3f464b10eb 100644 --- a/boards/arm/cxd56xx/spresense/configs/example_camera/defconfig +++ b/boards/arm/cxd56xx/spresense/configs/example_camera/defconfig @@ -19,7 +19,6 @@ CONFIG_ARCH_BOARD_SPRESENSE=y CONFIG_ARCH_CHIP="cxd56xx" CONFIG_ARCH_CHIP_CXD56XX=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=5434 CONFIG_BOOT_RUNFROMISRAM=y CONFIG_BUILTIN=y diff --git a/boards/arm/cxd56xx/spresense/configs/example_lcd/defconfig b/boards/arm/cxd56xx/spresense/configs/example_lcd/defconfig index f09ab8d3f2..3c34836934 100644 --- a/boards/arm/cxd56xx/spresense/configs/example_lcd/defconfig +++ b/boards/arm/cxd56xx/spresense/configs/example_lcd/defconfig @@ -19,7 +19,6 @@ CONFIG_ARCH_BOARD_SPRESENSE=y CONFIG_ARCH_CHIP="cxd56xx" CONFIG_ARCH_CHIP_CXD56XX=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=5434 CONFIG_BOOT_RUNFROMISRAM=y CONFIG_BUILTIN=y diff --git a/boards/arm/cxd56xx/spresense/configs/fmsynth/defconfig b/boards/arm/cxd56xx/spresense/configs/fmsynth/defconfig index 169e633a0f..4dba8ff266 100644 --- a/boards/arm/cxd56xx/spresense/configs/fmsynth/defconfig +++ b/boards/arm/cxd56xx/spresense/configs/fmsynth/defconfig @@ -19,7 +19,6 @@ CONFIG_ARCH_BOARD_SPRESENSE=y CONFIG_ARCH_CHIP="cxd56xx" CONFIG_ARCH_CHIP_CXD56XX=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_AUDIO=y CONFIG_AUDIOUTILS_FMSYNTH_LIB=y CONFIG_AUDIOUTILS_MMLPARSER_LIB=y diff --git a/boards/arm/cxd56xx/spresense/configs/lcd/defconfig b/boards/arm/cxd56xx/spresense/configs/lcd/defconfig index 72c9ecff09..fbdac76bd7 100644 --- a/boards/arm/cxd56xx/spresense/configs/lcd/defconfig +++ b/boards/arm/cxd56xx/spresense/configs/lcd/defconfig @@ -17,7 +17,6 @@ CONFIG_ARCH_BOARD_SPRESENSE=y CONFIG_ARCH_CHIP="cxd56xx" CONFIG_ARCH_CHIP_CXD56XX=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=5434 CONFIG_BOOT_RUNFROMISRAM=y CONFIG_BUILTIN=y diff --git a/boards/arm/cxd56xx/spresense/configs/lte/defconfig b/boards/arm/cxd56xx/spresense/configs/lte/defconfig index d78772aeba..0c3779956f 100644 --- a/boards/arm/cxd56xx/spresense/configs/lte/defconfig +++ b/boards/arm/cxd56xx/spresense/configs/lte/defconfig @@ -19,7 +19,6 @@ CONFIG_ARCH_BOARD_SPRESENSE=y CONFIG_ARCH_CHIP="cxd56xx" CONFIG_ARCH_CHIP_CXD56XX=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=5434 CONFIG_BOOT_RUNFROMISRAM=y CONFIG_BUILTIN=y diff --git a/boards/arm/cxd56xx/spresense/configs/module/defconfig b/boards/arm/cxd56xx/spresense/configs/module/defconfig index d91a4df0bd..9bc362729d 100644 --- a/boards/arm/cxd56xx/spresense/configs/module/defconfig +++ b/boards/arm/cxd56xx/spresense/configs/module/defconfig @@ -14,7 +14,6 @@ CONFIG_ARCH_BOARD_SPRESENSE=y CONFIG_ARCH_CHIP="cxd56xx" CONFIG_ARCH_CHIP_CXD56XX=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARDCTL=y CONFIG_BOARDCTL_ROMDISK=y CONFIG_BOARD_LOOPSPERMSEC=5434 diff --git a/boards/arm/cxd56xx/spresense/configs/mpy/defconfig b/boards/arm/cxd56xx/spresense/configs/mpy/defconfig index 951d5b81d1..bfe800900a 100644 --- a/boards/arm/cxd56xx/spresense/configs/mpy/defconfig +++ b/boards/arm/cxd56xx/spresense/configs/mpy/defconfig @@ -17,7 +17,6 @@ CONFIG_ARCH_BOARD_SPRESENSE=y CONFIG_ARCH_CHIP="cxd56xx" CONFIG_ARCH_CHIP_CXD56XX=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=5434 CONFIG_BOOT_RUNFROMISRAM=y CONFIG_BUILTIN=y diff --git a/boards/arm/cxd56xx/spresense/configs/nsh/defconfig b/boards/arm/cxd56xx/spresense/configs/nsh/defconfig index 3903265caa..f7047ed754 100644 --- a/boards/arm/cxd56xx/spresense/configs/nsh/defconfig +++ b/boards/arm/cxd56xx/spresense/configs/nsh/defconfig @@ -14,7 +14,6 @@ CONFIG_ARCH_BOARD_SPRESENSE=y CONFIG_ARCH_CHIP="cxd56xx" CONFIG_ARCH_CHIP_CXD56XX=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=5434 CONFIG_BOOT_RUNFROMISRAM=y CONFIG_BUILTIN=y diff --git a/boards/arm/cxd56xx/spresense/configs/nsh_automount/defconfig b/boards/arm/cxd56xx/spresense/configs/nsh_automount/defconfig index f982b50ca6..961420837a 100644 --- a/boards/arm/cxd56xx/spresense/configs/nsh_automount/defconfig +++ b/boards/arm/cxd56xx/spresense/configs/nsh_automount/defconfig @@ -14,7 +14,6 @@ CONFIG_ARCH_BOARD_SPRESENSE=y CONFIG_ARCH_CHIP="cxd56xx" CONFIG_ARCH_CHIP_CXD56XX=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=5434 CONFIG_BOOT_RUNFROMISRAM=y CONFIG_BUILTIN=y diff --git a/boards/arm/cxd56xx/spresense/configs/nsh_trace/defconfig b/boards/arm/cxd56xx/spresense/configs/nsh_trace/defconfig index 7ba0883970..6cacf93c53 100644 --- a/boards/arm/cxd56xx/spresense/configs/nsh_trace/defconfig +++ b/boards/arm/cxd56xx/spresense/configs/nsh_trace/defconfig @@ -14,7 +14,6 @@ CONFIG_ARCH_BOARD_SPRESENSE=y CONFIG_ARCH_CHIP="cxd56xx" CONFIG_ARCH_CHIP_CXD56XX=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=5434 CONFIG_BOOT_RUNFROMISRAM=y CONFIG_BUILTIN=y diff --git a/boards/arm/cxd56xx/spresense/configs/posix_spawn/defconfig b/boards/arm/cxd56xx/spresense/configs/posix_spawn/defconfig index 5618664019..264e5d52d6 100644 --- a/boards/arm/cxd56xx/spresense/configs/posix_spawn/defconfig +++ b/boards/arm/cxd56xx/spresense/configs/posix_spawn/defconfig @@ -14,7 +14,6 @@ CONFIG_ARCH_BOARD_SPRESENSE=y CONFIG_ARCH_CHIP="cxd56xx" CONFIG_ARCH_CHIP_CXD56XX=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARDCTL=y CONFIG_BOARDCTL_APP_SYMTAB=y CONFIG_BOARDCTL_ROMDISK=y diff --git a/boards/arm/cxd56xx/spresense/configs/rndis/defconfig b/boards/arm/cxd56xx/spresense/configs/rndis/defconfig index b7a6612631..092d3d7dea 100644 --- a/boards/arm/cxd56xx/spresense/configs/rndis/defconfig +++ b/boards/arm/cxd56xx/spresense/configs/rndis/defconfig @@ -19,7 +19,6 @@ CONFIG_ARCH_CHIP_CXD56XX=y CONFIG_ARCH_INTERRUPTSTACK=2048 CONFIG_ARCH_LEDS_CPU_ACTIVITY=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_AUDIO=y CONFIG_AUDIO_CXD56=y CONFIG_BOARDCTL_RESET=y diff --git a/boards/arm/cxd56xx/spresense/configs/rndis_composite/defconfig b/boards/arm/cxd56xx/spresense/configs/rndis_composite/defconfig index a04a001fb8..e13594b1f4 100644 --- a/boards/arm/cxd56xx/spresense/configs/rndis_composite/defconfig +++ b/boards/arm/cxd56xx/spresense/configs/rndis_composite/defconfig @@ -19,7 +19,6 @@ CONFIG_ARCH_CHIP_CXD56XX=y CONFIG_ARCH_INTERRUPTSTACK=2048 CONFIG_ARCH_LEDS_CPU_ACTIVITY=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_AUDIO=y CONFIG_AUDIO_CXD56=y CONFIG_BOARDCTL_RESET=y diff --git a/boards/arm/cxd56xx/spresense/configs/rndis_smp/defconfig b/boards/arm/cxd56xx/spresense/configs/rndis_smp/defconfig index eeb43643cb..f4f2df5907 100644 --- a/boards/arm/cxd56xx/spresense/configs/rndis_smp/defconfig +++ b/boards/arm/cxd56xx/spresense/configs/rndis_smp/defconfig @@ -19,7 +19,6 @@ CONFIG_ARCH_CHIP_CXD56XX=y CONFIG_ARCH_INTERRUPTSTACK=2048 CONFIG_ARCH_LEDS_CPU_ACTIVITY=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_AUDIO=y CONFIG_AUDIO_CXD56=y CONFIG_BOARDCTL_RESET=y diff --git a/boards/arm/cxd56xx/spresense/configs/smp/defconfig b/boards/arm/cxd56xx/spresense/configs/smp/defconfig index 4209329e9e..0b9c1fb2a9 100644 --- a/boards/arm/cxd56xx/spresense/configs/smp/defconfig +++ b/boards/arm/cxd56xx/spresense/configs/smp/defconfig @@ -16,7 +16,6 @@ CONFIG_ARCH_CHIP_CXD56XX=y CONFIG_ARCH_INTERRUPTSTACK=2048 CONFIG_ARCH_LEDS_CPU_ACTIVITY=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARDCTL_RESET=y CONFIG_BOARD_LATE_INITIALIZE=y CONFIG_BOARD_LOOPSPERMSEC=5434 diff --git a/boards/arm/cxd56xx/spresense/configs/usbmsc/defconfig b/boards/arm/cxd56xx/spresense/configs/usbmsc/defconfig index a14f367794..76884023d9 100644 --- a/boards/arm/cxd56xx/spresense/configs/usbmsc/defconfig +++ b/boards/arm/cxd56xx/spresense/configs/usbmsc/defconfig @@ -17,7 +17,6 @@ CONFIG_ARCH_BOARD_SPRESENSE=y CONFIG_ARCH_CHIP="cxd56xx" CONFIG_ARCH_CHIP_CXD56XX=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=5434 CONFIG_BOOT_RUNFROMISRAM=y CONFIG_BUILTIN=y diff --git a/boards/arm/cxd56xx/spresense/configs/usbnsh/defconfig b/boards/arm/cxd56xx/spresense/configs/usbnsh/defconfig index 2676065610..431a763a58 100644 --- a/boards/arm/cxd56xx/spresense/configs/usbnsh/defconfig +++ b/boards/arm/cxd56xx/spresense/configs/usbnsh/defconfig @@ -17,7 +17,6 @@ CONFIG_ARCH_BOARD_SPRESENSE=y CONFIG_ARCH_CHIP="cxd56xx" CONFIG_ARCH_CHIP_CXD56XX=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=5434 CONFIG_BOOT_RUNFROMISRAM=y CONFIG_BUILTIN=y diff --git a/boards/arm/cxd56xx/spresense/configs/wifi/defconfig b/boards/arm/cxd56xx/spresense/configs/wifi/defconfig index 60ee93df7f..787871023f 100644 --- a/boards/arm/cxd56xx/spresense/configs/wifi/defconfig +++ b/boards/arm/cxd56xx/spresense/configs/wifi/defconfig @@ -20,7 +20,6 @@ CONFIG_ARCH_CHIP="cxd56xx" CONFIG_ARCH_CHIP_CXD56XX=y CONFIG_ARCH_INTERRUPTSTACK=2048 CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_AUDIO=y CONFIG_AUDIO_CXD56=y CONFIG_BOARDCTL_RESET=y diff --git a/boards/arm/cxd56xx/spresense/configs/wifi_smp/defconfig b/boards/arm/cxd56xx/spresense/configs/wifi_smp/defconfig index 84bc4bc3f5..2d737275c0 100644 --- a/boards/arm/cxd56xx/spresense/configs/wifi_smp/defconfig +++ b/boards/arm/cxd56xx/spresense/configs/wifi_smp/defconfig @@ -21,7 +21,6 @@ CONFIG_ARCH_CHIP_CXD56XX=y CONFIG_ARCH_INTERRUPTSTACK=2048 CONFIG_ARCH_LEDS_CPU_ACTIVITY=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_AUDIO=y CONFIG_AUDIO_CXD56=y CONFIG_BOARDCTL_RESET=y diff --git a/boards/arm/imxrt/imxrt1020-evk/configs/netnsh/defconfig b/boards/arm/imxrt/imxrt1020-evk/configs/netnsh/defconfig index 7114a094bb..24a0424ef0 100644 --- a/boards/arm/imxrt/imxrt1020-evk/configs/netnsh/defconfig +++ b/boards/arm/imxrt/imxrt1020-evk/configs/netnsh/defconfig @@ -17,7 +17,6 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILTIN=y CONFIG_DEBUG_FULLOPT=y diff --git a/boards/arm/imxrt/imxrt1020-evk/configs/nsh/defconfig b/boards/arm/imxrt/imxrt1020-evk/configs/nsh/defconfig index bd7ebbff09..5311914d5e 100644 --- a/boards/arm/imxrt/imxrt1020-evk/configs/nsh/defconfig +++ b/boards/arm/imxrt/imxrt1020-evk/configs/nsh/defconfig @@ -17,7 +17,6 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILTIN=y CONFIG_DEBUG_FULLOPT=y diff --git a/boards/arm/imxrt/imxrt1020-evk/configs/usdhc/defconfig b/boards/arm/imxrt/imxrt1020-evk/configs/usdhc/defconfig index 49d457213d..61e1874e19 100644 --- a/boards/arm/imxrt/imxrt1020-evk/configs/usdhc/defconfig +++ b/boards/arm/imxrt/imxrt1020-evk/configs/usdhc/defconfig @@ -18,7 +18,6 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILTIN=y CONFIG_DEBUG_FEATURES=y diff --git a/boards/arm/imxrt/imxrt1050-evk/configs/knsh/defconfig b/boards/arm/imxrt/imxrt1050-evk/configs/knsh/defconfig index 386bc00b4a..4d71ae38fe 100644 --- a/boards/arm/imxrt/imxrt1050-evk/configs/knsh/defconfig +++ b/boards/arm/imxrt/imxrt1050-evk/configs/knsh/defconfig @@ -16,7 +16,6 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARM_MPU=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILD_PROTECTED=y diff --git a/boards/arm/imxrt/imxrt1050-evk/configs/netnsh/defconfig b/boards/arm/imxrt/imxrt1050-evk/configs/netnsh/defconfig index aa5fdebcd6..1b9e54adde 100644 --- a/boards/arm/imxrt/imxrt1050-evk/configs/netnsh/defconfig +++ b/boards/arm/imxrt/imxrt1050-evk/configs/netnsh/defconfig @@ -16,7 +16,6 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILTIN=y CONFIG_ETH0_PHY_KSZ8081=y diff --git a/boards/arm/imxrt/imxrt1050-evk/configs/nsh/defconfig b/boards/arm/imxrt/imxrt1050-evk/configs/nsh/defconfig index 6e24b89913..df5a1276cf 100644 --- a/boards/arm/imxrt/imxrt1050-evk/configs/nsh/defconfig +++ b/boards/arm/imxrt/imxrt1050-evk/configs/nsh/defconfig @@ -15,7 +15,6 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILTIN=y CONFIG_FS_PROCFS=y diff --git a/boards/arm/imxrt/imxrt1060-evk/configs/can/defconfig b/boards/arm/imxrt/imxrt1060-evk/configs/can/defconfig index 0dc63df765..f3e46db0e8 100644 --- a/boards/arm/imxrt/imxrt1060-evk/configs/can/defconfig +++ b/boards/arm/imxrt/imxrt1060-evk/configs/can/defconfig @@ -19,7 +19,6 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILTIN=y CONFIG_CAN=y diff --git a/boards/arm/imxrt/imxrt1060-evk/configs/canfd/defconfig b/boards/arm/imxrt/imxrt1060-evk/configs/canfd/defconfig index 6851855697..ed861faba8 100644 --- a/boards/arm/imxrt/imxrt1060-evk/configs/canfd/defconfig +++ b/boards/arm/imxrt/imxrt1060-evk/configs/canfd/defconfig @@ -18,7 +18,6 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILTIN=y CONFIG_CAN=y diff --git a/boards/arm/imxrt/imxrt1060-evk/configs/knsh/defconfig b/boards/arm/imxrt/imxrt1060-evk/configs/knsh/defconfig index 3b8988def6..82a8264f6c 100644 --- a/boards/arm/imxrt/imxrt1060-evk/configs/knsh/defconfig +++ b/boards/arm/imxrt/imxrt1060-evk/configs/knsh/defconfig @@ -20,7 +20,6 @@ CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_DTCM=y CONFIG_ARMV7M_ICACHE=y CONFIG_ARMV7M_ITCM=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARM_MPU=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILD_PROTECTED=y diff --git a/boards/arm/imxrt/imxrt1060-evk/configs/lvgl/defconfig b/boards/arm/imxrt/imxrt1060-evk/configs/lvgl/defconfig index 2410b1e545..96ce428606 100644 --- a/boards/arm/imxrt/imxrt1060-evk/configs/lvgl/defconfig +++ b/boards/arm/imxrt/imxrt1060-evk/configs/lvgl/defconfig @@ -16,7 +16,6 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILTIN=y CONFIG_DRIVERS_VIDEO=y diff --git a/boards/arm/imxrt/imxrt1060-evk/configs/netnsh/defconfig b/boards/arm/imxrt/imxrt1060-evk/configs/netnsh/defconfig index 5c255895ad..20c8c814de 100644 --- a/boards/arm/imxrt/imxrt1060-evk/configs/netnsh/defconfig +++ b/boards/arm/imxrt/imxrt1060-evk/configs/netnsh/defconfig @@ -16,7 +16,6 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILTIN=y CONFIG_ETH0_PHY_KSZ8081=y diff --git a/boards/arm/imxrt/imxrt1060-evk/configs/netnsh_dcache_wb/defconfig b/boards/arm/imxrt/imxrt1060-evk/configs/netnsh_dcache_wb/defconfig index 1e966cfa5e..21de4fc5f2 100644 --- a/boards/arm/imxrt/imxrt1060-evk/configs/netnsh_dcache_wb/defconfig +++ b/boards/arm/imxrt/imxrt1060-evk/configs/netnsh_dcache_wb/defconfig @@ -16,7 +16,6 @@ CONFIG_ARCH_INTERRUPTSTACK=2048 CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILTIN=y CONFIG_DEBUG_BUSFAULT=y diff --git a/boards/arm/imxrt/imxrt1060-evk/configs/nsh/defconfig b/boards/arm/imxrt/imxrt1060-evk/configs/nsh/defconfig index 5930459e74..1bb8781bc6 100644 --- a/boards/arm/imxrt/imxrt1060-evk/configs/nsh/defconfig +++ b/boards/arm/imxrt/imxrt1060-evk/configs/nsh/defconfig @@ -15,7 +15,6 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILTIN=y CONFIG_FS_PROCFS=y diff --git a/boards/arm/imxrt/imxrt1060-evk/configs/nshocram/defconfig b/boards/arm/imxrt/imxrt1060-evk/configs/nshocram/defconfig index a089807a88..fe0ec88b75 100644 --- a/boards/arm/imxrt/imxrt1060-evk/configs/nshocram/defconfig +++ b/boards/arm/imxrt/imxrt1060-evk/configs/nshocram/defconfig @@ -16,7 +16,6 @@ CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_DTCM=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BOOT_RUNFROMISRAM=y CONFIG_BUILTIN=y diff --git a/boards/arm/imxrt/imxrt1064-evk/configs/can/defconfig b/boards/arm/imxrt/imxrt1064-evk/configs/can/defconfig index 4e6d735c2c..49dcb6038e 100644 --- a/boards/arm/imxrt/imxrt1064-evk/configs/can/defconfig +++ b/boards/arm/imxrt/imxrt1064-evk/configs/can/defconfig @@ -19,7 +19,6 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILTIN=y CONFIG_CAN=y diff --git a/boards/arm/imxrt/imxrt1064-evk/configs/canfd/defconfig b/boards/arm/imxrt/imxrt1064-evk/configs/canfd/defconfig index 094fe07a9d..55579804ba 100644 --- a/boards/arm/imxrt/imxrt1064-evk/configs/canfd/defconfig +++ b/boards/arm/imxrt/imxrt1064-evk/configs/canfd/defconfig @@ -18,7 +18,6 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILTIN=y CONFIG_CAN=y diff --git a/boards/arm/imxrt/imxrt1064-evk/configs/knsh/defconfig b/boards/arm/imxrt/imxrt1064-evk/configs/knsh/defconfig index 4a9e72fcad..1e30eb2819 100644 --- a/boards/arm/imxrt/imxrt1064-evk/configs/knsh/defconfig +++ b/boards/arm/imxrt/imxrt1064-evk/configs/knsh/defconfig @@ -16,7 +16,6 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARM_MPU=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILD_PROTECTED=y diff --git a/boards/arm/imxrt/imxrt1064-evk/configs/lvgl/defconfig b/boards/arm/imxrt/imxrt1064-evk/configs/lvgl/defconfig index bddab67555..26ae6a1762 100644 --- a/boards/arm/imxrt/imxrt1064-evk/configs/lvgl/defconfig +++ b/boards/arm/imxrt/imxrt1064-evk/configs/lvgl/defconfig @@ -16,7 +16,6 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILTIN=y CONFIG_DRIVERS_VIDEO=y diff --git a/boards/arm/imxrt/imxrt1064-evk/configs/mcuboot-app/defconfig b/boards/arm/imxrt/imxrt1064-evk/configs/mcuboot-app/defconfig index 990b140cc7..bf4329254e 100644 --- a/boards/arm/imxrt/imxrt1064-evk/configs/mcuboot-app/defconfig +++ b/boards/arm/imxrt/imxrt1064-evk/configs/mcuboot-app/defconfig @@ -16,7 +16,6 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARDCTL_RESET=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILTIN=y diff --git a/boards/arm/imxrt/imxrt1064-evk/configs/mcuboot-loader/defconfig b/boards/arm/imxrt/imxrt1064-evk/configs/mcuboot-loader/defconfig index ec8ca69331..7183b605b2 100644 --- a/boards/arm/imxrt/imxrt1064-evk/configs/mcuboot-loader/defconfig +++ b/boards/arm/imxrt/imxrt1064-evk/configs/mcuboot-loader/defconfig @@ -15,7 +15,6 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARDCTL_RESET=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BOOT_MCUBOOT=y diff --git a/boards/arm/imxrt/imxrt1064-evk/configs/netnsh/defconfig b/boards/arm/imxrt/imxrt1064-evk/configs/netnsh/defconfig index 8a885674c4..8d2517b38c 100644 --- a/boards/arm/imxrt/imxrt1064-evk/configs/netnsh/defconfig +++ b/boards/arm/imxrt/imxrt1064-evk/configs/netnsh/defconfig @@ -16,7 +16,6 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILTIN=y CONFIG_ETH0_PHY_KSZ8081=y diff --git a/boards/arm/imxrt/imxrt1064-evk/configs/nsh/defconfig b/boards/arm/imxrt/imxrt1064-evk/configs/nsh/defconfig index 142ebed0af..39ff4b3e6f 100644 --- a/boards/arm/imxrt/imxrt1064-evk/configs/nsh/defconfig +++ b/boards/arm/imxrt/imxrt1064-evk/configs/nsh/defconfig @@ -15,7 +15,6 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILTIN=y CONFIG_FS_PROCFS=y diff --git a/boards/arm/imxrt/imxrt1064-evk/configs/nshocram/defconfig b/boards/arm/imxrt/imxrt1064-evk/configs/nshocram/defconfig index 930bdf6221..3524aec53b 100644 --- a/boards/arm/imxrt/imxrt1064-evk/configs/nshocram/defconfig +++ b/boards/arm/imxrt/imxrt1064-evk/configs/nshocram/defconfig @@ -16,7 +16,6 @@ CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_DTCM=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BOOT_RUNFROMISRAM=y CONFIG_BUILTIN=y diff --git a/boards/arm/imxrt/imxrt1170-evk/configs/can/defconfig b/boards/arm/imxrt/imxrt1170-evk/configs/can/defconfig index 6d6500b93a..6fff4878bf 100644 --- a/boards/arm/imxrt/imxrt1170-evk/configs/can/defconfig +++ b/boards/arm/imxrt/imxrt1170-evk/configs/can/defconfig @@ -21,7 +21,6 @@ CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y CONFIG_ARMV7M_ITCM=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILTIN=y CONFIG_CAN=y diff --git a/boards/arm/imxrt/imxrt1170-evk/configs/canfd/defconfig b/boards/arm/imxrt/imxrt1170-evk/configs/canfd/defconfig index 2381728e19..f7ae9d96f4 100644 --- a/boards/arm/imxrt/imxrt1170-evk/configs/canfd/defconfig +++ b/boards/arm/imxrt/imxrt1170-evk/configs/canfd/defconfig @@ -19,7 +19,6 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILTIN=y CONFIG_CAN=y diff --git a/boards/arm/imxrt/imxrt1170-evk/configs/knsh/defconfig b/boards/arm/imxrt/imxrt1170-evk/configs/knsh/defconfig index e63dd0c4dc..92f0b77051 100644 --- a/boards/arm/imxrt/imxrt1170-evk/configs/knsh/defconfig +++ b/boards/arm/imxrt/imxrt1170-evk/configs/knsh/defconfig @@ -18,7 +18,6 @@ CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y CONFIG_ARMV7M_ITCM=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARM_MPU=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILD_PROTECTED=y diff --git a/boards/arm/imxrt/imxrt1170-evk/configs/netnsh/defconfig b/boards/arm/imxrt/imxrt1170-evk/configs/netnsh/defconfig index 3ef072e325..2af6987c9b 100644 --- a/boards/arm/imxrt/imxrt1170-evk/configs/netnsh/defconfig +++ b/boards/arm/imxrt/imxrt1170-evk/configs/netnsh/defconfig @@ -23,7 +23,6 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DTCM=y CONFIG_ARMV7M_ICACHE=y CONFIG_ARMV7M_ITCM=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BINFMT_DISABLE=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILTIN=y diff --git a/boards/arm/imxrt/imxrt1170-evk/configs/nsh/defconfig b/boards/arm/imxrt/imxrt1170-evk/configs/nsh/defconfig index 65c670e950..319dda3144 100644 --- a/boards/arm/imxrt/imxrt1170-evk/configs/nsh/defconfig +++ b/boards/arm/imxrt/imxrt1170-evk/configs/nsh/defconfig @@ -21,7 +21,6 @@ CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DTCM=y CONFIG_ARMV7M_ICACHE=y CONFIG_ARMV7M_ITCM=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BINFMT_DISABLE=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILTIN=y diff --git a/boards/arm/imxrt/teensy-4.x/configs/can-4.1/defconfig b/boards/arm/imxrt/teensy-4.x/configs/can-4.1/defconfig index fa67897c2e..b047ce12d1 100644 --- a/boards/arm/imxrt/teensy-4.x/configs/can-4.1/defconfig +++ b/boards/arm/imxrt/teensy-4.x/configs/can-4.1/defconfig @@ -18,7 +18,6 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILTIN=y CONFIG_CANUTILS_CANDUMP=y diff --git a/boards/arm/imxrt/teensy-4.x/configs/enc-4.1/defconfig b/boards/arm/imxrt/teensy-4.x/configs/enc-4.1/defconfig index b5ade9153d..1fd8320f7a 100644 --- a/boards/arm/imxrt/teensy-4.x/configs/enc-4.1/defconfig +++ b/boards/arm/imxrt/teensy-4.x/configs/enc-4.1/defconfig @@ -15,7 +15,6 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILTIN=y CONFIG_ENC1_XIP=y diff --git a/boards/arm/imxrt/teensy-4.x/configs/lcd-4.1/defconfig b/boards/arm/imxrt/teensy-4.x/configs/lcd-4.1/defconfig index 6369eb33e7..fd3c09d314 100644 --- a/boards/arm/imxrt/teensy-4.x/configs/lcd-4.1/defconfig +++ b/boards/arm/imxrt/teensy-4.x/configs/lcd-4.1/defconfig @@ -15,7 +15,6 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILTIN=y CONFIG_CDCACM=y diff --git a/boards/arm/imxrt/teensy-4.x/configs/lua-4.1/defconfig b/boards/arm/imxrt/teensy-4.x/configs/lua-4.1/defconfig index 645a91369f..a74d955de5 100644 --- a/boards/arm/imxrt/teensy-4.x/configs/lua-4.1/defconfig +++ b/boards/arm/imxrt/teensy-4.x/configs/lua-4.1/defconfig @@ -18,7 +18,6 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILTIN=y CONFIG_CDCACM=y diff --git a/boards/arm/imxrt/teensy-4.x/configs/netnsh-4.1/defconfig b/boards/arm/imxrt/teensy-4.x/configs/netnsh-4.1/defconfig index 8be72d63d6..3bd39ff048 100644 --- a/boards/arm/imxrt/teensy-4.x/configs/netnsh-4.1/defconfig +++ b/boards/arm/imxrt/teensy-4.x/configs/netnsh-4.1/defconfig @@ -16,7 +16,6 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILTIN=y CONFIG_CDCACM=y diff --git a/boards/arm/imxrt/teensy-4.x/configs/nsh-4.0/defconfig b/boards/arm/imxrt/teensy-4.x/configs/nsh-4.0/defconfig index bd8a1efcdb..61e5bafc47 100644 --- a/boards/arm/imxrt/teensy-4.x/configs/nsh-4.0/defconfig +++ b/boards/arm/imxrt/teensy-4.x/configs/nsh-4.0/defconfig @@ -15,7 +15,6 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILTIN=y CONFIG_CDCACM=y diff --git a/boards/arm/imxrt/teensy-4.x/configs/nsh-4.1/defconfig b/boards/arm/imxrt/teensy-4.x/configs/nsh-4.1/defconfig index a7ce47816c..b2a7afec85 100644 --- a/boards/arm/imxrt/teensy-4.x/configs/nsh-4.1/defconfig +++ b/boards/arm/imxrt/teensy-4.x/configs/nsh-4.1/defconfig @@ -15,7 +15,6 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILTIN=y CONFIG_CDCACM=y diff --git a/boards/arm/imxrt/teensy-4.x/configs/pikron-bb/defconfig b/boards/arm/imxrt/teensy-4.x/configs/pikron-bb/defconfig index 754c1ec441..b79e8bfa23 100644 --- a/boards/arm/imxrt/teensy-4.x/configs/pikron-bb/defconfig +++ b/boards/arm/imxrt/teensy-4.x/configs/pikron-bb/defconfig @@ -24,7 +24,6 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARDCTL_APP_SYMTAB=y CONFIG_BOARDCTL_OS_SYMTAB=y CONFIG_BOARD_LOOPSPERMSEC=104926 diff --git a/boards/arm/imxrt/teensy-4.x/configs/pwm-4.1/defconfig b/boards/arm/imxrt/teensy-4.x/configs/pwm-4.1/defconfig index 528327e941..e88ea8c4f9 100644 --- a/boards/arm/imxrt/teensy-4.x/configs/pwm-4.1/defconfig +++ b/boards/arm/imxrt/teensy-4.x/configs/pwm-4.1/defconfig @@ -15,7 +15,6 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILTIN=y CONFIG_EXAMPLES_PWM=y diff --git a/boards/arm/imxrt/teensy-4.x/configs/sd-4.1/defconfig b/boards/arm/imxrt/teensy-4.x/configs/sd-4.1/defconfig index f633e977af..863f20844b 100644 --- a/boards/arm/imxrt/teensy-4.x/configs/sd-4.1/defconfig +++ b/boards/arm/imxrt/teensy-4.x/configs/sd-4.1/defconfig @@ -17,7 +17,6 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILTIN=y CONFIG_CDCACM=y diff --git a/boards/arm/kinetis/freedom-k66f/configs/netnsh/defconfig b/boards/arm/kinetis/freedom-k66f/configs/netnsh/defconfig index fb44e7c300..92e1fe4add 100644 --- a/boards/arm/kinetis/freedom-k66f/configs/netnsh/defconfig +++ b/boards/arm/kinetis/freedom-k66f/configs/netnsh/defconfig @@ -15,7 +15,6 @@ CONFIG_ARCH_CHIP_MK66FN2M0VMD18=y CONFIG_ARCH_INTERRUPTSTACK=2048 CONFIG_ARCH_IRQBUTTONS=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARDCTL_RESET=y CONFIG_BOARDCTL_UNIQUEID=y CONFIG_BOARD_LOOPSPERMSEC=10016 diff --git a/boards/arm/kinetis/freedom-k66f/configs/nsh/defconfig b/boards/arm/kinetis/freedom-k66f/configs/nsh/defconfig index 380b2a13ae..136fff8699 100644 --- a/boards/arm/kinetis/freedom-k66f/configs/nsh/defconfig +++ b/boards/arm/kinetis/freedom-k66f/configs/nsh/defconfig @@ -17,7 +17,6 @@ CONFIG_ARCH_CHIP_MK66FN2M0VMD18=y CONFIG_ARCH_INTERRUPTSTACK=2048 CONFIG_ARCH_IRQBUTTONS=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARDCTL_RESET=y CONFIG_BOARDCTL_UNIQUEID=y CONFIG_BOARD_LOOPSPERMSEC=10016 diff --git a/boards/arm/max326xx/max32660-evsys/configs/nsh/defconfig b/boards/arm/max326xx/max32660-evsys/configs/nsh/defconfig index 583bd750d3..3d59c61901 100644 --- a/boards/arm/max326xx/max32660-evsys/configs/nsh/defconfig +++ b/boards/arm/max326xx/max32660-evsys/configs/nsh/defconfig @@ -15,7 +15,6 @@ CONFIG_ARCH_CHIP_MAX326XX=y CONFIG_ARCH_INTERRUPTSTACK=2048 CONFIG_ARCH_IRQBUTTONS=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=8192 CONFIG_BUILTIN=y CONFIG_FS_PROCFS=y diff --git a/boards/arm/mps/mps2-an500/configs/nsh/defconfig b/boards/arm/mps/mps2-an500/configs/nsh/defconfig index 9b8357e151..e0cbca4228 100644 --- a/boards/arm/mps/mps2-an500/configs/nsh/defconfig +++ b/boards/arm/mps/mps2-an500/configs/nsh/defconfig @@ -14,7 +14,6 @@ CONFIG_ARCH_CHIP_MPS=y CONFIG_ARCH_INTERRUPTSTACK=2048 CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_SYSTICK=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARM_MPU=y CONFIG_ARM_MPU_NREGIONS=1 CONFIG_ARM_MPU_RESET=y diff --git a/boards/arm/mps/mps3-an547/configs/ap/defconfig b/boards/arm/mps/mps3-an547/configs/ap/defconfig index 43cf502c70..baa9b0a020 100644 --- a/boards/arm/mps/mps3-an547/configs/ap/defconfig +++ b/boards/arm/mps/mps3-an547/configs/ap/defconfig @@ -76,7 +76,6 @@ CONFIG_ARCH_CHIP_MPS=y CONFIG_ARCH_INTERRUPTSTACK=2048 CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV8M_SYSTICK=y -CONFIG_ARMV8M_USEBASEPRI=y CONFIG_BOARDCTL_APP_SYMTAB=y CONFIG_BUILD_PIC=y CONFIG_BUILTIN=y diff --git a/boards/arm/mps/mps3-an547/configs/clang/defconfig b/boards/arm/mps/mps3-an547/configs/clang/defconfig index 1cc7240cad..a73875c954 100644 --- a/boards/arm/mps/mps3-an547/configs/clang/defconfig +++ b/boards/arm/mps/mps3-an547/configs/clang/defconfig @@ -15,7 +15,6 @@ CONFIG_ARCH_CHIP_MPS=y CONFIG_ARCH_INTERRUPTSTACK=2048 CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV8M_SYSTICK=y -CONFIG_ARMV8M_USEBASEPRI=y CONFIG_ARM_TOOLCHAIN_CLANG=y CONFIG_BUILTIN=y CONFIG_BUILTIN_COMPILER_RT=y diff --git a/boards/arm/mps/mps3-an547/configs/gcov/defconfig b/boards/arm/mps/mps3-an547/configs/gcov/defconfig index c97dfe12d0..b2fdcbd8ce 100644 --- a/boards/arm/mps/mps3-an547/configs/gcov/defconfig +++ b/boards/arm/mps/mps3-an547/configs/gcov/defconfig @@ -15,7 +15,6 @@ CONFIG_ARCH_CHIP_MPS=y CONFIG_ARCH_INTERRUPTSTACK=2048 CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV8M_SYSTICK=y -CONFIG_ARMV8M_USEBASEPRI=y CONFIG_ARM_TOOLCHAIN_CLANG=y CONFIG_BUILTIN=y CONFIG_CMSDK_UART0=y diff --git a/boards/arm/mps/mps3-an547/configs/nsh/defconfig b/boards/arm/mps/mps3-an547/configs/nsh/defconfig index 54f5e21f22..a3e7d44cfd 100644 --- a/boards/arm/mps/mps3-an547/configs/nsh/defconfig +++ b/boards/arm/mps/mps3-an547/configs/nsh/defconfig @@ -15,7 +15,6 @@ CONFIG_ARCH_CHIP_MPS=y CONFIG_ARCH_INTERRUPTSTACK=2048 CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV8M_SYSTICK=y -CONFIG_ARMV8M_USEBASEPRI=y CONFIG_BUILTIN=y CONFIG_CMSDK_UART0=y CONFIG_CMSDK_UART0_BASE=0x49303000 diff --git a/boards/arm/sam34/sam3u-ek/configs/nx/defconfig b/boards/arm/sam34/sam3u-ek/configs/nx/defconfig index d21029d70c..78453407cd 100644 --- a/boards/arm/sam34/sam3u-ek/configs/nx/defconfig +++ b/boards/arm/sam34/sam3u-ek/configs/nx/defconfig @@ -20,7 +20,6 @@ CONFIG_ARCH_CHIP_SAM34=y CONFIG_ARCH_CHIP_SAM3U=y CONFIG_ARCH_INTERRUPTSTACK=1024 CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARM_TOOLCHAIN_BUILDROOT_OABI=y CONFIG_BOARD_LOOPSPERMSEC=8720 CONFIG_DISABLE_ENVIRON=y diff --git a/boards/arm/sam34/sam4s-xplained-pro/configs/fs/defconfig b/boards/arm/sam34/sam4s-xplained-pro/configs/fs/defconfig index 5809f995d4..97adb25b21 100644 --- a/boards/arm/sam34/sam4s-xplained-pro/configs/fs/defconfig +++ b/boards/arm/sam34/sam4s-xplained-pro/configs/fs/defconfig @@ -18,7 +18,6 @@ CONFIG_ARCH_CHIP_SAM34=y CONFIG_ARCH_CHIP_SAM4S=y CONFIG_ARCH_INTERRUPTSTACK=1024 CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARM_MPU=y CONFIG_BOARDCTL_USBDEVCTRL=y CONFIG_BOARD_LATE_INITIALIZE=y diff --git a/boards/arm/sam34/sam4s-xplained-pro/configs/nsh/defconfig b/boards/arm/sam34/sam4s-xplained-pro/configs/nsh/defconfig index 2adee87900..62f17c60d1 100644 --- a/boards/arm/sam34/sam4s-xplained-pro/configs/nsh/defconfig +++ b/boards/arm/sam34/sam4s-xplained-pro/configs/nsh/defconfig @@ -15,7 +15,6 @@ CONFIG_ARCH_CHIP_SAM34=y CONFIG_ARCH_CHIP_SAM4S=y CONFIG_ARCH_INTERRUPTSTACK=1024 CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARM_MPU=y CONFIG_BOARDCTL_USBDEVCTRL=y CONFIG_BOARD_LATE_INITIALIZE=y diff --git a/boards/arm/samv7/samv71-xult/configs/module/defconfig b/boards/arm/samv7/samv71-xult/configs/module/defconfig index a645fc3ca7..c53194bf66 100644 --- a/boards/arm/samv7/samv71-xult/configs/module/defconfig +++ b/boards/arm/samv7/samv71-xult/configs/module/defconfig @@ -26,7 +26,6 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARDCTL_ROMDISK=y CONFIG_BOARD_LOOPSPERMSEC=51262 CONFIG_BUILTIN=y diff --git a/boards/arm/stm32/nucleo-f412zg/configs/nsh/defconfig b/boards/arm/stm32/nucleo-f412zg/configs/nsh/defconfig index eea163d1f1..3057e6e096 100644 --- a/boards/arm/stm32/nucleo-f412zg/configs/nsh/defconfig +++ b/boards/arm/stm32/nucleo-f412zg/configs/nsh/defconfig @@ -23,7 +23,6 @@ CONFIG_ARCH_CHIP_STM32F412ZG=y CONFIG_ARCH_INTERRUPTSTACK=2048 CONFIG_ARCH_SIZET_LONG=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=8499 CONFIG_BUILTIN=y CONFIG_CAN=y diff --git a/boards/arm/stm32/olimex-stm32-p407/configs/kelf/defconfig b/boards/arm/stm32/olimex-stm32-p407/configs/kelf/defconfig index a768c4a04a..7f678543c0 100644 --- a/boards/arm/stm32/olimex-stm32-p407/configs/kelf/defconfig +++ b/boards/arm/stm32/olimex-stm32-p407/configs/kelf/defconfig @@ -13,7 +13,6 @@ CONFIG_ARCH_CHIP="stm32" CONFIG_ARCH_CHIP_STM32=y CONFIG_ARCH_CHIP_STM32F407ZG=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARM_MPU=y CONFIG_BINFMT_CONSTRUCTORS=y CONFIG_BOARDCTL=y diff --git a/boards/arm/stm32/olimex-stm32-p407/configs/kmodule/defconfig b/boards/arm/stm32/olimex-stm32-p407/configs/kmodule/defconfig index 5ac29e02b4..dabbb5d714 100644 --- a/boards/arm/stm32/olimex-stm32-p407/configs/kmodule/defconfig +++ b/boards/arm/stm32/olimex-stm32-p407/configs/kmodule/defconfig @@ -16,7 +16,6 @@ CONFIG_ARCH_CHIP_STM32F407ZG=y CONFIG_ARCH_INTERRUPTSTACK=2048 CONFIG_ARCH_IRQBUTTONS=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARM_MPU=y CONFIG_BOARDCTL=y CONFIG_BOARDCTL_ROMDISK=y diff --git a/boards/arm/stm32/olimex-stm32-p407/configs/module/defconfig b/boards/arm/stm32/olimex-stm32-p407/configs/module/defconfig index 938d94061c..1db8132852 100644 --- a/boards/arm/stm32/olimex-stm32-p407/configs/module/defconfig +++ b/boards/arm/stm32/olimex-stm32-p407/configs/module/defconfig @@ -15,7 +15,6 @@ CONFIG_ARCH_CHIP_STM32F407ZG=y CONFIG_ARCH_INTERRUPTSTACK=2048 CONFIG_ARCH_IRQBUTTONS=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARDCTL_ROMDISK=y CONFIG_BOARD_LOOPSPERMSEC=16717 CONFIG_BUILTIN=y diff --git a/boards/arm/stm32/stm32f4discovery/configs/elf/defconfig b/boards/arm/stm32/stm32f4discovery/configs/elf/defconfig index 66c7cd6e2f..95a1abc7cc 100644 --- a/boards/arm/stm32/stm32f4discovery/configs/elf/defconfig +++ b/boards/arm/stm32/stm32f4discovery/configs/elf/defconfig @@ -13,7 +13,6 @@ CONFIG_ARCH_CHIP="stm32" CONFIG_ARCH_CHIP_STM32=y CONFIG_ARCH_CHIP_STM32F407VG=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BINFMT_CONSTRUCTORS=y CONFIG_BOARDCTL=y CONFIG_BOARDCTL_ROMDISK=y diff --git a/boards/arm/stm32f7/stm32f746-ws/configs/nsh/defconfig b/boards/arm/stm32f7/stm32f746-ws/configs/nsh/defconfig index 491ad8e1bd..5ad3aab565 100644 --- a/boards/arm/stm32f7/stm32f746-ws/configs/nsh/defconfig +++ b/boards/arm/stm32f7/stm32f746-ws/configs/nsh/defconfig @@ -25,7 +25,6 @@ CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_DTCM=y CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=43103 CONFIG_BUILTIN=y CONFIG_CDCACM=y diff --git a/boards/arm/stm32u5/b-u585i-iot02a/configs/nsh/defconfig b/boards/arm/stm32u5/b-u585i-iot02a/configs/nsh/defconfig index e856bb8fc5..0ba38cd5a1 100644 --- a/boards/arm/stm32u5/b-u585i-iot02a/configs/nsh/defconfig +++ b/boards/arm/stm32u5/b-u585i-iot02a/configs/nsh/defconfig @@ -15,7 +15,6 @@ CONFIG_ARCH_CHIP_STM32U585AI=y CONFIG_ARCH_CHIP_STM32U5=y CONFIG_ARCH_INTERRUPTSTACK=2048 CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV8M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=4230 CONFIG_BUILTIN=y CONFIG_DEBUG_ASSERTIONS=y diff --git a/boards/arm/stm32u5/nucleo-u5a5zj-q/configs/nsh/defconfig b/boards/arm/stm32u5/nucleo-u5a5zj-q/configs/nsh/defconfig index 579606c61f..5f96b51070 100644 --- a/boards/arm/stm32u5/nucleo-u5a5zj-q/configs/nsh/defconfig +++ b/boards/arm/stm32u5/nucleo-u5a5zj-q/configs/nsh/defconfig @@ -16,7 +16,6 @@ CONFIG_ARCH_CHIP_STM32U5=y CONFIG_ARCH_CHIP_STM32U5A5ZJT=y CONFIG_ARCH_INTERRUPTSTACK=2048 CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV8M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=7997 CONFIG_BUILTIN=y CONFIG_DEBUG_ASSERTIONS=y diff --git a/boards/arm/tiva/launchxl-cc1310/configs/nsh/defconfig b/boards/arm/tiva/launchxl-cc1310/configs/nsh/defconfig index 7481ba9a7c..e5f3f9e007 100644 --- a/boards/arm/tiva/launchxl-cc1310/configs/nsh/defconfig +++ b/boards/arm/tiva/launchxl-cc1310/configs/nsh/defconfig @@ -17,7 +17,6 @@ CONFIG_ARCH_CHIP_SIMPLELINK=y CONFIG_ARCH_INTERRUPTSTACK=2048 CONFIG_ARCH_IRQBUTTONS=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=8192 CONFIG_BUILTIN=y CONFIG_EXPERIMENTAL=y diff --git a/boards/arm/tiva/launchxl-cc1312r1/configs/nsh/defconfig b/boards/arm/tiva/launchxl-cc1312r1/configs/nsh/defconfig index b87a526d1f..bb4075c307 100644 --- a/boards/arm/tiva/launchxl-cc1312r1/configs/nsh/defconfig +++ b/boards/arm/tiva/launchxl-cc1312r1/configs/nsh/defconfig @@ -17,7 +17,6 @@ CONFIG_ARCH_CHIP_SIMPLELINK=y CONFIG_ARCH_INTERRUPTSTACK=2048 CONFIG_ARCH_IRQBUTTONS=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARD_LOOPSPERMSEC=8192 CONFIG_BUILTIN=y CONFIG_EXPERIMENTAL=y
