pussuw commented on code in PR #15081: URL: https://github.com/apache/nuttx/pull/15081#discussion_r1886368491
########## arch/risc-v/include/arch.h: ########## @@ -56,6 +56,21 @@ # define ARCH_SPGTS (ARCH_PGT_MAX_LEVELS - 1) #endif +/* Can be used by assembly code to access the structure, example: + * + * Get percpu structure: + * 1: csrr a0, CSR_SCRATCH + * + * Get hartid: + * 2: REGLOAD a0, RISCV_PERCPU_HARTID(a0) Review Comment: But the location of percpu remains same, so reading TCB via CSR_SCRATCH->tcb will remain atomic? Holding the TCB is not safe though, unless we are in critical section... -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
