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The following commit(s) were added to refs/heads/master by this push: new b2158c8e3c arch/arm/stm32f0l0g0/adc: move ADC_MAX_SAMPLES to Kconfig b2158c8e3c is described below commit b2158c8e3ce535b870cf477fcc6d467734f0d65b Author: raiden00pl <raide...@railab.me> AuthorDate: Thu Jul 3 18:07:16 2025 +0200 arch/arm/stm32f0l0g0/adc: move ADC_MAX_SAMPLES to Kconfig move ADC_MAX_SAMPLES to Kconfig so user can fine tune memory usage Signed-off-by: raiden00pl <raide...@railab.me> --- arch/arm/src/stm32f0l0g0/Kconfig | 12 ++++++++++++ arch/arm/src/stm32f0l0g0/stm32_adc.c | 22 ++++------------------ 2 files changed, 16 insertions(+), 18 deletions(-) diff --git a/arch/arm/src/stm32f0l0g0/Kconfig b/arch/arm/src/stm32f0l0g0/Kconfig index b65c6bdb0d..34b573f48d 100644 --- a/arch/arm/src/stm32f0l0g0/Kconfig +++ b/arch/arm/src/stm32f0l0g0/Kconfig @@ -3596,6 +3596,18 @@ config STM32F0L0G0_ADC1_RESOLUTION ---help--- ADC1 resolution. 0 - 12 bit, 1 - 10 bit, 2 - 8 bit, 3 - 6 bit +config STM32F0L0G0_ADC_MAX_SAMPLES + int "The maximum number of channels that can be sampled" + default 16 if STM32F0L0G0_ADC1_DMA + default 1 if !STM32F0L0G0_ADC1_DMA + ---help--- + The maximum number of samples which can be handled without + overrun depends on various factors. This is the user's + responsibility to correctly select this value. + Since the interface to update the sampling time is available + for all supported devices, the user can change the default + values in the board initialization logic and avoid ADC overrun. + config STM32F0L0G0_ADC_NO_STARTUP_CONV bool "Do not start conversion when opening ADC device" default n diff --git a/arch/arm/src/stm32f0l0g0/stm32_adc.c b/arch/arm/src/stm32f0l0g0/stm32_adc.c index d597cd6084..4430debe22 100644 --- a/arch/arm/src/stm32f0l0g0/stm32_adc.c +++ b/arch/arm/src/stm32f0l0g0/stm32_adc.c @@ -75,20 +75,6 @@ /* ADC Channels/DMA *********************************************************/ -/* The maximum number of channels that can be sampled. If DMA support is - * not enabled, then only a single channel can be sampled. Otherwise, - * data overruns would occur. - */ - -#define ADC_MAX_CHANNELS_DMA 16 -#define ADC_MAX_CHANNELS_NODMA 1 - -#ifdef ADC_HAVE_DMA -# define ADC_MAX_SAMPLES ADC_MAX_CHANNELS_DMA -#else -# define ADC_MAX_SAMPLES ADC_MAX_CHANNELS_NODMA -#endif - /* DMA values differs according to STM32 DMA IP core version */ #if defined(HAVE_IP_DMA_V1) @@ -108,7 +94,7 @@ # define ADC_HAVE_SMPR_SMP2 #endif -#if defined(ADC_HAVE_DMA) || (ADC_MAX_SAMPLES == 1) +#if defined(ADC_HAVE_DMA) || (CONFIG_STM32F0L0G0_ADC_MAX_SAMPLES == 1) # if defined(CONFIG_ARCH_CHIP_STM32C0) || defined(CONFIG_ARCH_CHIP_STM32G0) # define ADC_SMP1_DEFAULT ADC_SMPR_12p5 # define ADC_SMP2_DEFAULT ADC_SMPR_12p5 @@ -256,7 +242,7 @@ struct stm32_dev_s /* List of selected ADC channels to sample */ - uint8_t r_chanlist[ADC_MAX_SAMPLES]; + uint8_t r_chanlist[CONFIG_STM32F0L0G0_ADC_MAX_SAMPLES]; }; /**************************************************************************** @@ -414,7 +400,7 @@ static const struct stm32_adc_ops_s g_adc_llops = #ifdef CONFIG_STM32F0L0G0_ADC1 #ifdef ADC1_HAVE_DMA -static uint16_t g_adc1_dmabuffer[ADC_MAX_SAMPLES * +static uint16_t g_adc1_dmabuffer[CONFIG_STM32F0L0G0_ADC_MAX_SAMPLES * CONFIG_STM32F0L0G0_ADC1_DMA_BATCH]; #endif @@ -2876,7 +2862,7 @@ struct adc_dev_s *stm32_adcinitialize(int intf, const uint8_t *chanlist, priv = (struct stm32_dev_s *)dev->ad_priv; priv->cb = NULL; - DEBUGASSERT(channels <= ADC_MAX_SAMPLES); + DEBUGASSERT(channels <= CONFIG_STM32F0L0G0_ADC_MAX_SAMPLES); priv->cr_channels = channels; memcpy(priv->r_chanlist, chanlist, channels);