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new f10cf58d6b1 risc-v/litex: Implement up_flush_dcache_all when
CONFIG_ARCH_DCACHE is defined.
f10cf58d6b1 is described below
commit f10cf58d6b1ee2bbeeeb269fdacd5d9a29030008
Author: Justin Erenkrantz <[email protected]>
AuthorDate: Fri Dec 26 09:41:13 2025 -0500
risc-v/litex: Implement up_flush_dcache_all when CONFIG_ARCH_DCACHE is
defined.
This duplicates the up_invalidate_dcache_all as vexriscv's DBUS cache
does not distinguish between flushing and invalidation.
Signed-off-by: Justin Erenkrantz <[email protected]>
---
arch/risc-v/src/litex/litex_cache.S | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/risc-v/src/litex/litex_cache.S
b/arch/risc-v/src/litex/litex_cache.S
index 37bb1d65b82..2820a384319 100644
--- a/arch/risc-v/src/litex/litex_cache.S
+++ b/arch/risc-v/src/litex/litex_cache.S
@@ -56,6 +56,28 @@ up_invalidate_dcache_all:
.word 0x500F
#endif
+/****************************************************************************
+ * Name: up_flush_dcache_all
+ *
+ * Description:
+ * Flush the entire contents of D cache.
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_DCACHE
+ .globl up_flush_dcache_all
+ .type up_flush_dcache_all, function
+
+up_flush_dcache_all:
+ .word 0x500F
+#endif
+
/****************************************************************************
* Name: up_invalidate_icache_all
*
