(nuttx) branch master updated: arch/stm32: Fix stm32-capture if timer don't support GTIM_CCER_CC1NP

[xiaoxiang]

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xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git


The following commit(s) were added to refs/heads/master by this push:
     new 1b993875b5e arch/stm32: Fix stm32-capture if timer don't support 
GTIM_CCER_CC1NP
1b993875b5e is described below

commit 1b993875b5e40c54c3e0615480533a65fbdbad1e
Author: Alexey Matveev <tip...@yandex.ru>
AuthorDate: Sat Jan 17 22:44:28 2026 +0300

    arch/stm32: Fix stm32-capture if timer don't support GTIM_CCER_CC1NP
    
    Fix: Some STM32 chips don't support GTIM_CCER_CC1NP; use HAVE_GTIM_CCXNP 
guards to exclude it. Adds/updates #ifdef HAVE_GTIM_CCXNP guards so 
GTIM_CCER_CC1NP is only included when supported, preventing register writes on 
chips without it.
    
    Signed-off-by: Alexey Matveev <tip...@yandex.ru>
---
 arch/arm/src/stm32/stm32_capture.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/arch/arm/src/stm32/stm32_capture.c 
b/arch/arm/src/stm32/stm32_capture.c
index a5439581486..4e5770328ba 100644
--- a/arch/arm/src/stm32/stm32_capture.c
+++ b/arch/arm/src/stm32/stm32_capture.c
@@ -1126,7 +1126,11 @@ static int stm32_cap_setchannel(struct stm32_cap_dev_s 
*dev,
 
       case STM32_CAP_EDGE_BOTH:
         ccer_en_bit = GTIM_CCER_CC1E;
+#ifdef HAVE_GTIM_CCXNP
         regval      = GTIM_CCER_CC1P | GTIM_CCER_CC1NP;
+#else
+        regval      = GTIM_CCER_CC1P;
+#endif
         break;
 
       default:
@@ -1134,8 +1138,11 @@ static int stm32_cap_setchannel(struct stm32_cap_dev_s 
*dev,
     }
 
   /* Shift all CCER bits to corresponding channel */
-
+#ifdef HAVE_GTIM_CCXNP
   mask = (GTIM_CCER_CC1E | GTIM_CCER_CC1P | GTIM_CCER_CC1NP);
+#else
+  mask = (GTIM_CCER_CC1E | GTIM_CCER_CC1P);
+#endif
   mask          <<= GTIM_CCER_CCXBASE(channel);
   regval        <<= GTIM_CCER_CCXBASE(channel);
   ccer_en_bit   <<= GTIM_CCER_CCXBASE(channel);