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commit f44060ca9f520a51551d9c6d33d4fba180bfebf5
Author: zhangyuan29 <[email protected]>
AuthorDate: Mon Dec 9 16:54:20 2024 +0800

    arch/tricore: support minimal vectortalbe in tricore
    
    The SRN number in TriCore far exceeds the PN number.
    Using IRQ as the PN number would result in an overflow.
    Therefore, MINIMAL_VECTORTABLE is used to ensure that
    the PN number does not overflow.
    
    Signed-off-by: zhangyuan29 <[email protected]>
---
 arch/tricore/Kconfig                               |  2 +
 arch/tricore/include/tc3xx/irq.h                   |  5 +-
 arch/tricore/src/common/tricore_doirq.c            |  2 +-
 arch/tricore/src/common/tricore_irq.c              | 27 +++-------
 arch/tricore/src/tc3xx/tc3xx_timerisr.c            |  4 +-
 .../tc397/a2g-tc397-5v-tft/configs/nsh/defconfig   |  1 +
 include/nuttx/irq.h                                | 62 ++++++++++++++--------
 sched/irq/irq.h                                    | 34 ------------
 sched/irq/irq_attach.c                             | 20 ++++++-
 9 files changed, 76 insertions(+), 81 deletions(-)

diff --git a/arch/tricore/Kconfig b/arch/tricore/Kconfig
index a6bc0f06477..3232d81e37c 100644
--- a/arch/tricore/Kconfig
+++ b/arch/tricore/Kconfig
@@ -26,6 +26,8 @@ config ARCH_TC3XX
        bool
        select ARCH_HAVE_TESTSET
        select ARCH_HAVE_IRQTRIGGER
+       select ARCH_MINIMAL_VECTORTABLE
+       select ARCH_MINIMAL_VECTORTABLE_DYNAMIC
        default n
 
 config ARCH_FAMILY
diff --git a/arch/tricore/include/tc3xx/irq.h b/arch/tricore/include/tc3xx/irq.h
index 6eafe64688b..32fcfef8239 100644
--- a/arch/tricore/include/tc3xx/irq.h
+++ b/arch/tricore/include/tc3xx/irq.h
@@ -88,7 +88,7 @@
 #define XCPTCONTEXT_REGS (TC_CONTEXT_REGS * 2)
 #define XCPTCONTEXT_SIZE (sizeof(void *) * XCPTCONTEXT_REGS)
 
-#define NR_IRQS          (255)
+#define NR_IRQS          (2048)
 
 /* PSW: Program Status Word Register */
 
@@ -112,6 +112,9 @@
 #define FCX_FCXS_MASK   (0xf    << FCX_FCXS)
 #define FCX_FREE        (FCX_FCXS_MASK | FCX_FCXO_MASK) /* Free CSA 
manipulation */
 
+#define TRICORE_SRC2IRQ(src_addr) \
+  (((uintptr_t)(src_addr) - (uintptr_t)&MODULE_SRC) / 4)
+
 /****************************************************************************
  * Public Types
  ****************************************************************************/
diff --git a/arch/tricore/src/common/tricore_doirq.c 
b/arch/tricore/src/common/tricore_doirq.c
index 87ff8b4bb24..8f0910f845b 100644
--- a/arch/tricore/src/common/tricore_doirq.c
+++ b/arch/tricore/src/common/tricore_doirq.c
@@ -75,7 +75,7 @@ IFX_INTERRUPT_INTERNAL(tricore_doirq, 0, 255)
 
   /* Deliver the IRQ */
 
-  irq_dispatch(icr.B.CCPN, regs);
+  irq_dispatch(NDX_TO_IRQ(icr.B.CCPN), regs);
 
   /* Check for a context switch. */
 
diff --git a/arch/tricore/src/common/tricore_irq.c 
b/arch/tricore/src/common/tricore_irq.c
index 6329f182873..3b5a96b3c5c 100644
--- a/arch/tricore/src/common/tricore_irq.c
+++ b/arch/tricore/src/common/tricore_irq.c
@@ -122,30 +122,15 @@ void up_enable_irq(int irq)
 {
   volatile Ifx_SRC_SRCR *src = &SRC_CPU_CPU0_SB + irq;
 
-  IfxSrc_init(src, IfxSrc_Tos_cpu0, irq);
-  IfxSrc_enable(src);
-}
-
-#ifdef CONFIG_ARCH_HAVE_IRQTRIGGER
-
-/****************************************************************************
- * Name: up_trigger_irq
- *
- * Description:
- *   Trigger an IRQ by software.
- *
- ****************************************************************************/
-
-void up_trigger_irq(int irq, cpu_set_t cpuset)
-{
-  (void) cpuset;
-  volatile Ifx_SRC_SRCR *src = &SRC_CPU_CPU0_SB + irq;
+#ifdef CONFIG_ARCH_TC3XX
+  IfxSrc_init(src, IfxSrc_Tos_cpu0, IRQ_TO_NDX(irq));
+#else
+  IfxSrc_init(src, IfxSrc_Tos_cpu0, IRQ_TO_NDX(irq), IfxSrc_VmId_none);
+#endif
 
-  IfxSrc_setRequest(src);
+  IfxSrc_enable(src);
 }
 
-#endif
-
 /****************************************************************************
  * Name: up_affinity_irq
  *
diff --git a/arch/tricore/src/tc3xx/tc3xx_timerisr.c 
b/arch/tricore/src/tc3xx/tc3xx_timerisr.c
index 554cc429765..44d03b34c3b 100644
--- a/arch/tricore/src/tc3xx/tc3xx_timerisr.c
+++ b/arch/tricore/src/tc3xx/tc3xx_timerisr.c
@@ -51,7 +51,9 @@ void up_timer_initialize(void)
 {
   struct oneshot_lowerhalf_s *lower;
 
-  lower = tricore_systimer_initialize(&MODULE_STM0, 192, SCU_FREQUENCY);
+  lower = tricore_systimer_initialize(&MODULE_STM0,
+                                      TRICORE_SRC2IRQ(&SRC_STM0SR0),
+                                      SCU_FREQUENCY);
 
   DEBUGASSERT(lower != NULL);
 
diff --git a/boards/tricore/tc397/a2g-tc397-5v-tft/configs/nsh/defconfig 
b/boards/tricore/tc397/a2g-tc397-5v-tft/configs/nsh/defconfig
index 682becc5328..8f5ff56640d 100644
--- a/boards/tricore/tc397/a2g-tc397-5v-tft/configs/nsh/defconfig
+++ b/boards/tricore/tc397/a2g-tc397-5v-tft/configs/nsh/defconfig
@@ -12,6 +12,7 @@ CONFIG_ARCH_BOARD_A2G_TC397_5V_TFT=y
 CONFIG_ARCH_CHIP="tc397"
 CONFIG_ARCH_CHIP_TC397=y
 CONFIG_ARCH_INTERRUPTSTACK=2048
+CONFIG_ARCH_NUSER_INTERRUPTS=48
 CONFIG_ARCH_STACKDUMP=y
 CONFIG_ARCH_TRICORE=y
 CONFIG_BOARD_LOOPSPERMSEC=99369
diff --git a/include/nuttx/irq.h b/include/nuttx/irq.h
index 9db5a0fc96c..4f483af6af0 100644
--- a/include/nuttx/irq.h
+++ b/include/nuttx/irq.h
@@ -42,38 +42,51 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-#ifndef __ASSEMBLY__
 /* IRQ detach is a convenience definition, it detach all the handlers
  * sharing the same IRQ. Detaching an interrupt handler is equivalent to
  * setting a NULL interrupt handler.
  */
 
-#  define irq_detach(irq) irq_attach(irq, NULL, NULL)
-#  define irq_detach_wqueue(irq) irq_attach_wqueue(irq, NULL, NULL, NULL, 0)
-#  define irq_detach_thread(irq) \
-     irq_attach_thread(irq, NULL, NULL, NULL, 0, 0)
+#define irq_detach(irq) irq_attach(irq, NULL, NULL)
+#define irq_detach_wqueue(irq) irq_attach_wqueue(irq, NULL, NULL, NULL, 0)
+#define irq_detach_thread(irq) irq_attach_thread(irq, NULL, NULL, NULL, 0, 0)
 
 /* Maximum/minimum values of IRQ integer types */
 
-#  if NR_IRQS <= 256
-#    define IRQT_MAX UINT8_MAX
-#  elif NR_IRQS <= 65536
-#    define IRQT_MAX UINT16_MAX
+#if NR_IRQS <= 256
+#  define IRQT_MAX UINT8_MAX
+#elif NR_IRQS <= 65536
+#  define IRQT_MAX UINT16_MAX
+#else
+#  define IRQT_MAX UINT32_MAX
+#endif
+
+#ifdef CONFIG_ARCH_MINIMAL_VECTORTABLE
+#  if CONFIG_ARCH_NUSER_INTERRUPTS <= 256
+#    define IRQMAPPED_MAX UINT8_MAX
+#  elif CONFIG_ARCH_NUSER_INTERRUPTS <= 65536
+#    define IRQMAPPED_MAX UINT16_MAX
 #  else
-#    define IRQT_MAX UINT32_MAX
+#    define IRQMAPPED_MAX UINT32_MAX
 #  endif
+#endif
 
-#  ifdef CONFIG_ARCH_MINIMAL_VECTORTABLE
-#    if CONFIG_ARCH_NUSER_INTERRUPTS <= 256
-#      define IRQMAPPED_MAX UINT8_MAX
-#    elif CONFIG_ARCH_NUSER_INTERRUPTS <= 65536
-#      define IRQMAPPED_MAX UINT16_MAX
-#    else
-#      define IRQMAPPED_MAX UINT32_MAX
-#   endif
-#  endif
+#if defined(CONFIG_ARCH_MINIMAL_VECTORTABLE) && \
+    !defined(CONFIG_ARCH_NUSER_INTERRUPTS)
+#  error CONFIG_ARCH_NUSER_INTERRUPTS is not defined
+#endif
 
-#endif /* __ASSEMBLY__ */
+#if defined(CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC)
+#  define IRQ_TO_NDX(irq) (g_irqmap[irq] ? g_irqmap[irq] : irq_to_ndx(irq))
+#  define NDX_TO_IRQ(ndx) g_irqrevmap[ndx]
+#elif defined(CONFIG_ARCH_MINIMAL_VECTORTABLE)
+#  define IRQ_TO_NDX(irq) \
+  (g_irqmap[(irq)] < CONFIG_ARCH_NUSER_INTERRUPTS ? g_irqmap[(irq)] : -EINVAL)
+#  define NDX_TO_IRQ(ndx) ndx_to_irq(ndx)
+#else
+#  define IRQ_TO_NDX(irq) (irq)
+#  define NDX_TO_IRQ(ndx) (ndx)
+#endif
 
 #ifdef CONFIG_SMP
 #  define cpu_irqlock_clear() \
@@ -168,7 +181,6 @@ extern "C"
 #define EXTERN extern
 #endif
 
-#ifdef CONFIG_ARCH_MINIMAL_VECTORTABLE
 /* This is the interrupt vector mapping table.  This must be provided by
  * architecture specific logic if CONFIG_ARCH_MINIMAL_VECTORTABLE is define
  * in the configuration.
@@ -179,7 +191,13 @@ extern "C"
  * here with NR_IRQS undefined.
  */
 
-/* EXTERN const irq_mapped_t g_irqmap[NR_IRQS]; */
+#if defined(CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC)
+extern irq_mapped_t g_irqmap[];
+extern int g_irqrevmap[];
+int irq_to_ndx(int irq);
+#elif defined(CONFIG_ARCH_MINIMAL_VECTORTABLE)
+extern const irq_mapped_t g_irqmap[];
+int ndx_to_irq(int ndx);
 #endif
 
 /****************************************************************************
diff --git a/sched/irq/irq.h b/sched/irq/irq.h
index f36075657c3..385e2dd28ab 100644
--- a/sched/irq/irq.h
+++ b/sched/irq/irq.h
@@ -37,24 +37,6 @@
 #include <nuttx/irq.h>
 #include <nuttx/spinlock.h>
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-#if defined(CONFIG_ARCH_MINIMAL_VECTORTABLE) && \
-   !defined(CONFIG_ARCH_NUSER_INTERRUPTS)
-#  error CONFIG_ARCH_NUSER_INTERRUPTS is not defined
-#endif
-
-#if defined(CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC)
-#  define IRQ_TO_NDX(irq) (g_irqmap[irq] ? g_irqmap[irq] : irq_to_ndx(irq))
-#elif defined(CONFIG_ARCH_MINIMAL_VECTORTABLE)
-#  define IRQ_TO_NDX(irq) \
-  (g_irqmap[(irq)] < CONFIG_ARCH_NUSER_INTERRUPTS ? g_irqmap[(irq)] : -EINVAL)
-#else
-#  define IRQ_TO_NDX(irq) (irq)
-#endif
-
 /****************************************************************************
  * Public Types
  ****************************************************************************/
@@ -98,22 +80,6 @@ extern struct irq_info_s 
g_irqvector[CONFIG_ARCH_NUSER_INTERRUPTS];
 extern struct irq_info_s g_irqvector[NR_IRQS];
 #endif
 
-/* This is the interrupt vector mapping table.  This must be provided by
- * architecture specific logic if CONFIG_ARCH_MINIMAL_VECTORTABLE is define
- * in the configuration.
- *
- * REVISIT: This should be declared in include/nuttx/irq.h.  The declaration
- * at that location, however, introduces a circular include dependency so the
- * declaration is here for the time being.
- */
-
-#if defined(CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC)
-extern irq_mapped_t g_irqmap[NR_IRQS];
-int irq_to_ndx(int irq);
-#elif defined(CONFIG_ARCH_MINIMAL_VECTORTABLE)
-extern const irq_mapped_t g_irqmap[NR_IRQS];
-#endif
-
 #ifdef CONFIG_SMP
 /* This is the spinlock that enforces critical sections when interrupts are
  * disabled.
diff --git a/sched/irq/irq_attach.c b/sched/irq/irq_attach.c
index cccd353ca79..a992c927931 100644
--- a/sched/irq/irq_attach.c
+++ b/sched/irq/irq_attach.c
@@ -57,6 +57,7 @@ static int g_irqmap_count = 1;
  */
 
 irq_mapped_t g_irqmap[NR_IRQS];
+int g_irqrevmap[CONFIG_ARCH_NUSER_INTERRUPTS];
 #endif
 
 /****************************************************************************
@@ -71,12 +72,29 @@ int irq_to_ndx(int irq)
   irqstate_t flags = spin_lock_irqsave(&g_irqlock);
   if (g_irqmap[irq] == 0)
     {
-      g_irqmap[irq] = g_irqmap_count++;
+      int ndx = g_irqmap_count++;
+      g_irqmap[irq] = ndx;
+      g_irqrevmap[ndx] = irq;
     }
 
   spin_unlock_irqrestore(&g_irqlock, flags);
   return g_irqmap[irq];
 }
+#elif defined(CONFIG_ARCH_MINIMAL_VECTORTABLE)
+int ndx_to_irq(int ndx)
+{
+  int i;
+
+  for (i = 0; i < NR_IRQS; i++)
+    {
+      if (g_irqmap[i] == ndx)
+        {
+          return i;
+        }
+    }
+
+  return -EINVAL;
+}
 #endif
 
 /****************************************************************************

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