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commit 10c75d27224cb9725f5910323a4d6e2da234eb92 Author: Arjav Patel <[email protected]> AuthorDate: Mon Mar 16 12:30:46 2026 +0530 docs/sdio: clarify 136-bit R2 format This update adds comprehensive documentation regarding the 136-bit response format for SDIO, including the structure of the response, CRC handling, and necessary byte-shifting for alignment. This information is crucial for developers implementing or maintaining SDIO drivers. Signed-off-by: Arjav Patel <[email protected]> --- include/nuttx/sdio.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/include/nuttx/sdio.h b/include/nuttx/sdio.h index 23a2550ef0b..48b5ff66e52 100644 --- a/include/nuttx/sdio.h +++ b/include/nuttx/sdio.h @@ -693,6 +693,20 @@ * status. The driver implementation should verify the correctness of * the remaining, non-returned bits (CRCs, CMD index, etc.). * + * SDIO_RECVR2 (136-bit response): The 136-bit response has format: start + * bit (1), transmission bit (0), 6 reserved bits (all 1), 128 bits of + * CID/CSD data, 7-bit CRC, and end bit (1). The upper-half expects the + * buffer to contain exactly 128 bits of payload in the standard layout + * (e.g., r2[0] contains bits 127-96, r2[1] bits 95-64, etc.). + * + * The upper-half does not verify the CRC; that is the responsibility of + * the lower-half. If the SDMMC controller hardware removes the trailing + * CRC byte before storing the response, the resulting 128 bits will be + * misaligned (often shifted right by 8 bits with leading zeros). In this + * case, the lower-half implementation MUST shift the four 32-bit words + * left by one byte to restore the expected 128-bit payload alignment. + * See bcm2711_sdio.c or imx9_usdhc.c for examples of this byte-shifting. + * * Input Parameters: * dev - An instance of the SDIO device interface * Rx - Buffer in which to receive the response
