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commit ce4b76ff911251d4508d7c0a080df77473cfe350 Author: Eren Terzioglu <[email protected]> AuthorDate: Tue Mar 17 15:20:28 2026 +0100 boards/risc-v/esp32p4: Add lpcore board support Add ULP lpcore board support for esp32p4 Signed-off-by: Eren Terzioglu <[email protected]> --- boards/risc-v/esp32c6/common/src/Make.defs | 2 +- boards/risc-v/esp32p4/common/Kconfig | 8 ++ boards/risc-v/esp32p4/common/scripts/.gitignore | 1 + boards/risc-v/esp32p4/common/scripts/common.ld | 6 ++ .../esp32p4/common/scripts/esp32p4_flat_memory.ld | 12 +-- .../common/scripts/esp32p4_lpcore_sections.ld | 87 ++++++++++++++++++++++ boards/risc-v/esp32p4/common/src/Make.defs | 4 + .../configs/ulp/defconfig | 54 ++++++++++++++ .../src/esp32p4_bringup.c | 20 +++++ 9 files changed, 184 insertions(+), 10 deletions(-) diff --git a/boards/risc-v/esp32c6/common/src/Make.defs b/boards/risc-v/esp32c6/common/src/Make.defs index 0eb833de8d5..20e8f8b3242 100644 --- a/boards/risc-v/esp32c6/common/src/Make.defs +++ b/boards/risc-v/esp32c6/common/src/Make.defs @@ -99,7 +99,7 @@ ifeq ($(CONFIG_ETC_ROMFS),y) endif ifeq ($(CONFIG_ESPRESSIF_ULP_USE_TEST_BIN),y) - include $(TOPDIR)$(DELIM)Documentation$(DELIM)platforms$(DELIM)risc-v$(DELIM)esp32c6$(DELIM)boards$(DELIM)esp32c6-devkitc$(DELIM)ulp_makefile + include $(TOPDIR)$(DELIM)arch$(DELIM)risc-v$(DELIM)src$(DELIM)common$(DELIM)espressif$(DELIM)ulp_makefile endif DEPPATH += --dep-path src diff --git a/boards/risc-v/esp32p4/common/Kconfig b/boards/risc-v/esp32p4/common/Kconfig index 6d2c5f9495e..e5ccd0b648b 100644 --- a/boards/risc-v/esp32p4/common/Kconfig +++ b/boards/risc-v/esp32p4/common/Kconfig @@ -56,3 +56,11 @@ config ESPRESSIF_SPIFLASH_FS_MOUNT_PT string "File-system Mount Point" depends on ESPRESSIF_SPIFLASH_SMARTFS || ESPRESSIF_SPIFLASH_NXFFS || ESPRESSIF_SPIFLASH_SPIFFS || ESPRESSIF_SPIFLASH_LITTLEFS default "/data" + +config ESPRESSIF_ULP_USE_TEST_BIN + bool "Run example prebuilt binary for ULP core" + depends on ESPRESSIF_USE_LP_CORE + default n + ---help--- + Run example prebuilt binary for ULP core which is resides in + `Documentation/platforms/risc-v/esp32p4/boards/esp32p4-function-ev-board/ulp_blink.bin` diff --git a/boards/risc-v/esp32p4/common/scripts/.gitignore b/boards/risc-v/esp32p4/common/scripts/.gitignore index 0fa3d8108a5..47c49a5ef0a 100644 --- a/boards/risc-v/esp32p4/common/scripts/.gitignore +++ b/boards/risc-v/esp32p4/common/scripts/.gitignore @@ -1 +1,2 @@ /*.ld.tmp +/ulp_aliases.ld diff --git a/boards/risc-v/esp32p4/common/scripts/common.ld b/boards/risc-v/esp32p4/common/scripts/common.ld index 4059ca19989..528943413cd 100644 --- a/boards/risc-v/esp32p4/common/scripts/common.ld +++ b/boards/risc-v/esp32p4/common/scripts/common.ld @@ -39,3 +39,9 @@ # define RESERVE_RTC_MEM (ESP_BOOTLOADER_RESERVE_RTC + RTC_TIMER_RESERVE_RTC) # endif /* CONFIG_ARCH_CHIP_ESP32P4 */ #endif /* CONFIG_ESPRESSIF_SOC_RTC_MEM_SUPPORTED */ + +#if CONFIG_P4_REV3_MSPI_CRASH_AFTER_POWER_UP_WORKAROUND +# define MSPI_WORKAROUND_SIZE CONFIG_P4_REV3_MSPI_WORKAROUND_SIZE +#else +# define MSPI_WORKAROUND_SIZE 0x0 +#endif diff --git a/boards/risc-v/esp32p4/common/scripts/esp32p4_flat_memory.ld b/boards/risc-v/esp32p4/common/scripts/esp32p4_flat_memory.ld index f050cab12bb..841a2c0da62 100644 --- a/boards/risc-v/esp32p4/common/scripts/esp32p4_flat_memory.ld +++ b/boards/risc-v/esp32p4/common/scripts/esp32p4_flat_memory.ld @@ -51,12 +51,6 @@ #define SRAM_HIGH_END SRAM_HIGH_START + SRAM_HIGH_SIZE #endif -#if CONFIG_P4_REV3_MSPI_CRASH_AFTER_POWER_UP_WORKAROUND -#define MSPI_WORKAROUND_SIZE CONFIG_P4_REV3_MSPI_WORKAROUND_SIZE -#else -#define MSPI_WORKAROUND_SIZE 0x0 -#endif - #define IDROM_SEG_SIZE (CONFIG_MMU_PAGE_SIZE << 10) #define LP_ROM_DRAM_START 0x5010fa80 // Value taken from ROM elf, includes LP ROM stack @@ -114,10 +108,10 @@ MEMORY * lp ram memory (RWX). Persists over deep sleep. // TODO: IDF-5667 */ #if CONFIG_ULP_COPROC_ENABLED - lp_ram_seg(RW) : org = 0x50108000 + RESERVE_RTC_MEM + CONFIG_ULP_COPROC_RESERVE_MEM, + lp_ram_seg(RW) : org = 0x50108000 + MSPI_WORKAROUND_SIZE + RESERVE_RTC_MEM + CONFIG_ULP_COPROC_RESERVE_MEM, len = 0x8000 - CONFIG_ULP_COPROC_RESERVE_MEM - RESERVE_RTC_MEM - LP_ROM_DRAM_SIZE #else - lp_ram_seg(RW) : org = 0x50108000 + RESERVE_RTC_MEM, len = 0x8000 - RESERVE_RTC_MEM + lp_ram_seg(RW) : org = 0x50108000 + MSPI_WORKAROUND_SIZE + RESERVE_RTC_MEM, len = 0x8000 - RESERVE_RTC_MEM - MSPI_WORKAROUND_SIZE #endif // CONFIG_ULP_COPROC_ENABLED /* We reduced the size of lp_ram_seg by RESERVE_RTC_MEM value. @@ -128,7 +122,7 @@ MEMORY The aim of this is to keep data that will not be moved around and have a fixed address. This segment is placed at the beginning of LP RAM, as the end of LP RAM is occupied by LP ROM stack/data */ - lp_reserved_seg(RW) : org = 0x50108000, len = RESERVE_RTC_MEM + lp_reserved_seg(RW) : org = 0x50108000 + MSPI_WORKAROUND_SIZE, len = RESERVE_RTC_MEM /* PSRAM seg */ extern_ram_seg(RWX) : org = 0x48000000, len = IDROM_SEG_SIZE diff --git a/boards/risc-v/esp32p4/common/scripts/esp32p4_lpcore_sections.ld b/boards/risc-v/esp32p4/common/scripts/esp32p4_lpcore_sections.ld new file mode 100644 index 00000000000..130f32500b2 --- /dev/null +++ b/boards/risc-v/esp32p4/common/scripts/esp32p4_lpcore_sections.ld @@ -0,0 +1,87 @@ +/**************************************************************************** + * boards/risc-v/esp32p4/common/scripts/esp32p4_lpcore_sections.ld + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#include <nuttx/config.h> +#include "common.ld" + +#define ULP_MEM_START_ADDRESS 0x50108000 + RESERVE_RTC_MEM + MSPI_WORKAROUND_SIZE + +ENTRY(reset_vector) + +MEMORY +{ + /*first 128byte for exception/interrupt vectors*/ + + vector_table(RX) : ORIGIN = ULP_MEM_START_ADDRESS , LENGTH = 0x80 + ram(RWX) : ORIGIN = ULP_MEM_START_ADDRESS + 0x80, LENGTH = (CONFIG_ESPRESSIF_ULP_COPROC_RESERVE_MEM_SIZE & ~(0x8 - 1)) - 0x80 - CONFIG_ESPRESSIF_ULP_SHARED_MEM_SIZE + shared_mem_ram(RW) : ORIGIN = ULP_MEM_START_ADDRESS + (CONFIG_ESPRESSIF_ULP_COPROC_RESERVE_MEM_SIZE & ~(0x8 - 1)) - CONFIG_ESPRESSIF_ULP_SHARED_MEM_SIZE, LENGTH = CONFIG_ESPRESSIF_ULP_SHARED_MEM_SIZE +} + +SECTIONS +{ + .vector.text : + { + /*exception/interrupt vectors*/ + __mtvec_base = .; + KEEP (*(.init.vector .init.vector.*)) + } > vector_table + + . = ORIGIN(ram); + + .text ALIGN(4): + { + *(.text.vectors) /* Default reset vector must link to offset 0x80 */ + *(.text) + *(.text*) + } >ram + + .rodata ALIGN(4): + { + *(.rodata) + *(.rodata*) + } > ram + + .data ALIGN(4): + { + *(.data) + *(.data*) + *(.sdata) + *(.sdata*) + } > ram + + .bss ALIGN(4) : + { + *(.bss) + *(.bss*) + *(.sbss) + *(.sbss*) + PROVIDE(end = .); + } >ram + + __stack_top = ORIGIN(ram) + LENGTH(ram); + + . = ORIGIN(shared_mem_ram); + .shared_mem (ALIGN(4)) : + { + KEEP(*(.shared_mem)) + } > shared_mem_ram +} diff --git a/boards/risc-v/esp32p4/common/src/Make.defs b/boards/risc-v/esp32p4/common/src/Make.defs index 603dd7982cc..640235bcb10 100644 --- a/boards/risc-v/esp32p4/common/src/Make.defs +++ b/boards/risc-v/esp32p4/common/src/Make.defs @@ -76,6 +76,10 @@ ifeq ($(CONFIG_ESP_PCNT),y) CSRCS += esp_board_pcnt.c endif +ifeq ($(CONFIG_ESPRESSIF_ULP_USE_TEST_BIN),y) + include $(TOPDIR)$(DELIM)arch$(DELIM)risc-v$(DELIM)src$(DELIM)common$(DELIM)espressif$(DELIM)ulp_makefile +endif + DEPPATH += --dep-path src VPATH += :src CFLAGS += ${INCDIR_PREFIX}$(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)src diff --git a/boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/ulp/defconfig b/boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/ulp/defconfig new file mode 100644 index 00000000000..0bc6709c452 --- /dev/null +++ b/boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/ulp/defconfig @@ -0,0 +1,54 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp32p4-function-ev-board" +CONFIG_ARCH_BOARD_COMMON=y +CONFIG_ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD=y +CONFIG_ARCH_CHIP="esp32p4" +CONFIG_ARCH_CHIP_ESP32P4=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_IRQ_TO_NDX=y +CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y +CONFIG_ARCH_NUSER_INTERRUPTS=17 +CONFIG_ARCH_RISCV=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=15000 +CONFIG_BUILTIN=y +CONFIG_DEV_GPIO=y +CONFIG_ESPRESSIF_GPIO_IRQ=y +CONFIG_ESPRESSIF_ULP_USE_TEST_BIN=y +CONFIG_ESPRESSIF_USE_LP_CORE=y +CONFIG_EXPERIMENTAL=y +CONFIG_FS_PROCFS=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PREALLOC_TIMERS=0 +CONFIG_RR_INTERVAL=200 +CONFIG_RTC=y +CONFIG_RTC_DRIVER=y +CONFIG_SCHED_BACKTRACE=y +CONFIG_SCHED_WAITPID=y +CONFIG_START_DAY=29 +CONFIG_START_MONTH=11 +CONFIG_START_YEAR=2019 +CONFIG_SYSTEM_DUMPSTACK=y +CONFIG_SYSTEM_NSH=y +CONFIG_TESTING_GETPRIME=y +CONFIG_TESTING_OSTEST=y +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/risc-v/esp32p4/esp32p4-function-ev-board/src/esp32p4_bringup.c b/boards/risc-v/esp32p4/esp32p4-function-ev-board/src/esp32p4_bringup.c index 08f63be67b0..ebae7420aa6 100644 --- a/boards/risc-v/esp32p4/esp32p4-function-ev-board/src/esp32p4_bringup.c +++ b/boards/risc-v/esp32p4/esp32p4-function-ev-board/src/esp32p4_bringup.c @@ -117,6 +117,13 @@ # include "espressif/esp_sdm.h" #endif +#ifdef CONFIG_ESPRESSIF_USE_LP_CORE +# include "espressif/esp_ulp.h" +# ifdef CONFIG_ESPRESSIF_ULP_USE_TEST_BIN +# include "ulp/ulp_code.h" +# endif +#endif + #include "esp32p4-function-ev-board.h" /**************************************************************************** @@ -432,6 +439,19 @@ int esp_bringup(void) } #endif +#ifdef CONFIG_ESPRESSIF_USE_LP_CORE + + /* ULP initialization should be the handled later than + * peripherals to use supported peripherals properly on ULP core + */ + + esp_ulp_init(); + +# ifdef CONFIG_ESPRESSIF_ULP_USE_TEST_BIN + esp_ulp_load_bin((char *)esp_ulp_bin, esp_ulp_bin_len); +# endif +#endif + /* If we got here then perhaps not all initialization was successful, but * at least enough succeeded to bring-up NSH with perhaps reduced * capabilities.
