dfanache opened a new pull request, #18865: URL: https://github.com/apache/nuttx/pull/18865
*Note: Please adhere to [Contributing Guidelines](https://github.com/apache/nuttx/blob/master/CONTRIBUTING.md).* ## Summary Two related fixes to rp23xx exception priority initialisation: 1. **fix NVIC priority init missing IRQs 12-51** - `NVIC_IRQ_PRIORITY(n)` does `n >> 2` internally, so the existing loop `for (i = 0; i < 12; i++)` only writes IPR0..IPR2. RP2350 has 52 external IRQs; IRQs 12-51 stay at reset priority 0 and fire through BASEPRI critical sections. 2. **place PendSV at lowest NVIC priority** - defence-in-depth follow-up. PendSV otherwise shares NVIC_SYSH_PRIORITY_DEFAULT with peripheral IRQs. Aligns rp23xx with the canonical ARM Cortex-M priority layout and hardens against future peripheral-IRQ prioritisation. See commit messages for full analysis and observed failure modes. ## Impact Should reduce TCB ready-to-run list and semaphore wait queue corruption that appear spontaneously whenever external SPI or I2C hardware is being used. ## Testing Vanilla apache/nuttx master at the time of this PR; `raspberrypi-pico-2:nsh`, built in `nix develop` shell with `arm-none-eabi-gcc 15.2.1`, flashed to a Raspberry Pi Pico 2 W via openocd / CMSIS-DAP. - Without the patches: ostest runs to completion with exit status 0. This is consistent with the bug being latent under software-only load, since ostest does not drive peripheral IRQs and patch 1's failure path needs an IRQ in the 12..51 range firing through a critical section. - With the patches: ostest behaviour unchanged (still exits 0). `top` runs concurrently in the background without faults. The corruption class that patch 1 closes was originally encountered in a downstream port under SPI+I2C+context-switch load (PX4 with NuttX 12.10). I have thought for a long time that patch 2 was the fix to my woes, but I kept having crashes and poking with gdb showed i2c semaphores with orphan waiters; and then I stumbled onto the proper fix, patch 1. I am keeping patch 2 in the PR as it reflects the canonical ARM priority layout, but I'm relegating its status as just hardening. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
