eren-terzioglu opened a new pull request, #18893:
URL: https://github.com/apache/nuttx/pull/18893
## Summary
<!-- This field should contain a summary of the changes. It will be
pre-filled with the commit's message and descriptions. Adjust it accordingly -->
* Docs/platforms/risc-v: Add LPSPI and SPI3 docs for esp32[-p4]
Add LPSPI and SPI3 docs for esp32p4
* boards/risc-v/esp32p4: Add LPSPI and SPI3 board support
Add LPSPI and SPI3 board support for esp32[-p4]
* arch/risc-v/espressif: Add LPSPI and SPI3 support
Add LPSPI and SPI3 support for esp32[-p4]
## Impact
<!-- Please fill the following sections with YES/NO and provide a brief
explanation -->
Impact on user: Yes, LPSPI and SPI3 can be used for esp32p4
<!-- Does it impact user's applications? How? -->
Impact on build: No
<!-- Does it impact on building NuttX? How? (please describe the required
changes on the build system) -->
Impact on hardware: Yes, missing hardware support added
<!-- Does it impact a specific hardware supported by NuttX? -->
Impact on documentation: Yes, related docs added
<!-- Does it impact the existing documentation? Please provide additional
documentation to reflect that -->
Impact on security: No
<!-- Does it impact NuttX's security? -->
Impact on compatibility: No
<!-- Does it impact compatibility between previous and current versions? Is
this a breaking change? -->
## Testing
<!-- Please provide all the testing procedure. Consider that upstream
reviewers should be able to reproduce the same testing performed internally -->
`esp32p4-function-ev-board:spi` config used with these options:
```
CONFIG_ESPRESSIF_USE_LP_CORE
CONFIG_ESPRESSIF_LPSPI0
```
### Building
<!-- Provide how to build the test for each SoC being tested -->
Command to build:
```
make distclean && ./tools/configure.sh esp32p4-function-ev-board:spi &&
kconfig-tweak -e CONFIG_ESPRESSIF_USE_LP_CORE && kconfig-tweak -e
CONFIG_ESPRESSIF_LPSPI && make olddefconfig && make olddefconfig && make -j &&
make download ESPTOOL_PORT=/dev/ttyUSB0
```
### Running
<!-- Provide how to run the test for each SoC being tested -->
#### Testing LPSPI
ULP code snippet
```
#include <stdio.h>
#include <stdint.h>
#include <stdbool.h>
#include "ulp_lp_core_spi.h"
#include "ulp_lp_core_utils.h"
#include "ulp_lp_core_print.h"
int main (void)
{
uint8_t data = 0x55;
lp_spi_transaction_t trans_desc = {
.tx_buffer = &data,
.tx_length = 1,
.address = 0,
.address_bits = 0,
};
esp_err_t err = lp_core_lp_spi_master_transfer(&trans_desc,
LP_SPI_TRANS_WAIT_FOREVER);
if(err != ESP_OK) {
DEBUG_LOG("Failed to write register: 0x%X, with data = 0x%X\n",
reg_addr, data);
abort();
}
return 0;
}
```
Output needs to be checked with a logic analyzer. Default pins are:
| Pin Name | Pin Number |
|----------|------------|
| MOSI | 7 |
| MISO | 6 |
| CLK | 8 |
| CS | 4 |
#### Testing SPI3
MOSI and MISO pins connected with a cable (GPIO21-GPIO27) and run this `spi
exch -b 3 AB` command
### Results
<!-- Provide tests' results and runtime logs -->
```
nsh> spi exch -b 3 AB
Sending: AB
Received: AB
```
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