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commit df27531c09b63b2fbf6312b0a0510e43620493da
Author: Eren Terzioglu <[email protected]>
AuthorDate: Tue May 12 10:06:08 2026 +0200

    arch/risc-v/espressif: Add Analog Comparator for esp32[-h2|-p4]
    
    Add analog comparator support for esp32p4 and esp32h2
    
    Signed-off-by: Eren Terzioglu <[email protected]>
---
 arch/risc-v/src/common/espressif/Kconfig        | 139 +++++++
 arch/risc-v/src/common/espressif/Make.defs      |   4 +
 arch/risc-v/src/common/espressif/esp_ana_cmpr.c | 473 ++++++++++++++++++++++++
 arch/risc-v/src/common/espressif/esp_ana_cmpr.h |  91 +++++
 arch/risc-v/src/esp32h2/hal_esp32h2.cmake       |   7 +
 arch/risc-v/src/esp32h2/hal_esp32h2.mk          |   7 +
 arch/risc-v/src/esp32p4/hal_esp32p4.cmake       |   6 +
 arch/risc-v/src/esp32p4/hal_esp32p4.mk          |   6 +
 8 files changed, 733 insertions(+)

diff --git a/arch/risc-v/src/common/espressif/Kconfig 
b/arch/risc-v/src/common/espressif/Kconfig
index 6dcccf9a748..ad690eac3c4 100644
--- a/arch/risc-v/src/common/espressif/Kconfig
+++ b/arch/risc-v/src/common/espressif/Kconfig
@@ -1699,6 +1699,28 @@ config ESPRESSIF_TOUCH
        ---help---
                Enable touch sensor support.
 
+config ESPRESSIF_ANA_COMPR
+       bool
+       default n
+       select COMP
+       select ANALOG
+
+config ESPRESSIF_ANA_COMPR0
+       bool "Analog comparator 0"
+       default n
+       depends on ARCH_CHIP_ESP32H2 || ARCH_CHIP_ESP32P4
+       select ESPRESSIF_ANA_COMPR
+       ---help---
+               Enable analog comparator unit 0.
+
+config ESPRESSIF_ANA_COMPR1
+       bool "Analog comparator 1"
+       default n
+       depends on ARCH_CHIP_ESP32P4
+       select ESPRESSIF_ANA_COMPR
+       ---help---
+               Enable analog comparator unit 1.
+
 config ESPRESSIF_ADC
        bool "Analog-to-digital converter (ADC)"
        default n
@@ -2324,6 +2346,123 @@ endmenu # ESP_PCNT
 
 endmenu # Peripheral Support
 
+menu "Analog Comparator Configuration"
+       depends on ESPRESSIF_ANA_COMPR
+
+if ESPRESSIF_ANA_COMPR0
+
+choice ESPRESSIF_ANA_COMPR0_REF_SRC
+       prompt "Analog comparator0 reference source"
+       default ESPRESSIF_ANA_COMPR0_REF_SRC_INTERNAL
+       ---help---
+               Select reference source for the analog comparator0 unit.
+
+config ESPRESSIF_ANA_COMPR0_REF_SRC_INTERNAL
+       bool "Internal reference source"
+
+config ESPRESSIF_ANA_COMPR0_REF_SRC_EXTERNAL
+       bool "External reference source"
+
+endchoice  # ESPRESSIF_ANA_COMPR0_REF_SRC
+
+choice ESPRESSIF_ANA_COMPR0_REF_VOLT
+       prompt "Analog comparator0 reference voltage"
+       depends on ESPRESSIF_ANA_COMPR0_REF_SRC_INTERNAL
+       default ESPRESSIF_ANA_COMPR0_REF_VOLT_50_VDD
+       ---help---
+               Select reference source for the analog comparator0 unit.
+
+config ESPRESSIF_ANA_COMPR0_REF_VOLT_0_VDD
+       bool "Internal reference voltage equals to 0% VDD"
+
+config ESPRESSIF_ANA_COMPR0_REF_VOLT_10_VDD
+       bool "Internal reference voltage equals to 10% VDD"
+
+config ESPRESSIF_ANA_COMPR0_REF_VOLT_20_VDD
+       bool "Internal reference voltage equals to 20% VDD"
+
+config ESPRESSIF_ANA_COMPR0_REF_VOLT_30_VDD
+       bool "Internal reference voltage equals to 30% VDD"
+
+config ESPRESSIF_ANA_COMPR0_REF_VOLT_40_VDD
+       bool "Internal reference voltage equals to 40% VDD"
+
+config ESPRESSIF_ANA_COMPR0_REF_VOLT_50_VDD
+       bool "Internal reference voltage equals to 50% VDD"
+
+config ESPRESSIF_ANA_COMPR0_REF_VOLT_60_VDD
+       bool "Internal reference voltage equals to 60% VDD"
+
+config ESPRESSIF_ANA_COMPR0_REF_VOLT_70_VDD
+       bool "Internal reference voltage equals to 70% VDD"
+endchoice  # ESPRESSIF_ANA_COMPR0_REF_SRC
+
+config ESPRESSIF_ANA_COMPR0_DEBOUNCE
+       int "PM_SLEEP delay (milliseconds)"
+       default 100
+       ---help---
+               The wait time to prevent frequent interrupts caused by signal 
noise or bouncing in milliseconds.
+
+endif # ESPRESSIF_ANA_COMPR0
+
+if ESPRESSIF_ANA_COMPR1
+
+choice ESPRESSIF_ANA_COMPR1_REF_SRC
+       prompt "Analog comparator0 reference source"
+       default ESPRESSIF_ANA_COMPR1_REF_SRC_INTERNAL
+       ---help---
+               Select reference source for the analog comparator0 unit.
+
+config ESPRESSIF_ANA_COMPR1_REF_SRC_INTERNAL
+       bool "Internal reference source"
+
+config ESPRESSIF_ANA_COMPR1_REF_SRC_EXTERNAL
+       bool "External reference source"
+
+endchoice  # ESPRESSIF_ANA_COMPR1_REF_SRC
+
+choice ESPRESSIF_ANA_COMPR1_REF_VOLT
+       prompt "Analog comparator0 reference voltage"
+       depends on ESPRESSIF_ANA_COMPR1_REF_SRC_INTERNAL
+       default ESPRESSIF_ANA_COMPR1_REF_VOLT_50_VDD
+       ---help---
+               Select reference source for the analog comparator0 unit.
+
+config ESPRESSIF_ANA_COMPR1_REF_VOLT_0_VDD
+       bool "Internal reference voltage equals to 0% VDD"
+
+config ESPRESSIF_ANA_COMPR1_REF_VOLT_10_VDD
+       bool "Internal reference voltage equals to 10% VDD"
+
+config ESPRESSIF_ANA_COMPR1_REF_VOLT_20_VDD
+       bool "Internal reference voltage equals to 20% VDD"
+
+config ESPRESSIF_ANA_COMPR1_REF_VOLT_30_VDD
+       bool "Internal reference voltage equals to 30% VDD"
+
+config ESPRESSIF_ANA_COMPR1_REF_VOLT_40_VDD
+       bool "Internal reference voltage equals to 40% VDD"
+
+config ESPRESSIF_ANA_COMPR1_REF_VOLT_50_VDD
+       bool "Internal reference voltage equals to 50% VDD"
+
+config ESPRESSIF_ANA_COMPR1_REF_VOLT_60_VDD
+       bool "Internal reference voltage equals to 60% VDD"
+
+config ESPRESSIF_ANA_COMPR1_REF_VOLT_70_VDD
+       bool "Internal reference voltage equals to 70% VDD"
+endchoice  # ESPRESSIF_ANA_COMPR1_REF_SRC
+
+config ESPRESSIF_ANA_COMPR1_DEBOUNCE
+       int "PM_SLEEP delay (milliseconds)"
+       default 100
+       ---help---
+               The wait time to prevent frequent interrupts caused by signal 
noise or bouncing in milliseconds.
+
+endif # ESPRESSIF_ANA_COMPR1
+
+endmenu # Analog Comparator Configuration
+
 menu "ADC Configuration"
        depends on ESPRESSIF_ADC
 
diff --git a/arch/risc-v/src/common/espressif/Make.defs 
b/arch/risc-v/src/common/espressif/Make.defs
index 9405be309e4..fe213bf835a 100644
--- a/arch/risc-v/src/common/espressif/Make.defs
+++ b/arch/risc-v/src/common/espressif/Make.defs
@@ -181,6 +181,10 @@ ifeq ($(CONFIG_ESPRESSIF_ADC),y)
 CHIP_CSRCS += esp_adc.c
 endif
 
+ifeq ($(CONFIG_COMP),y)
+       CHIP_CSRCS += esp_ana_cmpr.c
+endif
+
 ifeq ($(CONFIG_ESPRESSIF_SHA_ACCELERATOR),y)
        CHIP_CSRCS += esp_sha.c
 endif
diff --git a/arch/risc-v/src/common/espressif/esp_ana_cmpr.c 
b/arch/risc-v/src/common/espressif/esp_ana_cmpr.c
new file mode 100644
index 00000000000..4d44b15ac2e
--- /dev/null
+++ b/arch/risc-v/src/common/espressif/esp_ana_cmpr.c
@@ -0,0 +1,473 @@
+/****************************************************************************
+ * arch/risc-v/src/common/espressif/esp_ana_cmpr.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this args for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <nuttx/analog/comp.h>
+#include <nuttx/debug.h>
+
+#include "espressif/esp_ana_cmpr.h"
+
+#include "soc/clk_tree_defs.h"
+#include "driver/ana_cmpr.h"
+#include "hal/ana_cmpr_ll.h"
+#include "hal/ana_cmpr_periph.h"
+#include "hal/ana_cmpr_types.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct esp_ana_cmpr_priv_s
+{
+  ana_cmpr_handle_t handle;                   /* Peripheral handler */
+  ana_cmpr_config_t *config;                  /* Peripheral configuration */
+  ana_cmpr_internal_ref_config_t *ref_cfg;    /* Comparator configuration */
+  ana_cmpr_debounce_config_t debounce_config; /* Debounce filter configuration 
*/
+  const struct comp_callback_s *cb;           /* Upper driver callback */
+  bool initialized;                           /* Comparator unit initialized */
+  bool cross_pos;                             /* Indication of cross type */
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static int esp_ana_cmpr_bind(FAR struct comp_dev_s *dev,
+                             FAR const struct comp_callback_s *callback);
+static int esp_ana_cmpr_setup(FAR struct comp_dev_s *dev);
+static void esp_ana_cmpr_shutdown(FAR struct comp_dev_s *dev);
+static int esp_ana_cmpr_read(FAR struct comp_dev_s *dev);
+static int esp_ana_cmpr_ioctl(FAR struct comp_dev_s *dev,
+                              int cmd, unsigned long arg);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const struct comp_ops_s g_esp_ana_ops =
+{
+  .ao_bind = esp_ana_cmpr_bind,
+  .ao_setup = esp_ana_cmpr_setup,
+  .ao_shutdown = esp_ana_cmpr_shutdown,
+  .ao_read = esp_ana_cmpr_read,
+  .ao_ioctl = esp_ana_cmpr_ioctl,
+};
+
+#ifdef CONFIG_ESPRESSIF_ANA_COMPR0
+
+ana_cmpr_internal_ref_config_t ana_cmpr0_ref_cfg =
+{
+#if defined(CONFIG_ESPRESSIF_ANA_COMPR0_REF_VOLT_0_VDD)
+  .ref_volt = ANA_CMPR_REF_VOLT_0_PCT_VDD
+#elif defined(CONFIG_ESPRESSIF_ANA_COMPR0_REF_VOLT_10_VDD)
+  .ref_volt = ANA_CMPR_REF_VOLT_10_PCT_VDD
+#elif defined(CONFIG_ESPRESSIF_ANA_COMPR0_REF_VOLT_20_VDD)
+  .ref_volt = ANA_CMPR_REF_VOLT_20_PCT_VDD
+#elif defined(CONFIG_ESPRESSIF_ANA_COMPR0_REF_VOLT_30_VDD)
+  .ref_volt = ANA_CMPR_REF_VOLT_30_PCT_VDD
+#elif defined(CONFIG_ESPRESSIF_ANA_COMPR0_REF_VOLT_40_VDD)
+  .ref_volt = ANA_CMPR_REF_VOLT_40_PCT_VDD
+#elif defined(CONFIG_ESPRESSIF_ANA_COMPR0_REF_VOLT_50_VDD)
+  .ref_volt = ANA_CMPR_REF_VOLT_50_PCT_VDD
+#elif defined(CONFIG_ESPRESSIF_ANA_COMPR0_REF_VOLT_60_VDD)
+  .ref_volt = ANA_CMPR_REF_VOLT_60_PCT_VDD
+#elif defined(CONFIG_ESPRESSIF_ANA_COMPR0_REF_VOLT_70_VDD)
+  .ref_volt = ANA_CMPR_REF_VOLT_70_PCT_VDD
+#endif
+};
+
+ana_cmpr_config_t g_esp_ana_cmpr0_config =
+{
+  .unit = 0,
+  .clk_src = ANA_CMPR_CLK_SRC_DEFAULT,
+#ifdef CONFIG_ESPRESSIF_ANA_COMPR0_REF_SRC_INTERNAL
+  .ref_src = ANA_CMPR_REF_SRC_INTERNAL,
+#else
+  .ref_src = ANA_CMPR_REF_SRC_EXTERNAL,
+#endif
+  .cross_type = ANA_CMPR_CROSS_ANY,
+};
+
+struct esp_ana_cmpr_priv_s g_esp_ana_cmpr0_priv =
+{
+  .handle = NULL,
+  .config = &g_esp_ana_cmpr0_config,
+  .ref_cfg = &ana_cmpr0_ref_cfg,
+  .debounce_config =
+  {
+    .wait_us = CONFIG_ESPRESSIF_ANA_COMPR0_DEBOUNCE * 1000,
+  },
+  .cb = NULL,
+  .initialized = false,
+  .cross_pos = false,
+};
+
+static struct comp_dev_s g_esp_ana_cmpr0 =
+{
+  .ad_ops = &g_esp_ana_ops,
+  .ad_priv = &g_esp_ana_cmpr0_priv,
+};
+#endif
+
+#ifdef CONFIG_ESPRESSIF_ANA_COMPR1
+ana_cmpr_internal_ref_config_t ana_cmpr1_ref_cfg =
+{
+#if defined(CONFIG_ESPRESSIF_ANA_COMPR1_REF_VOLT_0_VDD)
+  .ref_volt = ANA_CMPR_REF_VOLT_0_PCT_VDD
+#elif defined(CONFIG_ESPRESSIF_ANA_COMPR1_REF_VOLT_10_VDD)
+  .ref_volt = ANA_CMPR_REF_VOLT_10_PCT_VDD
+#elif defined(CONFIG_ESPRESSIF_ANA_COMPR1_REF_VOLT_20_VDD)
+  .ref_volt = ANA_CMPR_REF_VOLT_20_PCT_VDD
+#elif defined(CONFIG_ESPRESSIF_ANA_COMPR1_REF_VOLT_30_VDD)
+  .ref_volt = ANA_CMPR_REF_VOLT_30_PCT_VDD
+#elif defined(CONFIG_ESPRESSIF_ANA_COMPR1_REF_VOLT_40_VDD)
+  .ref_volt = ANA_CMPR_REF_VOLT_40_PCT_VDD
+#elif defined(CONFIG_ESPRESSIF_ANA_COMPR1_REF_VOLT_50_VDD)
+  .ref_volt = ANA_CMPR_REF_VOLT_50_PCT_VDD
+#elif defined(CONFIG_ESPRESSIF_ANA_COMPR1_REF_VOLT_60_VDD)
+  .ref_volt = ANA_CMPR_REF_VOLT_60_PCT_VDD
+#elif defined(CONFIG_ESPRESSIF_ANA_COMPR1_REF_VOLT_70_VDD)
+  .ref_volt = ANA_CMPR_REF_VOLT_70_PCT_VDD
+#endif
+};
+
+ana_cmpr_config_t g_esp_ana_cmpr1_config =
+{
+  .unit = 1,
+  .clk_src = ANA_CMPR_CLK_SRC_DEFAULT,
+#ifdef CONFIG_ESPRESSIF_ANA_COMPR1_REF_SRC_INTERNAL
+  .ref_src = ANA_CMPR_REF_SRC_INTERNAL,
+#else
+  .ref_src = ANA_CMPR_REF_SRC_EXTERNAL,
+#endif
+  .cross_type = ANA_CMPR_CROSS_ANY,
+};
+
+struct esp_ana_cmpr_priv_s g_esp_ana_cmpr1_priv =
+{
+  .handle = NULL,
+  .config = &g_esp_ana_cmpr1_config,
+  .ref_cfg = &ana_cmpr1_ref_cfg,
+  .debounce_config =
+  {
+    .wait_us = CONFIG_ESPRESSIF_ANA_COMPR1_DEBOUNCE * 1000,
+  },
+  .cb = NULL,
+  .initialized = false,
+  .cross_pos = false,
+};
+
+static struct comp_dev_s g_esp_ana_cmpr1 =
+{
+  .ad_ops = &g_esp_ana_ops,
+  .ad_priv = &g_esp_ana_cmpr1_priv
+};
+#endif
+
+/****************************************************************************
+ * Private functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp_ana_cmpr_bind
+ *
+ * Description:
+ *   Bind the upper-half driver callbacks to the lower-half implementation.
+ *
+ * Input Parameters:
+ *   dev      - Comparator upper layer struct.
+ *   callback - Pointer to the upper-half driver callback structure.
+ *
+ * Returned Value:
+ *   OK.
+ *
+ ****************************************************************************/
+
+static int esp_ana_cmpr_bind(FAR struct comp_dev_s *dev,
+                             FAR const struct comp_callback_s *callback)
+{
+  struct esp_ana_cmpr_priv_s *priv = dev->ad_priv;
+  DEBUGASSERT(priv);
+
+  priv->cb = callback;
+  return OK;
+}
+
+/****************************************************************************
+ * Name: esp_ana_cmpr_setup
+ *
+ * Description:
+ *   Configure the COMP.
+ *
+ * Input Parameters:
+ *   dev - Comparator upper layer struct.
+ *
+ * Returned Value:
+ *   OK.
+ *
+ ****************************************************************************/
+
+static int esp_ana_cmpr_setup(FAR struct comp_dev_s *dev)
+{
+  struct esp_ana_cmpr_priv_s *priv = dev->ad_priv;
+  DEBUGASSERT(priv);
+
+  if (priv->initialized != true)
+    {
+      ana_cmpr_enable(priv->handle);
+      priv->initialized = true;
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: esp_ana_cmpr_shutdown
+ *
+ * Description:
+ *   Disable the COMP.
+ *
+ * Input Parameters:
+ *   dev - Comparator upper layer struct.
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+static void esp_ana_cmpr_shutdown(FAR struct comp_dev_s *dev)
+{
+  struct esp_ana_cmpr_priv_s *priv = dev->ad_priv;
+  DEBUGASSERT(priv);
+
+  if (priv->initialized == true)
+    {
+      ana_cmpr_disable(priv->handle);
+      priv->initialized = false;
+    }
+}
+
+/****************************************************************************
+ * Name: esp_ana_cmpr_read
+ *
+ * Description:
+ *   Read COMP output state.
+ *
+ * Input Parameters:
+ *   dev - Comparator upper layer struct.
+ *
+ * Returned Value:
+ *   True if channel is higher than reference, false otherwise.
+ *
+ ****************************************************************************/
+
+static int esp_ana_cmpr_read(FAR struct comp_dev_s *dev)
+{
+  struct esp_ana_cmpr_priv_s *priv = dev->ad_priv;
+  DEBUGASSERT(priv);
+
+  return priv->cross_pos;
+}
+
+/****************************************************************************
+ * Name: esp_ana_cmpr_ioctl
+ *
+ * Description:
+ *   All ioctl calls will be routed through this method
+ *
+ * Input Parameters:
+ *   dev  - Pointer to the comparator device structure.
+ *   cmd  - The ioctl command.
+ *   arg  - The argument for the ioctl command.
+ *
+ * Returned Value:
+ *   OK.
+ *
+ ****************************************************************************/
+
+static int esp_ana_cmpr_ioctl(FAR struct comp_dev_s *dev,
+                              int cmd, unsigned long arg)
+{
+  struct esp_ana_cmpr_priv_s *priv = dev->ad_priv;
+  DEBUGASSERT(priv);
+
+  ainfo("Analog comparator ioctl calls did not implement\n");
+  return OK;
+}
+
+/****************************************************************************
+ * Name: esp_ana_cmpr_callback
+ *
+ * Description:
+ *   Callaback function for comparator.
+ *
+ * Input Parameters:
+ *   cmpr     - Handle of comparator unit.
+ *   edata    - Interrupt event information
+ *   user_ctx - User callback data
+ *
+ * Returned Value:
+ *   False.
+ *
+ ****************************************************************************/
+
+static bool esp_ana_cmpr_callback(ana_cmpr_handle_t cmpr,
+                                  const ana_cmpr_cross_event_data_t *edata,
+                                  void *user_ctx)
+{
+  struct comp_dev_s *dev = (struct comp_dev_s *)user_ctx;
+  struct esp_ana_cmpr_priv_s *priv = dev->ad_priv;
+  DEBUGASSERT(priv);
+
+#ifdef SOC_ANA_CMPR_CAN_DISTINGUISH_EDGE
+  if (edata->cross_type == ANA_CMPR_CROSS_POS)
+    {
+      ainfo("Comparator unit%d: Positive cross event triggered\n",
+             priv->config->unit);
+      priv->cross_pos = true;
+    }
+  else
+    {
+      ainfo("Comparator unit%d: Negative cross event triggered\n",
+            priv->config->unit);
+      priv->cross_pos = false;
+    }
+#else
+  ainfo("Comparator unit%d: Any cross event triggered\n",
+        priv->config->unit);
+  priv->cross_pos = true;
+#endif
+
+  if (priv->cb != NULL)
+    {
+      priv->cb->au_notify(dev, priv->cross_pos);
+    }
+
+  return false;
+}
+
+/****************************************************************************
+ * Name: esp_ana_cmpr_init
+ *
+ * Description:
+ *   Initialize analog comparator hardware and then register.
+ *
+ * Input Parameters:
+ *   dev - Comparator upper layer struct.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success. Otherwise -1 (ERROR).
+ *
+ ****************************************************************************/
+
+static int esp_ana_cmpr_init(struct comp_dev_s *dev)
+{
+  int ret;
+  char path[32];
+  struct esp_ana_cmpr_priv_s *priv = dev->ad_priv;
+  ana_cmpr_event_callbacks_t cbs =
+    {
+      .on_cross = esp_ana_cmpr_callback,
+    };
+
+  ret = ana_cmpr_new_unit(priv->config, &priv->handle);
+  if (ret != OK)
+    {
+      return ret;
+    }
+
+  ana_cmpr_set_internal_reference(priv->handle, priv->ref_cfg);
+
+  snprintf(path, sizeof(path), "/dev/anacmpr%d", priv->config->unit);
+  ret = comp_register(path, dev);
+  if (ret != OK)
+    {
+      aerr("Comparator register failed for %s\n", path);
+      return ret;
+    }
+
+  ana_cmpr_set_debounce(priv->handle, &priv->debounce_config);
+  ana_cmpr_register_event_callbacks(priv->handle, &cbs, dev);
+  ana_cmpr_enable(priv->handle);
+  priv->initialized = true;
+
+  return OK;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp_cmprinitialize
+ *
+ * Description:
+ *   Initialize and register the analog comparator driver.
+ *
+ * Input Parameters:
+ *   unit - Unit number of the comparator interface to be initialized.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success. Otherwise -1 (ERROR).
+ *
+ ****************************************************************************/
+
+int esp_cmprinitialize(int unit)
+{
+  struct comp_dev_s *dev;
+  int ret;
+
+  switch (unit)
+    {
+#ifdef CONFIG_ESPRESSIF_ANA_COMPR0
+    case ESPRESSIF_COMP0:
+      dev = &g_esp_ana_cmpr0;
+      break;
+#endif
+#ifdef CONFIG_ESPRESSIF_ANA_COMPR1
+    case ESPRESSIF_COMP1:
+      dev = &g_esp_ana_cmpr1;
+      break;
+#endif
+    default:
+      aerr("Invalid unit number\n");
+      return ERROR;
+    }
+
+  ret = esp_ana_cmpr_init(dev);
+  if (ret != OK)
+    {
+      aerr("Analog comparator unit%d initialization failed!\n", unit);
+      return ret;
+    }
+
+  ainfo("Analog comparator unit%d initialized! Handler: %p\n",
+        unit, dev);
+  return ret;
+}
diff --git a/arch/risc-v/src/common/espressif/esp_ana_cmpr.h 
b/arch/risc-v/src/common/espressif/esp_ana_cmpr.h
new file mode 100644
index 00000000000..7d4edbf378b
--- /dev/null
+++ b/arch/risc-v/src/common/espressif/esp_ana_cmpr.h
@@ -0,0 +1,91 @@
+/****************************************************************************
+ * arch/risc-v/src/common/espressif/esp_ana_cmpr.h
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_RISCV_SRC_COMMON_ESPRESSIF_ESP_ANA_CMPR_H
+#define __ARCH_RISCV_SRC_COMMON_ESPRESSIF_ESP_ANA_CMPR_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifdef CONFIG_ESPRESSIF_ANA_COMPR0
+#  define ESPRESSIF_COMP0 0
+#endif
+
+#ifdef CONFIG_ESPRESSIF_ANA_COMPR1
+#  define ESPRESSIF_COMP1 1
+#endif
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Inline Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp_cmprinitialize
+ *
+ * Description:
+ *   Initialize the analog comparator driver.
+ *
+ * Input Parameters:
+ *   unit - Unit number of the comparator interface to be initialized.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success. Otherwise -1 (ERROR).
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_COMP
+int esp_cmprinitialize(int unit);
+#endif
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ARCH_RISCV_SRC_COMMON_ESPRESSIF_ESP_ANA_CMPR_H */
diff --git a/arch/risc-v/src/esp32h2/hal_esp32h2.cmake 
b/arch/risc-v/src/esp32h2/hal_esp32h2.cmake
index 039eb4b5989..15aa30e8297 100644
--- a/arch/risc-v/src/esp32h2/hal_esp32h2.cmake
+++ b/arch/risc-v/src/esp32h2/hal_esp32h2.cmake
@@ -52,6 +52,8 @@ target_include_directories(
     ${ESP_HAL_3RDPARTY_REPO}/components/esp_blockdev/include
     ${ESP_HAL_3RDPARTY_REPO}/components/esp_common/include
     ${ESP_HAL_3RDPARTY_REPO}/components/esp_event/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_cmpr/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_cmpr/${CHIP_SERIES}/include
     ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/${CHIP_SERIES}/include
     ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/include
     ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_clock/${CHIP_SERIES}/include
@@ -153,6 +155,8 @@ target_include_directories(
     ${ESP_HAL_3RDPARTY_REPO}/components/ulp/lp_core/include
     ${ESP_HAL_3RDPARTY_REPO}/components/ulp/ulp_common
     ${ESP_HAL_3RDPARTY_REPO}/components/ulp/ulp_common/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_ana_cmpr/include
+    
${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_ana_cmpr/${CHIP_SERIES}/include
     ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_dma/include
     ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_dma/src
     ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_gpio/include
@@ -250,6 +254,8 @@ list(APPEND HAL_SRCS
 list(
   APPEND
   HAL_SRCS
+  
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_cmpr/${CHIP_SERIES}/ana_cmpr_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_ana_cmpr/ana_cmpr.c
   ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/adc_share_hw_ctrl.c
   ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/clk_ctrl_os.c
   ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/clk_utils.c
@@ -281,6 +287,7 @@ list(
   
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/esp_clk_tree.c
   
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/esp_cpu_intr.c
   
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/cpu_region_protect.c
+  
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/io_mux.c
   
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/peripheral_domain_pd.c
   
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/pmu_init.c
   
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/pmu_param.c
diff --git a/arch/risc-v/src/esp32h2/hal_esp32h2.mk 
b/arch/risc-v/src/esp32h2/hal_esp32h2.mk
index 74f8fecb518..fc5257e68cc 100644
--- a/arch/risc-v/src/esp32h2/hal_esp32h2.mk
+++ b/arch/risc-v/src/esp32h2/hal_esp32h2.mk
@@ -39,6 +39,8 @@ INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
 INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_blockdev$(DELIM)include
 INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_common$(DELIM)include
 INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_event$(DELIM)include
+INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_cmpr$(DELIM)include
+INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_cmpr$(DELIM)$(CHIP_SERIES)$(DELIM)include
 INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_conv$(DELIM)$(CHIP_SERIES)$(DELIM)include
 INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_conv$(DELIM)include
 INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_dma$(DELIM)$(CHIP_SERIES)$(DELIM)include
@@ -118,6 +120,8 @@ INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
 INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)include
 INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)platform_port$(DELIM)include
 INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)heap$(DELIM)include
+INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_ana_cmpr$(DELIM)include
+INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_ana_cmpr$(DELIM)$(CHIP_SERIES)$(DELIM)include
 INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_dma$(DELIM)include
 INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_dma$(DELIM)src
 INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log
@@ -186,6 +190,7 @@ CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efus
 CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_table_v0.0_v1.1.c
 CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)efuse_controller$(DELIM)keys$(DELIM)with_key_purposes$(DELIM)esp_efuse_api_key.c
 CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_common$(DELIM)src$(DELIM)esp_err_to_name.c
+CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_cmpr$(DELIM)$(CHIP_SERIES)$(DELIM)ana_cmpr_periph.c
 CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)adc_share_hw_ctrl.c
 CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)clk_ctrl_os.c
 CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)cpu.c
@@ -218,6 +223,7 @@ CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_
 CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)esp_clk_tree.c
 CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)esp_cpu_intr.c
 CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)cpu_region_protect.c
+CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)io_mux.c
 CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)peripheral_domain_pd.c
 CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)pmu_init.c
 CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)pmu_param.c
@@ -343,6 +349,7 @@ CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_
 CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)flash_mmap.c
 CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)flash_brownout_hook.c
 CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)cache_utils.c
+CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_ana_cmpr$(DELIM)ana_cmpr.c
 CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_rmt$(DELIM)src$(DELIM)rmt_common.c
 CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_rmt$(DELIM)src$(DELIM)rmt_encoder.c
 CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_rmt$(DELIM)src$(DELIM)rmt_encoder_bytes.c
diff --git a/arch/risc-v/src/esp32p4/hal_esp32p4.cmake 
b/arch/risc-v/src/esp32p4/hal_esp32p4.cmake
index e8f78ee48e8..eb0e8e65929 100644
--- a/arch/risc-v/src/esp32p4/hal_esp32p4.cmake
+++ b/arch/risc-v/src/esp32p4/hal_esp32p4.cmake
@@ -55,6 +55,8 @@ set(ESP32P4_INCLUDES
     ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_touch_sens/hw_ver3
     ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_touch_sens/hw_ver3/include
     ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_touch_sens/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_cmpr/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_cmpr/${CHIP_SERIES}/include
     ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/${CHIP_SERIES}/include
     ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/include
     ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_cam/${CHIP_SERIES}/include
@@ -165,6 +167,8 @@ set(ESP32P4_INCLUDES
     ${ESP_HAL_3RDPARTY_REPO}/components/ulp/lp_core/include
     ${ESP_HAL_3RDPARTY_REPO}/components/ulp/ulp_common
     ${ESP_HAL_3RDPARTY_REPO}/components/ulp/ulp_common/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_ana_cmpr/include
+    
${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_ana_cmpr/${CHIP_SERIES}/include
     ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_dma/include
     ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_dma/src
     ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_gpio/include
@@ -253,6 +257,7 @@ list(
   
${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/${CHIP_SERIES}/curve_fitting_coefficients.c
   ${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/adc_cali_curve_fitting.c
   ${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/adc_cali.c
+  
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_cmpr/${CHIP_SERIES}/ana_cmpr_periph.c
   
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/${CHIP_SERIES}/adc_periph.c
   
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/${CHIP_SERIES}/temperature_sensor_periph.c
   ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/adc_hal_common.c
@@ -429,6 +434,7 @@ list(
   ${ESP_HAL_3RDPARTY_REPO}/components/ulp/lp_core/lp_core.c
   
${ESP_HAL_3RDPARTY_REPO}/components/ulp/lp_core/shared/ulp_lp_core_memory_shared.c
   
${ESP_HAL_3RDPARTY_REPO}/components/ulp/lp_core/shared/ulp_lp_core_lp_timer_shared.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_ana_cmpr/ana_cmpr.c
   ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_dma/src/esp_dma_utils.c
   ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_dma/src/gdma_link.c
   ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_dma/src/gdma.c
diff --git a/arch/risc-v/src/esp32p4/hal_esp32p4.mk 
b/arch/risc-v/src/esp32p4/hal_esp32p4.mk
index c4a04ae12e0..aedf5cf4901 100644
--- a/arch/risc-v/src/esp32p4/hal_esp32p4.mk
+++ b/arch/risc-v/src/esp32p4/hal_esp32p4.mk
@@ -45,6 +45,8 @@ INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
 INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_touch_sens$(DELIM)hw_ver3
 INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_touch_sens$(DELIM)hw_ver3$(DELIM)include
 INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_touch_sens$(DELIM)include
+INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_cmpr$(DELIM)include
+INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_cmpr$(DELIM)$(CHIP_SERIES)$(DELIM)include
 INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_conv$(DELIM)$(CHIP_SERIES)$(DELIM)include
 INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_conv$(DELIM)include
 INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_cam$(DELIM)$(CHIP_SERIES)$(DELIM)include
@@ -160,6 +162,8 @@ INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
 INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)lp_core$(DELIM)include
 INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)ulp_common
 INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)ulp_common$(DELIM)include
+INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_ana_cmpr$(DELIM)include
+INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_ana_cmpr$(DELIM)$(CHIP_SERIES)$(DELIM)include
 INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_dma$(DELIM)include
 INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_dma$(DELIM)src
 INCLUDES += 
$(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_gpio$(DELIM)include
@@ -218,6 +222,7 @@ CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_
 CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_touch_sens$(DELIM)common$(DELIM)touch_sens_common.c
 CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_touch_sens$(DELIM)hw_ver3$(DELIM)touch_version_specific.c
 CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_touch_sens$(DELIM)$(CHIP_SERIES)$(DELIM)touch_sensor_periph.c
+CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_cmpr$(DELIM)$(CHIP_SERIES)$(DELIM)ana_cmpr_periph.c
 CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_conv$(DELIM)$(CHIP_SERIES)$(DELIM)adc_periph.c
 CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_conv$(DELIM)$(CHIP_SERIES)$(DELIM)temperature_sensor_periph.c
 CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_conv$(DELIM)adc_hal_common.c
@@ -405,6 +410,7 @@ CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$
 CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)lp_core$(DELIM)lp_core.c
 CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)lp_core$(DELIM)shared$(DELIM)ulp_lp_core_memory_shared.c
 CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)lp_core$(DELIM)shared$(DELIM)ulp_lp_core_lp_timer_shared.c
+CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_ana_cmpr$(DELIM)ana_cmpr.c
 CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_dma$(DELIM)src$(DELIM)esp_dma_utils.c
 CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_dma$(DELIM)src$(DELIM)gdma_link.c
 CHIP_CSRCS += 
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_dma$(DELIM)src$(DELIM)gdma.c


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