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xiaoxiang781216 pushed a commit to branch releases/13.0
in repository https://gitbox.apache.org/repos/asf/nuttx.git

commit f2a5d1f817f705a17cedfad6084dfca2e56f950b
Author: Sammy Tran <[email protected]>
AuthorDate: Fri Jun 19 16:42:21 2026 -0400

    stm32h5/qspi: add QSPIMEM_QUADDATA flag for 1-1-4 transfers
    
    Add QSPIMEM_QUADDATA to the QSPI memory flags. This flag selects quad
    data width while keeping the address phase on a single line (1-1-4),
    which QSPIMEM_QUADIO cannot express (it forces quad on both address and
    data phases). Update stm32_qspi_memory() to honour the new flag by
    setting CCR_DMODE_QUAD without touching the address mode.
    
    Signed-off-by: Sammy Tran <[email protected]>
---
 arch/arm/src/stm32h5/stm32_qspi.c | 9 ++++++++-
 include/nuttx/spi/qspi.h          | 2 ++
 2 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/arch/arm/src/stm32h5/stm32_qspi.c 
b/arch/arm/src/stm32h5/stm32_qspi.c
index fa0448187bd..208feef2bad 100644
--- a/arch/arm/src/stm32h5/stm32_qspi.c
+++ b/arch/arm/src/stm32h5/stm32_qspi.c
@@ -921,8 +921,15 @@ static int qspi_setupxctnfrommem(struct qspi_xctnspec_s 
*xctn,
     {
       xctn->datamode = CCR_DMODE_DUAL;
     }
-  else if (QSPIMEM_ISQUADIO(meminfo->flags))
+  else if (QSPIMEM_ISQUADIO(meminfo->flags) ||
+           QSPIMEM_ISQUADDATA(meminfo->flags))
     {
+      /* QUADDATA selects quad data width while leaving the address phase
+       * single-line (1-1-4), which QUADIO cannot express. The address-mode
+       * block above intentionally ignores QUADDATA, so addrmode stays
+       * single.
+       */
+
       xctn->datamode = CCR_DMODE_QUAD;
     }
   else
diff --git a/include/nuttx/spi/qspi.h b/include/nuttx/spi/qspi.h
index eecce3bbc6c..77d8bdfcbe6 100644
--- a/include/nuttx/spi/qspi.h
+++ b/include/nuttx/spi/qspi.h
@@ -216,11 +216,13 @@
 #define QSPIMEM_RANDOM        (1 << 6)  /* Bit 6: Use random key in scrambler  
*/
 #define QSPIMEM_IDUAL         (1 << 7)  /* Bit 7: Instruction on two lines     
*/
 #define QSPIMEM_IQUAD         (1 << 0)  /* Bit 0: Instruction on four lines    
*/
+#define QSPIMEM_QUADDATA      (1 << 1)  /* Bit 1: Quad data, single-line addr  
*/
 
 #define QSPIMEM_ISREAD(f)     (((f) & QSPIMEM_WRITE) == 0)
 #define QSPIMEM_ISWRITE(f)    (((f) & QSPIMEM_WRITE) != 0)
 #define QSPIMEM_ISDUALIO(f)   (((f) & QSPIMEM_DUALIO) != 0)
 #define QSPIMEM_ISQUADIO(f)   (((f) & QSPIMEM_QUADIO) != 0)
+#define QSPIMEM_ISQUADDATA(f) (((f) & QSPIMEM_QUADDATA) != 0)
 #define QSPIMEM_ISSCRAMBLE(f) (((f) & QSPIMEM_SCRAMBLE) != 0)
 #define QSPIMEM_ISIDUAL(f)    (((f) & QSPIMEM_IDUAL) != 0)
 #define QSPIMEM_ISIQUAD(f)    (((f) & QSPIMEM_IQUAD) != 0)

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