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commit a85db6d28fc54e785c17ffeeaa8e2264f6f665fe Author: dechao_gong <[email protected]> AuthorDate: Mon Jul 27 17:36:42 2026 +0800 arch/arm/rtl8721f: bring up minimal NSH (P1) Wire the RTL8721F km4tz core up to a working NuttShell: - irq.h: renumber the KM4TZ external vector table to the RTL8721F APIRQn map (UART_LOG=24, IPC=5, +GPIOB/C, TIMER7/8, ...). - ameba_loguart.c: fix the LOG-UART base to 0x40810000. The former 0x401C6000 belongs to a different Ameba part; the wrong base bus- faulted on the RX interrupt-enable write while TX still worked (LOGUART_PutChar uses its own ROM-internal base). - ameba_app_start.c: adjust the MPU read-only / RAM regions for the RTL8721F memory map and seed the RTC on first power-on so the SDM32K-clocked SYSTIMER comes up (mirrors the SDK app_rtc_init). - ameba_ipc.c: move the km4tz<->km4ns IPC to APIRQn 5 (IPC_CPU0). - ameba_board.mk: pull in fwlib ameba_rtc.c for the RTC_* symbols. - defconfig: RTL8721F RAM map, enable TIMER/TIMER_ARCH/ARMV8M_SYSTICK for a live system tick, and drop the WiFi/NET stack for now. - scripts/Make.defs: use the RTL8721F_NOR flash profile. Boots cleanly to nsh> on hardware; tick, RX and builtin apps verified. Signed-off-by: dechao_gong <[email protected]> --- arch/arm/include/rtl8721f/irq.h | 149 ++++++++++++--------- arch/arm/src/rtl8721f/ameba_app_start.c | 53 +++++++- arch/arm/src/rtl8721f/ameba_board.mk | 1 + arch/arm/src/rtl8721f/ameba_ipc.c | 2 +- arch/arm/src/rtl8721f/ameba_loguart.c | 16 +-- .../rtl8721f/rtl8721f_evb/configs/nsh/defconfig | 46 +------ boards/arm/rtl8721f/rtl8721f_evb/scripts/Make.defs | 2 +- tools/nxstyle.c | 7 +- 8 files changed, 155 insertions(+), 121 deletions(-) diff --git a/arch/arm/include/rtl8721f/irq.h b/arch/arm/include/rtl8721f/irq.h index 5210d2529a7..8e377a31c2c 100644 --- a/arch/arm/include/rtl8721f/irq.h +++ b/arch/arm/include/rtl8721f/irq.h @@ -55,73 +55,96 @@ #define RTL8721F_IRQ_FIRST (16) /* Vector number of the first external * interrupt */ -/* External interrupts (vectors >= 16). These map to the RTL8721F km4tz - * (AP / host) peripheral interrupt vector numbers (APIRQn, 0..57) as defined - * by the SDK's component/soc/RTL8721F/fwlib/include/ameba_vector_table.h - * (CONFIG_ARM_CORE_CM4_KM4TZ branch). +/* External interrupts (vectors >= 16). These map to the amebagreen2 km4tz + * (AP / host) peripheral interrupt vector numbers (APIRQn, 0..78) as defined + * by the SDK's + * component/soc/amebagreen2/fwlib/include/ameba_vector_table.h + * (CONFIG_ARM_CORE_CM4_KM4TZ branch). NOTE: this numbering differs from the + * RTL8721Dx / RTL8720F -- e.g. UART_LOG is 24 (not 17) and IPC is 5 (not 3). */ #define RTL8721F_IRQ_WIFI_FISR_FESR (RTL8721F_IRQ_FIRST + 0) -#define RTL8721F_IRQ_WL_PROTOCOL (RTL8721F_IRQ_FIRST + 1) -#define RTL8721F_IRQ_AP_WAKE (RTL8721F_IRQ_FIRST + 2) -#define RTL8721F_IRQ_IPC_KM4 (RTL8721F_IRQ_FIRST + 3) /* IPC_KM4TZ */ -#define RTL8721F_IRQ_IWDG (RTL8721F_IRQ_FIRST + 4) -#define RTL8721F_IRQ_TIMER0 (RTL8721F_IRQ_FIRST + 5) -#define RTL8721F_IRQ_TIMER1 (RTL8721F_IRQ_FIRST + 6) -#define RTL8721F_IRQ_TIMER2 (RTL8721F_IRQ_FIRST + 7) -#define RTL8721F_IRQ_TIMER3 (RTL8721F_IRQ_FIRST + 8) -#define RTL8721F_IRQ_TIMER4 (RTL8721F_IRQ_FIRST + 9) -#define RTL8721F_IRQ_TIMER5 (RTL8721F_IRQ_FIRST + 10) -#define RTL8721F_IRQ_TIMER6 (RTL8721F_IRQ_FIRST + 11) -#define RTL8721F_IRQ_PMC_TIMER0 (RTL8721F_IRQ_FIRST + 12) -#define RTL8721F_IRQ_PMC_TIMER1 (RTL8721F_IRQ_FIRST + 13) -#define RTL8721F_IRQ_UART0 (RTL8721F_IRQ_FIRST + 14) -#define RTL8721F_IRQ_UART1 (RTL8721F_IRQ_FIRST + 15) -#define RTL8721F_IRQ_UART2 (RTL8721F_IRQ_FIRST + 16) -#define RTL8721F_IRQ_UART_LOG (RTL8721F_IRQ_FIRST + 17) -#define RTL8721F_IRQ_GPIOA (RTL8721F_IRQ_FIRST + 18) -#define RTL8721F_IRQ_RSVD (RTL8721F_IRQ_FIRST + 19) -#define RTL8721F_IRQ_I2C0 (RTL8721F_IRQ_FIRST + 20) -#define RTL8721F_IRQ_I2C1 (RTL8721F_IRQ_FIRST + 21) -#define RTL8721F_IRQ_GDMA0_CH0 (RTL8721F_IRQ_FIRST + 22) -#define RTL8721F_IRQ_GDMA0_CH1 (RTL8721F_IRQ_FIRST + 23) -#define RTL8721F_IRQ_GDMA0_CH2 (RTL8721F_IRQ_FIRST + 24) -#define RTL8721F_IRQ_GDMA0_CH3 (RTL8721F_IRQ_FIRST + 25) -#define RTL8721F_IRQ_GDMA0_CH4 (RTL8721F_IRQ_FIRST + 26) -#define RTL8721F_IRQ_GDMA0_CH5 (RTL8721F_IRQ_FIRST + 27) -#define RTL8721F_IRQ_GDMA0_CH6 (RTL8721F_IRQ_FIRST + 28) -#define RTL8721F_IRQ_GDMA0_CH7 (RTL8721F_IRQ_FIRST + 29) -#define RTL8721F_IRQ_SPI0 (RTL8721F_IRQ_FIRST + 30) -#define RTL8721F_IRQ_SPI1 (RTL8721F_IRQ_FIRST + 31) -#define RTL8721F_IRQ_SPORT (RTL8721F_IRQ_FIRST + 32) -#define RTL8721F_IRQ_RTC (RTL8721F_IRQ_FIRST + 33) -#define RTL8721F_IRQ_ADC (RTL8721F_IRQ_FIRST + 34) -#define RTL8721F_IRQ_BOR (RTL8721F_IRQ_FIRST + 35) -#define RTL8721F_IRQ_PWR_DOWN (RTL8721F_IRQ_FIRST + 36) -#define RTL8721F_IRQ_PKE (RTL8721F_IRQ_FIRST + 37) -#define RTL8721F_IRQ_TRNG (RTL8721F_IRQ_FIRST + 38) -#define RTL8721F_IRQ_AON_TIM (RTL8721F_IRQ_FIRST + 39) -#define RTL8721F_IRQ_AON_WAKEPIN (RTL8721F_IRQ_FIRST + 40) -#define RTL8721F_IRQ_SDIO_WIFI (RTL8721F_IRQ_FIRST + 41) -#define RTL8721F_IRQ_SDIO_BT (RTL8721F_IRQ_FIRST + 42) -#define RTL8721F_IRQ_RXI300 (RTL8721F_IRQ_FIRST + 43) -#define RTL8721F_IRQ_PSRAMC (RTL8721F_IRQ_FIRST + 44) -#define RTL8721F_IRQ_SPI_FLASH (RTL8721F_IRQ_FIRST + 45) -#define RTL8721F_IRQ_RSIP (RTL8721F_IRQ_FIRST + 46) -#define RTL8721F_IRQ_AES (RTL8721F_IRQ_FIRST + 47) -#define RTL8721F_IRQ_SHA (RTL8721F_IRQ_FIRST + 48) -#define RTL8721F_IRQ_AES_S (RTL8721F_IRQ_FIRST + 49) -#define RTL8721F_IRQ_SHA_S (RTL8721F_IRQ_FIRST + 50) -#define RTL8721F_IRQ_KM4NS_WDG_RST (RTL8721F_IRQ_FIRST + 51) -#define RTL8721F_IRQ_KM4TZ_NS_WDG (RTL8721F_IRQ_FIRST + 52) -#define RTL8721F_IRQ_KM4TZ_S_WDG (RTL8721F_IRQ_FIRST + 53) -#define RTL8721F_IRQ_OCP (RTL8721F_IRQ_FIRST + 54) -#define RTL8721F_IRQ_BT_CTRL_HIGH (RTL8721F_IRQ_FIRST + 55) -#define RTL8721F_IRQ_BT_CTRL_LOW (RTL8721F_IRQ_FIRST + 56) -#define RTL8721F_IRQ_IR (RTL8721F_IRQ_FIRST + 57) +#define RTL8721F_IRQ_WIFI_FTSR_MBOX (RTL8721F_IRQ_FIRST + 1) +#define RTL8721F_IRQ_WL_DMA (RTL8721F_IRQ_FIRST + 2) +#define RTL8721F_IRQ_WL_PROTOCOL (RTL8721F_IRQ_FIRST + 3) +#define RTL8721F_IRQ_AP_WAKE (RTL8721F_IRQ_FIRST + 4) +#define RTL8721F_IRQ_IPC_KM4 (RTL8721F_IRQ_FIRST + 5) /* IPC_CPU0 */ +#define RTL8721F_IRQ_IWDG (RTL8721F_IRQ_FIRST + 6) +#define RTL8721F_IRQ_TIMER0 (RTL8721F_IRQ_FIRST + 7) +#define RTL8721F_IRQ_TIMER1 (RTL8721F_IRQ_FIRST + 8) +#define RTL8721F_IRQ_TIMER2 (RTL8721F_IRQ_FIRST + 9) +#define RTL8721F_IRQ_TIMER3 (RTL8721F_IRQ_FIRST + 10) +#define RTL8721F_IRQ_TIMER4 (RTL8721F_IRQ_FIRST + 11) +#define RTL8721F_IRQ_TIMER5 (RTL8721F_IRQ_FIRST + 12) +#define RTL8721F_IRQ_TIMER6 (RTL8721F_IRQ_FIRST + 13) +#define RTL8721F_IRQ_TIMER7 (RTL8721F_IRQ_FIRST + 14) +#define RTL8721F_IRQ_TIMER8 (RTL8721F_IRQ_FIRST + 15) +#define RTL8721F_IRQ_COEX_MAILBOX (RTL8721F_IRQ_FIRST + 16) +#define RTL8721F_IRQ_RSVD (RTL8721F_IRQ_FIRST + 17) +#define RTL8721F_IRQ_PMC_TIMER0 (RTL8721F_IRQ_FIRST + 18) +#define RTL8721F_IRQ_PMC_TIMER1 (RTL8721F_IRQ_FIRST + 19) +#define RTL8721F_IRQ_UART0 (RTL8721F_IRQ_FIRST + 20) +#define RTL8721F_IRQ_UART1 (RTL8721F_IRQ_FIRST + 21) +#define RTL8721F_IRQ_UART2 (RTL8721F_IRQ_FIRST + 22) +#define RTL8721F_IRQ_UART3 (RTL8721F_IRQ_FIRST + 23) +#define RTL8721F_IRQ_UART_LOG (RTL8721F_IRQ_FIRST + 24) +#define RTL8721F_IRQ_GPIOA (RTL8721F_IRQ_FIRST + 25) +#define RTL8721F_IRQ_GPIOB (RTL8721F_IRQ_FIRST + 26) +#define RTL8721F_IRQ_GPIOC (RTL8721F_IRQ_FIRST + 27) +#define RTL8721F_IRQ_I2C0 (RTL8721F_IRQ_FIRST + 28) +#define RTL8721F_IRQ_I2C1 (RTL8721F_IRQ_FIRST + 29) +#define RTL8721F_IRQ_GDMA0_CH0 (RTL8721F_IRQ_FIRST + 30) +#define RTL8721F_IRQ_GDMA0_CH1 (RTL8721F_IRQ_FIRST + 31) +#define RTL8721F_IRQ_GDMA0_CH2 (RTL8721F_IRQ_FIRST + 32) +#define RTL8721F_IRQ_GDMA0_CH3 (RTL8721F_IRQ_FIRST + 33) +#define RTL8721F_IRQ_GDMA0_CH4 (RTL8721F_IRQ_FIRST + 34) +#define RTL8721F_IRQ_GDMA0_CH5 (RTL8721F_IRQ_FIRST + 35) +#define RTL8721F_IRQ_GDMA0_CH6 (RTL8721F_IRQ_FIRST + 36) +#define RTL8721F_IRQ_GDMA0_CH7 (RTL8721F_IRQ_FIRST + 37) +#define RTL8721F_IRQ_SPI0 (RTL8721F_IRQ_FIRST + 38) +#define RTL8721F_IRQ_SPI1 (RTL8721F_IRQ_FIRST + 39) +#define RTL8721F_IRQ_SPORT0 (RTL8721F_IRQ_FIRST + 40) +#define RTL8721F_IRQ_RTC (RTL8721F_IRQ_FIRST + 41) +#define RTL8721F_IRQ_ADC (RTL8721F_IRQ_FIRST + 42) +#define RTL8721F_IRQ_ADC_COMP (RTL8721F_IRQ_FIRST + 43) +#define RTL8721F_IRQ_CAPTOUCH (RTL8721F_IRQ_FIRST + 44) +#define RTL8721F_IRQ_THERMAL (RTL8721F_IRQ_FIRST + 45) +#define RTL8721F_IRQ_BOR (RTL8721F_IRQ_FIRST + 46) +#define RTL8721F_IRQ_PWR_DOWN (RTL8721F_IRQ_FIRST + 47) +#define RTL8721F_IRQ_RMII (RTL8721F_IRQ_FIRST + 48) +#define RTL8721F_IRQ_LCDC (RTL8721F_IRQ_FIRST + 49) +#define RTL8721F_IRQ_MJPEG (RTL8721F_IRQ_FIRST + 50) +#define RTL8721F_IRQ_PPE (RTL8721F_IRQ_FIRST + 51) +#define RTL8721F_IRQ_PKE (RTL8721F_IRQ_FIRST + 52) +#define RTL8721F_IRQ_TRNG (RTL8721F_IRQ_FIRST + 53) +#define RTL8721F_IRQ_AON_TIM (RTL8721F_IRQ_FIRST + 54) +#define RTL8721F_IRQ_AON_WAKEPIN (RTL8721F_IRQ_FIRST + 55) +#define RTL8721F_IRQ_SDIO_WIFI (RTL8721F_IRQ_FIRST + 56) +#define RTL8721F_IRQ_SDIO_BT (RTL8721F_IRQ_FIRST + 57) +#define RTL8721F_IRQ_SDIO_HOST (RTL8721F_IRQ_FIRST + 58) +#define RTL8721F_IRQ_USB (RTL8721F_IRQ_FIRST + 59) +#define RTL8721F_IRQ_CAN0 (RTL8721F_IRQ_FIRST + 60) +#define RTL8721F_IRQ_CAN1 (RTL8721F_IRQ_FIRST + 61) +#define RTL8721F_IRQ_IR (RTL8721F_IRQ_FIRST + 62) +#define RTL8721F_IRQ_RXI300 (RTL8721F_IRQ_FIRST + 63) +#define RTL8721F_IRQ_PSRAMC (RTL8721F_IRQ_FIRST + 64) +#define RTL8721F_IRQ_SPI_FLASH (RTL8721F_IRQ_FIRST + 65) +#define RTL8721F_IRQ_RSIP (RTL8721F_IRQ_FIRST + 66) +#define RTL8721F_IRQ_AES (RTL8721F_IRQ_FIRST + 67) +#define RTL8721F_IRQ_SHA (RTL8721F_IRQ_FIRST + 68) +#define RTL8721F_IRQ_CPU0_NS_WDG (RTL8721F_IRQ_FIRST + 69) +#define RTL8721F_IRQ_CPU0_S_WDG (RTL8721F_IRQ_FIRST + 70) +#define RTL8721F_IRQ_OCP (RTL8721F_IRQ_FIRST + 71) +#define RTL8721F_IRQ_SPIC_ECC (RTL8721F_IRQ_FIRST + 72) +#define RTL8721F_IRQ_UVC_DEC (RTL8721F_IRQ_FIRST + 73) +#define RTL8721F_IRQ_RTC_DET (RTL8721F_IRQ_FIRST + 74) +#define RTL8721F_IRQ_BT_MAILBOX (RTL8721F_IRQ_FIRST + 75) +#define RTL8721F_IRQ_BT_SCB (RTL8721F_IRQ_FIRST + 76) +#define RTL8721F_IRQ_BT_WAKE_HOST (RTL8721F_IRQ_FIRST + 77) +#define RTL8721F_IRQ_CPU1_WDG_RST (RTL8721F_IRQ_FIRST + 78) -#define RTL8721F_IRQ_NEXTINT (58) /* Number of external interrupts - * (APIRQn PERI_IRQ_MAX) */ +#define RTL8721F_IRQ_NEXTINT (79) /* Number of external interrupts + * (APIRQn count, 0..78) */ #define NR_IRQS (RTL8721F_IRQ_FIRST + RTL8721F_IRQ_NEXTINT) diff --git a/arch/arm/src/rtl8721f/ameba_app_start.c b/arch/arm/src/rtl8721f/ameba_app_start.c index ed50e532a44..0b9170fa227 100644 --- a/arch/arm/src/rtl8721f/ameba_app_start.c +++ b/arch/arm/src/rtl8721f/ameba_app_start.c @@ -95,7 +95,7 @@ u32 app_mpu_nocache_init(void) mpu_entry = mpu_entry_alloc(); mpu_cfg.region_base = 0; - mpu_cfg.region_size = 0x000F0000; + mpu_cfg.region_size = 0x000f0000; mpu_cfg.xn = MPU_EXEC_ALLOW; mpu_cfg.ap = MPU_UN_PRIV_RO; mpu_cfg.sh = MPU_NON_SHAREABLE; @@ -177,6 +177,25 @@ void os_init(void) rtos_mem_init(); } +/* Seed the RTC on first power-on (mirrors the SDK app_rtc_init). */ + +void app_rtc_init(void) +{ + RTC_InitTypeDef rtc_initstruct; + RTC_TimeTypeDef rtc_timestruct; + + RTC_TimeStructInit(&rtc_timestruct); + rtc_timestruct.RTC_Year = 2021; + rtc_timestruct.RTC_Hours = 10; + rtc_timestruct.RTC_Minutes = 20; + rtc_timestruct.RTC_Seconds = 30; + + RTC_StructInit(&rtc_initstruct); + RTC_Enable(ENABLE); + RTC_Init(&rtc_initstruct); + RTC_SetTime(RTC_Format_BIN, &rtc_timestruct); +} + /* The image2 application entry point. */ void app_start(void) @@ -226,8 +245,6 @@ void app_start(void) } } - SYSTIMER_Init(); - /* Low-power pins do not need pinmap init again after wake from dslp. */ pinmap_init(); @@ -235,6 +252,36 @@ void app_start(void) mpu_init(); app_mpu_nocache_init(); + /* Green2's system timer is clocked from SDM32K and needs the RTC + * brought up first. The SDK does the first-power-on half of this + * asynchronously from + * the RTC_DET_IRQ handler (rtc_irq_init), but NuttX replaces the vector + * table immediately after app_start so that deferred handler would never + * run -- do the whole sequence synchronously here instead. + */ + + RTC_ClearDetINT(); + SDM32K_Enable(); + SYSTIMER_Init(); + RCC_PeriphClockCmd(NULL, APBPeriph_RTC_CLOCK, ENABLE); + + if ((Get_OSC131_STATE() & RTC_BIT_FIRST_PON) == 0) + { + app_rtc_init(); + Set_OSC131_STATE(Get_OSC131_STATE() | RTC_BIT_FIRST_PON); + + /* Only ASIC needs OSC131K calibration (cke_rtc enabled just above). */ + + if (SYSCFG_CHIPType_Get() == CHIP_TYPE_ASIC_POSTSIM) + { + OSC131K_Calibration(30000); + } + } + + /* SDM32K clock-source switch must be done after rtc_fen is enabled. */ + + RTC_ClkSource_Select(SDM32K); + main(); } diff --git a/arch/arm/src/rtl8721f/ameba_board.mk b/arch/arm/src/rtl8721f/ameba_board.mk index 3bb9f3ab98a..3b60aaef5cc 100644 --- a/arch/arm/src/rtl8721f/ameba_board.mk +++ b/arch/arm/src/rtl8721f/ameba_board.mk @@ -114,6 +114,7 @@ AMEBA_FWLIB_SRCS = $(AMEBA_SOC)/fwlib/ram_common/ameba_arch.c \ # so the fwlib sources it pulls in are listed alongside it. AMEBA_FWLIB_SRCS += $(TOPDIR)/arch/arm/src/rtl8721f/ameba_app_start.c \ $(AMEBA_SOC)/fwlib/ram_common/ameba_mpu_ram.c \ + $(AMEBA_SOC)/fwlib/ram_common/ameba_rtc.c \ $(AMEBA_SOC)/fwlib/ram_km4tz/ameba_data_flashclk.c \ $(AMEBA_SOC)/fwlib/ram_km4tz/ameba_flashclk.c \ $(AMEBA_SOC)/fwlib/ram_km4tz/ameba_pinmap.c \ diff --git a/arch/arm/src/rtl8721f/ameba_ipc.c b/arch/arm/src/rtl8721f/ameba_ipc.c index ca6a98dcf3b..a3cc7a63306 100644 --- a/arch/arm/src/rtl8721f/ameba_ipc.c +++ b/arch/arm/src/rtl8721f/ameba_ipc.c @@ -70,7 +70,7 @@ * SDK RTL8721F hal_platform.h. This matches the SDK km4tz main(), which * calls ipc_table_init(IPCAP_DEV) with the NON-secure alias 0x40804000 * (the secure alias 0x50804000 is NOT what the AP uses). - * RTL8721F_IRQ_IPC_KM4 maps to APIRQn IPC_KM4TZ_IRQ (external vector 3) -- + * RTL8721F_IRQ_IPC_KM4 maps to APIRQn IPC_CPU0_IRQ (external vector 5) -- * see arch/.../irq.h. */ diff --git a/arch/arm/src/rtl8721f/ameba_loguart.c b/arch/arm/src/rtl8721f/ameba_loguart.c index ca7eb26a675..8780f811609 100644 --- a/arch/arm/src/rtl8721f/ameba_loguart.c +++ b/arch/arm/src/rtl8721f/ameba_loguart.c @@ -77,16 +77,16 @@ #define AMEBA_ENABLE 1 #define AMEBA_DISABLE 0 -/* LOG-UART device base (UARTLOG_REG_BASE, from SDK RTL8721F - * hal_platform.h). NOTE: this is the RTL8721F address (0x401C6000) -- it - * differs from the RTL8721Dx LOG-UART (0x4100F000). Only - * LOGUART_INTConfig()/INTCoreConfig() take this base explicitly; the TX - * path (DiagPrintf/LOGUART_PutChar) is a ROM call with its own internal - * base, which is why TX worked even when this was wrong but configuring - * the RX interrupt bus-faulted. +/* LOG-UART device base (UARTLOG_REG_BASE, from SDK amebagreen2 + * hal_platform.h). Only LOGUART_INTConfig()/INTCoreConfig()/RxCmd() take + * this base explicitly; the TX path (DiagPrintf/LOGUART_PutChar) is a ROM + * call with its own internal base. Using the wrong base (e.g. the + * RTL8721Dx 0x401C6000) leaves TX working -- because PutChar ignores it -- + * while writing the RX interrupt-enable register bus-faults, since the + * bogus IER address decodes to no bus slave on green2. */ -#define LOGUART_DEV ((void *)0x401C6000) +#define LOGUART_DEV ((void *)0x40810000) /*************************************************************************** * External ROM/SDK Function Prototypes diff --git a/boards/arm/rtl8721f/rtl8721f_evb/configs/nsh/defconfig b/boards/arm/rtl8721f/rtl8721f_evb/configs/nsh/defconfig index 7cba1fd8b12..4477ec6ecbe 100644 --- a/boards/arm/rtl8721f/rtl8721f_evb/configs/nsh/defconfig +++ b/boards/arm/rtl8721f/rtl8721f_evb/configs/nsh/defconfig @@ -20,56 +20,19 @@ CONFIG_DEBUG_FEATURES=y CONFIG_DEBUG_FULLOPT=y CONFIG_DEBUG_SYMBOLS=y CONFIG_DEFAULT_TASK_STACKSIZE=4096 -CONFIG_DRIVERS_IEEE80211=y -CONFIG_DRIVERS_WIRELESS=y -CONFIG_EXAMPLES_DHCPD=y CONFIG_EXAMPLES_HELLO=y CONFIG_FS_PROCFS=y CONFIG_FS_TMPFS=y CONFIG_IDLETHREAD_STACKSIZE=4096 CONFIG_INIT_ENTRYPOINT="nsh_main" -CONFIG_IOB_BUFSIZE=512 -CONFIG_IOB_NBUFFERS=100 -CONFIG_IOB_NCHAINS=36 -CONFIG_IOB_THROTTLE=40 -CONFIG_LIBC_MEMFD_ERROR=y CONFIG_MM_DEFAULT_ALIGNMENT=32 -CONFIG_NET=y -CONFIG_NETDB_DNSCLIENT=y -CONFIG_NETDEV_LATEINIT=y -CONFIG_NETDEV_WIRELESS_IOCTL=y -CONFIG_NETINIT_DHCPC=y -CONFIG_NETINIT_THREAD=y -CONFIG_NETINIT_WAPI_PASSPHRASE="YOUR_WIFI_PASSWORD" -CONFIG_NETINIT_WAPI_SSID="YOUR_WIFI_SSID" -CONFIG_NETUTILS_DHCPD=y -CONFIG_NETUTILS_DHCPD_ROUTERIP=0xc0a80401 -CONFIG_NETUTILS_DHCPD_STARTIP=0xc0a80402 -CONFIG_NETUTILS_IPERF=y -CONFIG_NET_ARP_IPIN=y -CONFIG_NET_BROADCAST=y -CONFIG_NET_ETH_PKTSIZE=1514 -CONFIG_NET_ICMP_SOCKET=y -CONFIG_NET_RECV_BUFSIZE=10000 -CONFIG_NET_SEND_BUFSIZE=16384 -CONFIG_NET_TCP=y -CONFIG_NET_TCP_DELAYED_ACK=y -CONFIG_NET_TCP_KEEPALIVE=y -CONFIG_NET_TCP_NOTIFIER=y -CONFIG_NET_TCP_OUT_OF_ORDER=y -CONFIG_NET_TCP_OUT_OF_ORDER_BUFSIZE=10000 -CONFIG_NET_TCP_WRITE_BUFFERS=y -CONFIG_NET_UDP=y CONFIG_NSH_BUILTIN_APPS=y -CONFIG_NSH_DISABLE_VCONFIG=y CONFIG_NSH_FILEIOSIZE=512 CONFIG_NSH_READLINE=y CONFIG_PREALLOC_TIMERS=4 -CONFIG_RAM_SIZE=262144 -CONFIG_RAM_START=0x30008000 +CONFIG_RAM_SIZE=401408 +CONFIG_RAM_START=0x20006000 CONFIG_RR_INTERVAL=200 -CONFIG_RTL8721F_FLASH_FS=y -CONFIG_RTL8721F_WIFI=y CONFIG_SCHED_HPWORK=y CONFIG_SCHED_HPWORKPRIORITY=192 CONFIG_SCHED_LPWORK=y @@ -78,13 +41,8 @@ CONFIG_STACK_COLORATION=y CONFIG_START_DAY=16 CONFIG_START_MONTH=6 CONFIG_START_YEAR=2026 -CONFIG_SYSTEM_DHCPC_RENEW=y CONFIG_SYSTEM_NSH=y CONFIG_SYSTEM_NSH_STACKSIZE=2500 -CONFIG_SYSTEM_PING=y CONFIG_TIMER=y CONFIG_TIMER_ARCH=y CONFIG_USEC_PER_TICK=1000 -CONFIG_WIRELESS=y -CONFIG_WIRELESS_WAPI=y -CONFIG_WIRELESS_WAPI_CMDTOOL=y diff --git a/boards/arm/rtl8721f/rtl8721f_evb/scripts/Make.defs b/boards/arm/rtl8721f/rtl8721f_evb/scripts/Make.defs index e1a2bed186c..e53fd7b9a40 100644 --- a/boards/arm/rtl8721f/rtl8721f_evb/scripts/Make.defs +++ b/boards/arm/rtl8721f/rtl8721f_evb/scripts/Make.defs @@ -29,5 +29,5 @@ include $(TOPDIR)/arch/arm/src/rtl8721f/ameba_board.mk # Flashing via the SDK AmebaFlash.py (make flash AMEBA_PORT=/dev/ttyUSB0) -AMEBA_FLASH_PROFILE = RTL8721F +AMEBA_FLASH_PROFILE = RTL8721F_NOR include $(TOPDIR)/tools/ameba/Config.mk diff --git a/tools/nxstyle.c b/tools/nxstyle.c index e471d064127..2e9ae212af8 100644 --- a/tools/nxstyle.c +++ b/tools/nxstyle.c @@ -259,7 +259,7 @@ static const char *g_white_prefix[] = "uxrCustom", /* uxrCustomTransport */ /* Ref: arch/arm/src/common/ameba, arch/arm/src/rtl8721dx, - * arch/arm/src/rtl8720f and the matching boards. + * arch/arm/src/rtl8720f, arch/arm/src/rtl8721f and the matching boards. * Realtek Ameba SDK ROM/HAL symbols and ARM CMSE intrinsics referenced * by the port; renaming them would break linkage against the vendor blob. */ @@ -271,8 +271,10 @@ static const char *g_white_prefix[] = "Cache_", "DCache_", "ChipInfo_", + "EFUSE_", "FLASH_", "GPIO_", + "Get_OSC131_", /* Get_OSC131_STATE — Ameba SDK RTC accessor */ "IPC_", "LOGUART_", "OSC2M_", @@ -281,7 +283,10 @@ static const char *g_white_prefix[] = "PAD_", "Pinmux_", "RCC_", + "RTC_", /* RTC_InitTypeDef, RTC_Enable, RTC_SetTime, etc. */ "RTCIO_", + "SDM32K_", /* SDM32K_Enable */ + "Set_OSC131_", /* Set_OSC131_STATE — Ameba SDK RTC accessor */ "SYSCFG_", "SYSTIMER_", "UART_",
