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The following commit(s) were added to refs/heads/master by this push:
new 894a08e35f0 arch/arm/stm32h5: Fix handling of GPIO port I
894a08e35f0 is described below
commit 894a08e35f0ef7c0c057d7721c90fb92122c8399
Author: Darryl Ring <[email protected]>
AuthorDate: Fri Aug 7 15:27:49 2026 -0700
arch/arm/stm32h5: Fix handling of GPIO port I
Correct the number of GPIO ports (STM32_NPORTS) from 8 to 9 and include
GPIOI in the g_gpiobase array. Also fix the comparison that would
prevent the GPIOI clock from being enabled (this is really a no-op,
though).
Signed-off-by: Darryl Ring <[email protected]>
---
arch/arm/include/stm32h5/chip.h | 2 +-
arch/arm/src/stm32h5/stm32_gpio.c | 3 +++
arch/arm/src/stm32h5/stm32h5xx_rcc.c | 2 +-
3 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/stm32h5/chip.h b/arch/arm/include/stm32h5/chip.h
index e4960644b72..ad98276331c 100644
--- a/arch/arm/include/stm32h5/chip.h
+++ b/arch/arm/include/stm32h5/chip.h
@@ -87,7 +87,7 @@
#endif
#define STM32_NDMA (2) /* DMA1-2 */
-#define STM32_NPORTS (8) /* 8 GPIO ports, GPIOA-GPIOI */
+#define STM32_NPORTS (9) /* 9 GPIO ports, GPIOA-GPIOI */
#define STM32_NADC (2) /* 12-bit ADC1, up to 20 channels
*/
#define STM32_NDAC (1) /* 12-bit DAC1 */
#define STM32_NCRC (1) /* CRC */
diff --git a/arch/arm/src/stm32h5/stm32_gpio.c
b/arch/arm/src/stm32h5/stm32_gpio.c
index 334a5faf38a..088df75e4f9 100644
--- a/arch/arm/src/stm32h5/stm32_gpio.c
+++ b/arch/arm/src/stm32h5/stm32_gpio.c
@@ -78,6 +78,9 @@ const uint32_t g_gpiobase[STM32_NPORTS] =
#if STM32_NPORTS > 7
STM32_GPIOH_BASE,
#endif
+#if STM32_NPORTS > 8
+ STM32_GPIOI_BASE,
+#endif
};
/****************************************************************************
diff --git a/arch/arm/src/stm32h5/stm32h5xx_rcc.c
b/arch/arm/src/stm32h5/stm32h5xx_rcc.c
index 31de43c0c94..b730ce54bbe 100644
--- a/arch/arm/src/stm32h5/stm32h5xx_rcc.c
+++ b/arch/arm/src/stm32h5/stm32h5xx_rcc.c
@@ -226,7 +226,7 @@ static inline void rcc_enableahb2(void)
#if STM32_NPORTS > 7
| RCC_AHB2ENR_GPIOHEN
#endif
-#if STM32_NPORTS > 7
+#if STM32_NPORTS > 8
| RCC_AHB2ENR_GPIOIEN
#endif
