dcgong2917 opened a new pull request, #19842:
URL: https://github.com/apache/nuttx/pull/19842
## Summary
Add a shared NuttX SPI master lower-half for the Realtek Ameba SPI
(DesignWare SSI) controllers and wire it into three chips. The driver is
IC-agnostic: it lives in `arch/arm/src/common/ameba/ameba_spi.c` and is
driven through the SDK fwlib in polling mode with full-duplex exchange and
a software chip-select. Each port supplies only a same-named per-chip
header
(`ameba_spi_chip.h`) with the controller count, register bases, clock
masks,
crossbar pad-mux codes and the SSI clock query; the buses register as
`/dev/spiN`.
All three chips clock the SSI from the same conceptual source -- the
peripheral `ip_clk` that the SPI baud divider divides down to make SCLK.
The
shared driver only needs that frequency (it calls the `AMEBA_SPI_IPCLK()`
macro), but the fwlib API and clock-divider register that expose it differ
per chip, so each per-chip header supplies its own expansion:
* **rtl8721dx** — the shared driver + per-chip header;
`ip_clk = PLL_ClkGet() / (HPERI divider + 1)`, divider in
REG_LSYS_CKD_GRP0.
* **rtl8720f** — per-chip header using `SYS_PLL_ClkGet()` (this SDK has no
`PLL_ClkGet()`) with the divider field in REG_LSYS_CKD_SYS_PLL_GRP0;
single
port-A controller.
* **rtl8721f** — per-chip header whose SDK exposes the HPERI
clock directly via `HPERI_ClkGet()`, so no divider register read is
needed.
`tools/nxstyle.c` gains the `SSI_`/`PLL_`/`HPERI_`/`SYS_PLL_` vendor
prefixes
in the existing Ameba SDK-symbol allow-list, matching how the earlier
UART/I2C
ports handle their SDK ROM/HAL names.
## Impact
New optional feature (`CONFIG_AMEBA_SPI`), off by default. No change to any
existing configuration or driver. Adds an `spi` board configuration to each
board for validation. Depends only on the already-merged Ameba
GPIO/UART/I2C
support.
## Testing
Built and hardware-verified on each board with the `spi` config and the
`system/spi` spitool, MOSI shorted to MISO for loopback (`spi exch` returns
sent == received):
* **pke8721daf (RTL8721DX)** — SPI on PB18-21, loopback passes across
8/16-bit,
variable frequency, mode 3 and long transfers.
* **rtl8720f_evb (RTL8720F)** — SPI0 on PA14-17 (single port-A controller),
`spi exch -b 0 -x 8 deadbeef` returns `DE AD BE EF ...`.
* **rtl8721f_evb (RTL8721F)** — two independent buses, SPI0 on PA14-17 and
SPI1 on PB13-16, both loopback pass.
`tools/checkpatch.sh -g master..HEAD` reports no errors.
--
This is an automated message from the Apache Git Service.
To respond to the message, please log on to GitHub and use the
URL above to go to the specific comment.
To unsubscribe, e-mail: [email protected]
For queries about this service, please contact Infrastructure at:
[email protected]