Fishwaldo opened a new pull request, #19865:
URL: https://github.com/apache/nuttx/pull/19865
## Summary
The first eight commits belong to #19863 and #19864 and are not part of this
change. This PR adds the last three.
Nothing in this port knew what any clock ran at, so a driver needing a rate
carried a hard coded one, which is wrong as soon as the boot loader changes.
**The clock tree.** The Clock and Reset Generator is registered with the
NuttX
clock framework: the PLLs, muxes, dividers and gates covering the low speed
peripherals, the U84 cluster, the RTC and timers, the NOC, boot SPI, SCPU,
LPCPU, DDR and TCU, the high speed peripherals, the always on DMA and secure
blocks, the GPU, DSP, die to die link and NPU, and the video input, output
and
codec paths. 264 clocks, visible through `/proc/clk`.
Registration writes nothing: the tree comes up describing what the boot
loader
left behind. A clock moves only when a driver asks, by enabling a gate,
setting
a divider or reparenting a mux. A mux carrying a clock the system is running
on
will speed up on request and refuses to slow down, because that changes the
timing every driver downstream was configured for while they are using it.
**The board reports what registered**, so a tree that came up short is
visible
without a debug build:
```
clk: registered 264 clocks, 0 failed
```
**The UART reference clock** was 198144000, a figure with no source in the
manual, the vendor tree or Linux, all of which give the low speed peripheral
clock as 200 MHz. The tree now reports `lsp_uart0_pclk` at 200 MHz, and
section
12.4.3.2 makes that clock the UART's baud reference. The fractional divisor
is
enabled with it: these are DesignWare UARTs with DLF implemented, four bits
wide at offset 0xc0. At 115200 the error goes from 1.41% to 0.006%.
Errors that mean the tree did not come up — a clock that fails to register,
and
an orphaned clock — are reported with `syslog(LOG_ERR)` so they survive a
release build, since the `DEBUGPANIC()` that follows the second does not.
Conditions a caller already learns about from an errno stay on the gated
`clkerr()`/`clkwarn()` macros.
## Impact
EIC7700X boards only. `DEBUG_CLK` and `DEBUG_CLK_ERROR` are enabled in both
board configurations; `DEBUG_CLK_INFO` is not, so the tree is described but
not
narrated. No effect on any other architecture.
## Testing
EIC7700 EVB:
```
[CPU0] clk: registered 264 clocks, 0 failed
nsh> cat /proc/clk
clock enable_cnt rate phase
ext_mclk 0 0 0
lpddr_ref_bak 0 50000000 0
xtal_32k 0 32768 0
xtal_24m 5 24000000 0
gpu_gray_clk 0 24000000 0
clk_lpcpu_core_src 0 24000000 0
clk_lpcpu_core 1 24000000 0
timer0_clk 1 24000000 0
cpupll_fout1 1 1400000000 0
clk_u84_core 0 1400000000 0
u84_core0_clk 1 1400000000 0
```
264 clocks, with the U84 cores at the 1.4 GHz the tree derives rather than a
figure written down anywhere. The console runs at 115200 off the corrected
200 MHz reference for the whole of this boot, including the dump above.
StarPro64 builds.
Depends-On: https://github.com/apache/nuttx/pull/19863
Depends-On: https://github.com/apache/nuttx/pull/19864
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