liam-geotab opened a new pull request, #19914: URL: https://github.com/apache/nuttx/pull/19914
## Summary Use the hardware SPI FIFO in non-DMA exchange to parallelize SPI transmission and word enqueuing. There is less time between transmitted words on the bus so throughput is increased. Alternate between the send and receive FIFOs so that data is not lost in some cases. The DMA support in the stm32h5 SPI driver did not compile because it was copied from stm32h7 whose DMA API is incompatible with stm32h5. Port DMA support to the driver. Fix some issues in the driver that made it buggy when both non-DMA and DMA instances coexisted. Initialize SPI1 on nucleo-h563zi and register an spi chardev at /dev/spi1 when the configs are enabled. ## Impact SPI non-DMA exchanges are more efficient and less racy now. SPI DMA builds now. The porting was done in a way that does not change the behavior from stm32h7 to stm32h5. ## Testing Besides the below reproducibility info, this has been used on custom hardware for some months. `nucleo-h563zi:nsh` with the following enabled: !!! **apps/system/spi/spitool.h MAX_LINELEN set to 256** !!! ``` CONFIG_LINE_MAX=256 CONFIG_STM32_DMA1=y CONFIG_STM32_SPI1=y CONFIG_STM32_SPI1_DMA=y CONFIG_STM32_SPI1_DMA_BUFFER=128 CONFIG_SYSTEM_SPITOOL=y ``` Each commit was exercised with spitool. A jumper connected MOSI and MISO - CN7 pin 12 and 14 so the transmitted data loops back. The density of transmitted words was compared on an oscilloscope. ``` nsh> spi exch -b1 -f16000000 -x110 aabbccddeeff001122334455667788991234567890abcdef2143658709badcfeaabbccddeeff0011aabbccddeeff001122334455667788991234567890abcdef2143658709badcfeaabbccddeeff0011aabbccddeeff001122334455667788991234567890abcdef2143658709ba Sending: AA BB CC DD EE FF 00 11 22 33 44 55 66 77 88 99 12 34 56 78 90 AB CD EF 21 43 65 87 09 BA DC FE AA BB CC DD EE FF 00 11 AA BB CC DD EE FF 00 11 22 33 44 55 66 77 88 99 12 34 56 78 90 AB CD EF 21 43 65 87 09 BA DC FE AA BB CC DD EE FF 00 11 AA BB CC DD EE FF 00 11 22 33 44 55 66 77 88 99 12 34 56 78 90 AB CD EF 21 43 65 87 09 BA Received: AA BB CC DD EE FF 00 11 22 33 44 55 66 77 88 99 12 34 56 78 90 AB CD EF 21 43 65 87 09 BA DC FE AA BB CC DD EE FF 00 11 AA BB CC DD EE FF 00 11 22 33 44 55 66 77 88 99 12 34 56 78 90 AB CD EF 21 43 65 87 09 BA DC FE AA BB CC DD EE FF 00 11 AA BB CC DD EE FF 00 11 22 33 44 55 66 77 88 99 12 34 56 78 90 AB CD EF 21 43 65 87 09 BA ``` **Before** There is 75.324 us between transmitted bytes. **After FIFO usage improvement** There is 3.5116 us between transmitted bytes. **With DMA enabled** There is no gap between transmitted bytes. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
