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commit c575e056c60ab7c023d0679ccb6f945936510995 Author: raiden00pl <[email protected]> AuthorDate: Thu Aug 13 14:05:54 2026 +0200 boards/arm/stm32u3: Add NUCLEO-U3C5ZI-Q support initial support for NUCLEO-U3C5ZI-Q Assisted-by: OpenAI Codex:gpt-5 Signed-off-by: raiden00pl <[email protected]> --- .../arm/stm32u3/boards/nucleo-u3c5zi-q/index.rst | 30 ++++ arch/arm/src/stm32u3/stm32u3xx_rcc.c | 120 +++++++++++++--- boards/Kconfig | 14 +- boards/arm/stm32u3/common/CMakeLists.txt | 25 ++++ boards/arm/stm32u3/common/Makefile | 38 ++++++ boards/arm/stm32u3/nucleo-u3c5zi-q/CMakeLists.txt | 23 ++++ boards/arm/stm32u3/nucleo-u3c5zi-q/Kconfig | 8 ++ .../nucleo-u3c5zi-q/configs/jumbo/defconfig | 63 +++++++++ .../stm32u3/nucleo-u3c5zi-q/configs/nsh/defconfig | 35 +++++ boards/arm/stm32u3/nucleo-u3c5zi-q/include/board.h | 152 +++++++++++++++++++++ .../arm/stm32u3/nucleo-u3c5zi-q/scripts/Make.defs | 36 +++++ .../arm/stm32u3/nucleo-u3c5zi-q/scripts/flash.ld | 107 +++++++++++++++ .../arm/stm32u3/nucleo-u3c5zi-q/src/CMakeLists.txt | 25 ++++ boards/arm/stm32u3/nucleo-u3c5zi-q/src/Make.defs | 30 ++++ .../stm32u3/nucleo-u3c5zi-q/src/nucleo-u3c5zi-q.h | 35 +++++ .../arm/stm32u3/nucleo-u3c5zi-q/src/stm32_boot.c | 44 ++++++ .../stm32u3/nucleo-u3c5zi-q/src/stm32_bringup.c | 50 +++++++ 17 files changed, 814 insertions(+), 21 deletions(-) diff --git a/Documentation/platforms/arm/stm32u3/boards/nucleo-u3c5zi-q/index.rst b/Documentation/platforms/arm/stm32u3/boards/nucleo-u3c5zi-q/index.rst new file mode 100644 index 00000000000..573d2d2f6e9 --- /dev/null +++ b/Documentation/platforms/arm/stm32u3/boards/nucleo-u3c5zi-q/index.rst @@ -0,0 +1,30 @@ +====================== +ST NUCLEO-U3C5ZI-Q +====================== + +.. tags:: chip:stm32, chip:stm32u3, chip:stm32u3c5 + +The `NUCLEO-U3C5ZI-Q <https://www.st.com/en/evaluation-tools/nucleo-u3c5zi-q.html>`_ +is an STM32 Nucleo-144 board featuring an STM32U3C5ZI microcontroller with +2 MiB of Flash and 640 KiB of SRAM. The board includes an ST-LINK debugger +and programmer with a virtual COM port. + +Clocking +======== + +NuttX runs at 96 MHz from the internal MSIRC0 oscillator. The initial port +runs as a flat, nonsecure image with TrustZone disabled. + +Configurations +============== + +nsh +--- + +Configures the NuttShell with USART1 as the serial console. + +jumbo +----- + +Enables a broad set of NuttX features to provide additional build and runtime +coverage. diff --git a/arch/arm/src/stm32u3/stm32u3xx_rcc.c b/arch/arm/src/stm32u3/stm32u3xx_rcc.c index 1e2ceb9bc2d..213d3eb5b60 100644 --- a/arch/arm/src/stm32u3/stm32u3xx_rcc.c +++ b/arch/arm/src/stm32u3/stm32u3xx_rcc.c @@ -26,6 +26,8 @@ #include <nuttx/config.h> +#include <assert.h> + #include <arch/board/board.h> #include "arm_internal.h" @@ -34,6 +36,25 @@ #include "hardware/stm32_flash.h" #include "hardware/stm32u3xx_pwr.h" +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG + +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to a non-default value"); + +/* Allow up to 100 milliseconds for each clock or regulator transition. */ + +#define CLOCK_READY_TIMEOUT (100 * CONFIG_BOARD_LOOPSPERMSEC) + +#ifndef STM32_BOARD_USEMSIS +# error stm32_stdclockconfig() requires MSIS board configuration +#endif + +#endif + /**************************************************************************** * Public Functions ****************************************************************************/ @@ -42,68 +63,127 @@ * Name: stm32_stdclockconfig * * Description: - * Configure the STM32U3 system clock from MSIRC0 at 96 MHz. + * Configure the STM32U3 system clock from the settings in board.h. * ****************************************************************************/ +#ifndef CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG void stm32_stdclockconfig(void) { uint32_t regval; + volatile int32_t timeout; /* The EPOD booster and voltage scaling control require the PWR clock. */ modifyreg32(STM32_RCC_AHB1ENR2, 0, RCC_AHB1ENR2_PWREN); - /* Supply the EPOD booster from undivided MSIS. */ + /* Select the board regulator and wait until the transition completes. */ + + modifyreg32(STM32_PWR_CR3, PWR_CR3_REGSEL, STM32_PWR_CR3_REGSEL); + for (timeout = CLOCK_READY_TIMEOUT; timeout > 0; timeout--) + { + if ((getreg32(STM32_PWR_SVMSR) & PWR_SVMSR_REGS) == + STM32_PWR_CR3_REGSEL) + { + break; + } + } + + if (timeout == 0) + { + return; + } + + /* Configure and enable the EPOD booster. */ regval = getreg32(STM32_RCC_CFGR4); regval &= ~(RCC_CFGR4_BOOSTSEL_MASK | RCC_CFGR4_BOOSTDIV_MASK); - regval |= RCC_CFGR4_BOOSTSEL_MSIS; + regval |= STM32_RCC_CFGR4_BOOSTSEL | STM32_RCC_CFGR4_BOOSTDIV; putreg32(regval, STM32_RCC_CFGR4); - modifyreg32(STM32_PWR_VOSR, 0, PWR_VOSR_BOOSTEN); - while ((getreg32(STM32_PWR_VOSR) & PWR_VOSR_BOOSTRDY) == 0) + modifyreg32(STM32_PWR_VOSR, 0, STM32_PWR_VOSR_BOOST); + for (timeout = CLOCK_READY_TIMEOUT; timeout > 0; timeout--) + { + if ((getreg32(STM32_PWR_VOSR) & PWR_VOSR_BOOSTRDY) != 0) + { + break; + } + } + + if (timeout == 0) { + return; } - /* Select voltage scale 1 and wait until it is active. */ + /* Select the board voltage scale and wait until it is active. */ + + modifyreg32(STM32_PWR_VOSR, PWR_VOSR_R1EN | PWR_VOSR_R2EN, + STM32_PWR_VOSR_RANGE); + for (timeout = CLOCK_READY_TIMEOUT; timeout > 0; timeout--) + { + if ((getreg32(STM32_PWR_VOSR) & + (PWR_VOSR_R1RDY | PWR_VOSR_R2RDY)) == + STM32_PWR_VOSR_RANGERDY) + { + break; + } + } - modifyreg32(STM32_PWR_VOSR, PWR_VOSR_R2EN, PWR_VOSR_R1EN); - while ((getreg32(STM32_PWR_VOSR) & - (PWR_VOSR_R1RDY | PWR_VOSR_R2RDY)) != PWR_VOSR_R1RDY) + if (timeout == 0) { + return; } - /* Three wait states are required before raising HCLK to 96 MHz. */ + /* Configure FLASH before raising HCLK. */ modifyreg32(STM32_FLASH_ACR, FLASH_ACR_LATENCY_MASK, - FLASH_ACR_LATENCY(3)); + STM32_FLASH_ACR_LATENCY); - /* Select MSIRC0 divided by one and use it as the 96 MHz system clock. */ + /* Configure and start MSIS. */ regval = getreg32(STM32_RCC_ICSCR1); regval &= ~(RCC_ICSCR1_MSISSEL | RCC_ICSCR1_MSISDIV_MASK); - regval |= RCC_ICSCR1_MSIRGSEL; + regval |= RCC_ICSCR1_MSIRGSEL | STM32_RCC_ICSCR1_MSISSEL | + STM32_RCC_ICSCR1_MSISDIV; putreg32(regval, STM32_RCC_ICSCR1); modifyreg32(STM32_RCC_CR, 0, RCC_CR_MSISON); - while ((getreg32(STM32_RCC_CR) & RCC_CR_MSISRDY) == 0) + for (timeout = CLOCK_READY_TIMEOUT; timeout > 0; timeout--) { + if ((getreg32(STM32_RCC_CR) & RCC_CR_MSISRDY) != 0) + { + break; + } } - modifyreg32(STM32_RCC_CFGR1, RCC_CFGR1_SW_MASK, RCC_CFGR1_SW_MSIS); - while ((getreg32(STM32_RCC_CFGR1) & RCC_CFGR1_SWS_MASK) != - RCC_CFGR1_SWS_MSIS) + if (timeout == 0) { + return; } - /* Keep all bus clocks undivided. */ + /* Configure the AHB and APB prescalers. */ modifyreg32(STM32_RCC_CFGR2, RCC_CFGR2_HPRE_MASK | RCC_CFGR2_PPRE1_MASK | - RCC_CFGR2_PPRE2_MASK, 0); - modifyreg32(STM32_RCC_CFGR3, RCC_CFGR3_PPRE3_MASK, 0); + RCC_CFGR2_PPRE2_MASK, + STM32_RCC_CFGR2_HPRE | STM32_RCC_CFGR2_PPRE1 | + STM32_RCC_CFGR2_PPRE2); + modifyreg32(STM32_RCC_CFGR3, RCC_CFGR3_PPRE3_MASK, + STM32_RCC_CFGR3_PPRE3); + + /* Use MSIS as the system clock and wait for the switch to complete. */ + + modifyreg32(STM32_RCC_CFGR1, RCC_CFGR1_SW_MASK, RCC_CFGR1_SW_MSIS); + for (timeout = CLOCK_READY_TIMEOUT; timeout > 0; timeout--) + { + if ((getreg32(STM32_RCC_CFGR1) & RCC_CFGR1_SWS_MASK) == + RCC_CFGR1_SWS_MSIS) + { + break; + } + } } +#endif /**************************************************************************** * Name: stm32_rcc_enableperipherals diff --git a/boards/Kconfig b/boards/Kconfig index 82b60caa038..41ec3f2c50f 100644 --- a/boards/Kconfig +++ b/boards/Kconfig @@ -3311,6 +3311,14 @@ config ARCH_BOARD_NUCLEO_U5A5ZJ_Q MCU. The STM32U5A5 is a Cortex-M33 optimised for low-power operation at up to 160MHz operation with 4MB Flash memory and 2.5MB SRAM. +config ARCH_BOARD_NUCLEO_U3C5ZI_Q + bool "STMicro NUCLEO-U3C5ZI-Q board" + depends on ARCH_CHIP_STM32U3C5ZI + ---help--- + STMicro NUCLEO-U3C5ZI-Q development board featuring the STM32U3C5ZI, + a Cortex-M33 MCU running at up to 96 MHz with 2 MiB Flash and + 640 KiB SRAM. + config ARCH_BOARD_STM32L476VG_DISCO bool "STMicro STM32L476VG -Discovery board" depends on ARCH_CHIP_STM32L476RG @@ -4176,6 +4184,7 @@ config ARCH_BOARD default "nucleo-h563zi" if ARCH_BOARD_NUCLEO_H563ZI default "nucleo-n657x0-q" if ARCH_BOARD_NUCLEO_N657X0_Q default "nucleo-u5a5zj-q" if ARCH_BOARD_NUCLEO_U5A5ZJ_Q + default "nucleo-u3c5zi-q" if ARCH_BOARD_NUCLEO_U3C5ZI_Q default "stm32l476vg-disco" if ARCH_BOARD_STM32L476VG_DISCO default "stm32l476-mdk" if ARCH_BOARD_STM32L476_MDK default "stm32l4r9ai-disco" if ARCH_BOARD_STM32L4R9AI_DISCO @@ -4835,6 +4844,9 @@ endif if ARCH_BOARD_NUCLEO_U5A5ZJ_Q source "boards/arm/stm32u5/nucleo-u5a5zj-q/Kconfig" endif +if ARCH_BOARD_NUCLEO_U3C5ZI_Q +source "boards/arm/stm32u3/nucleo-u3c5zi-q/Kconfig" +endif if ARCH_BOARD_NUCLEO_L432KC source "boards/arm/stm32l4/nucleo-l432kc/Kconfig" endif @@ -5460,7 +5472,7 @@ endif if ARCH_CHIP_SAMV7 source "boards/arm/samv7/common/Kconfig" endif -if ARCH_CHIP_STM32C0 || ARCH_CHIP_STM32F0 || ARCH_CHIP_STM32F1 || ARCH_CHIP_STM32F2 || ARCH_CHIP_STM32F3 || ARCH_CHIP_STM32F4 || ARCH_CHIP_STM32F7 || ARCH_CHIP_STM32G0 || ARCH_CHIP_STM32G4 || ARCH_CHIP_STM32L0 || ARCH_CHIP_STM32L1 || ARCH_CHIP_STM32H7 || ARCH_CHIP_STM32H5 || ARCH_CHIP_STM32L5 || ARCH_CHIP_STM32U0 || ARCH_CHIP_STM32U5 || ARCH_CHIP_STM32WB || ARCH_CHIP_STM32WL5 || ARCH_CHIP_STM32N6 +if ARCH_CHIP_STM32C0 || ARCH_CHIP_STM32F0 || ARCH_CHIP_STM32F1 || ARCH_CHIP_STM32F2 || ARCH_CHIP_STM32F3 || ARCH_CHIP_STM32F4 || ARCH_CHIP_STM32F7 || ARCH_CHIP_STM32G0 || ARCH_CHIP_STM32G4 || ARCH_CHIP_STM32L0 || ARCH_CHIP_STM32L1 || ARCH_CHIP_STM32H7 || ARCH_CHIP_STM32H5 || ARCH_CHIP_STM32L5 || ARCH_CHIP_STM32U0 || ARCH_CHIP_STM32U3 || ARCH_CHIP_STM32U5 || ARCH_CHIP_STM32WB || ARCH_CHIP_STM32WL5 || ARCH_CHIP_STM32N6 source "boards/arm/common/stm32/Kconfig" endif if ARCH_CHIP_RP2040 diff --git a/boards/arm/stm32u3/common/CMakeLists.txt b/boards/arm/stm32u3/common/CMakeLists.txt new file mode 100644 index 00000000000..a7a0a7a6742 --- /dev/null +++ b/boards/arm/stm32u3/common/CMakeLists.txt @@ -0,0 +1,25 @@ +# ############################################################################## +# boards/arm/stm32u3/common/CMakeLists.txt +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed to the Apache Software Foundation (ASF) under one or more contributor +# license agreements. See the NOTICE file distributed with this work for +# additional information regarding copyright ownership. The ASF licenses this +# file to you under the Apache License, Version 2.0 (the "License"); you may not +# use this file except in compliance with the License. You may obtain a copy of +# the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations under +# the License. +# +# ############################################################################## + +if(CONFIG_ARCH_BOARD_COMMON) + add_subdirectory(${NUTTX_DIR}/boards/arm/common/stm32 stm32_common) +endif() diff --git a/boards/arm/stm32u3/common/Makefile b/boards/arm/stm32u3/common/Makefile new file mode 100644 index 00000000000..6c9d1df61a1 --- /dev/null +++ b/boards/arm/stm32u3/common/Makefile @@ -0,0 +1,38 @@ +############################################################################# +# boards/arm/stm32u3/common/Makefile +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################# + +include $(TOPDIR)/Make.defs + +STM32_BOARD_COMMON_DIR := $(TOPDIR)$(DELIM)boards$(DELIM)arm$(DELIM)common$(DELIM)stm32 +STM32_COMMON_SRCDIR := $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)common$(DELIM)stm32 + +include board/Make.defs +include $(STM32_BOARD_COMMON_DIR)$(DELIM)src$(DELIM)Make.defs + +DEPPATH += --dep-path board + +include $(TOPDIR)/boards/Board.mk + +ARCHSRCDIR = $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src +BOARDDIR = $(ARCHSRCDIR)$(DELIM)board +CFLAGS += ${INCDIR_PREFIX}$(BOARDDIR)$(DELIM)include +CFLAGS += ${INCDIR_PREFIX}$(STM32_COMMON_SRCDIR) diff --git a/boards/arm/stm32u3/nucleo-u3c5zi-q/CMakeLists.txt b/boards/arm/stm32u3/nucleo-u3c5zi-q/CMakeLists.txt new file mode 100644 index 00000000000..34ed6f79f82 --- /dev/null +++ b/boards/arm/stm32u3/nucleo-u3c5zi-q/CMakeLists.txt @@ -0,0 +1,23 @@ +# ############################################################################## +# boards/arm/stm32u3/nucleo-u3c5zi-q/CMakeLists.txt +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed to the Apache Software Foundation (ASF) under one or more contributor +# license agreements. See the NOTICE file distributed with this work for +# additional information regarding copyright ownership. The ASF licenses this +# file to you under the Apache License, Version 2.0 (the "License"); you may not +# use this file except in compliance with the License. You may obtain a copy of +# the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations under +# the License. +# +# ############################################################################## + +add_subdirectory(src) diff --git a/boards/arm/stm32u3/nucleo-u3c5zi-q/Kconfig b/boards/arm/stm32u3/nucleo-u3c5zi-q/Kconfig new file mode 100644 index 00000000000..620a80ba090 --- /dev/null +++ b/boards/arm/stm32u3/nucleo-u3c5zi-q/Kconfig @@ -0,0 +1,8 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_NUCLEO_U3C5ZI_Q + +endif diff --git a/boards/arm/stm32u3/nucleo-u3c5zi-q/configs/jumbo/defconfig b/boards/arm/stm32u3/nucleo-u3c5zi-q/configs/jumbo/defconfig new file mode 100644 index 00000000000..95322dd4b9f --- /dev/null +++ b/boards/arm/stm32u3/nucleo-u3c5zi-q/configs/jumbo/defconfig @@ -0,0 +1,63 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="nucleo-u3c5zi-q" +CONFIG_ARCH_BOARD_NUCLEO_U3C5ZI_Q=y +CONFIG_ARCH_CHIP="stm32u3" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32U3=y +CONFIG_ARCH_CHIP_STM32U3C5ZI=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LOOPSPERMSEC=4800 +CONFIG_BUILTIN=y +CONFIG_DEBUG_FEATURES=y +CONFIG_DEBUG_FULLOPT=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_EXAMPLES_HELLO=y +CONFIG_FS_PROCFS=y +CONFIG_FS_PROCFS_REGISTER=y +CONFIG_FS_TMPFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBM=y +CONFIG_LINE_MAX=64 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_MAXARGUMENTS=12 +CONFIG_NSH_READLINE=y +CONFIG_RAMLOG=y +CONFIG_RAMLOG_BUFSIZE=8192 +CONFIG_RAMLOG_SYSLOG=y +CONFIG_RAM_SIZE=655360 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_READLINE_CMD_HISTORY=y +CONFIG_READLINE_TABCOMPLETION=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_CPULOAD_SYSCLK=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_IRQMONITOR=y +CONFIG_SCHED_LPWORK=y +CONFIG_SCHED_WAITPID=y +CONFIG_STACK_COLORATION=y +CONFIG_STM32_USART1=y +CONFIG_SYSLOG_INTBUFFER=y +CONFIG_SYSLOG_PRIORITY=y +CONFIG_SYSLOG_PROCESS_NAME=y +CONFIG_SYSLOG_TIMESTAMP=y +CONFIG_SYSTEM_CLE=y +CONFIG_SYSTEM_NSH=y +CONFIG_TASK_NAME_SIZE=32 +CONFIG_TESTING_GETPRIME=y +CONFIG_TESTING_OSTEST=y +CONFIG_TIMER=y +CONFIG_USART1_SERIAL_CONSOLE=y +CONFIG_USEC_PER_TICK=1000 diff --git a/boards/arm/stm32u3/nucleo-u3c5zi-q/configs/nsh/defconfig b/boards/arm/stm32u3/nucleo-u3c5zi-q/configs/nsh/defconfig new file mode 100644 index 00000000000..704c372558d --- /dev/null +++ b/boards/arm/stm32u3/nucleo-u3c5zi-q/configs/nsh/defconfig @@ -0,0 +1,35 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="nucleo-u3c5zi-q" +CONFIG_ARCH_BOARD_NUCLEO_U3C5ZI_Q=y +CONFIG_ARCH_CHIP="stm32u3" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32U3=y +CONFIG_ARCH_CHIP_STM32U3C5ZI=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_BOARD_LOOPSPERMSEC=4800 +CONFIG_BUILTIN=y +CONFIG_FS_PROCFS=y +CONFIG_FS_PROCFS_REGISTER=y +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_LINE_MAX=64 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=655360 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_STM32_USART1=y +CONFIG_SYSTEM_NSH=y +CONFIG_TASK_NAME_SIZE=0 +CONFIG_USART1_SERIAL_CONSOLE=y diff --git a/boards/arm/stm32u3/nucleo-u3c5zi-q/include/board.h b/boards/arm/stm32u3/nucleo-u3c5zi-q/include/board.h new file mode 100644 index 00000000000..1153e93038f --- /dev/null +++ b/boards/arm/stm32u3/nucleo-u3c5zi-q/include/board.h @@ -0,0 +1,152 @@ +/**************************************************************************** + * boards/arm/stm32u3/nucleo-u3c5zi-q/include/board.h + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_ARM_STM32U3_NUCLEO_U3C5ZI_Q_INCLUDE_BOARD_H +#define __BOARDS_ARM_STM32U3_NUCLEO_U3C5ZI_Q_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#ifndef __ASSEMBLY__ +# include <stdint.h> +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Clocking *****************************************************************/ + +/* The NUCLEO-U3C5ZI-Q uses the 96 MHz MSIRC0 as its system clock. + * + * System clock source : MSIS (MSIRC0) + * SYSCLK : 96 MHz + * HCLK : 96 MHz (SYSCLK / 1) + * PCLK1 : 96 MHz (HCLK / 1) + * PCLK2 : 96 MHz (HCLK / 1) + * PCLK3 : 96 MHz (HCLK / 1) + * Core supply : SMPS, voltage scale 1, EPOD booster enabled + * FLASH latency : 3 wait states + */ + +#define STM32_BOARD_USEMSIS 1 +#define STM32_RCC_ICSCR1_MSISSEL RCC_ICSCR1_MSISSEL_MSIRC0 +#define STM32_RCC_ICSCR1_MSISDIV RCC_ICSCR1_MSISDIV_DIV1 + +#define STM32_RCC_CFGR4_BOOSTSEL RCC_CFGR4_BOOSTSEL_MSIS +#define STM32_RCC_CFGR4_BOOSTDIV RCC_CFGR4_BOOSTDIV_DIV1 + +#define STM32_PWR_CR3_REGSEL PWR_CR3_REGSEL_SMPS +#define STM32_PWR_VOSR_RANGE PWR_VOSR_R1EN +#define STM32_PWR_VOSR_RANGERDY PWR_VOSR_R1RDY +#define STM32_PWR_VOSR_BOOST PWR_VOSR_BOOSTEN + +#define STM32_MSIS_FREQUENCY 96000000ul +#define STM32_SYSCLK_FREQUENCY STM32_MSIS_FREQUENCY + +#define STM32_RCC_CFGR2_HPRE RCC_CFGR2_HPRE_SYSCLK +#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY + +#define STM32_RCC_CFGR2_PPRE1 RCC_CFGR2_PPRE1_HCLK +#define STM32_PCLK1_FREQUENCY STM32_HCLK_FREQUENCY + +#define STM32_RCC_CFGR2_PPRE2 RCC_CFGR2_PPRE2_HCLK +#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY + +#define STM32_RCC_CFGR3_PPRE3 RCC_CFGR3_PPRE3_HCLK +#define STM32_PCLK3_FREQUENCY STM32_HCLK_FREQUENCY + +#define STM32_FLASH_ACR_LATENCY FLASH_ACR_LATENCY_3 + +#define STM32_TIM1_CLKIN STM32_PCLK2_FREQUENCY +#define STM32_TIM2_CLKIN STM32_PCLK1_FREQUENCY +#define STM32_TIM3_CLKIN STM32_PCLK1_FREQUENCY +#define STM32_TIM4_CLKIN STM32_PCLK1_FREQUENCY +#define STM32_TIM6_CLKIN STM32_PCLK1_FREQUENCY +#define STM32_TIM7_CLKIN STM32_PCLK1_FREQUENCY +#define STM32_TIM8_CLKIN STM32_PCLK2_FREQUENCY +#define STM32_TIM12_CLKIN STM32_PCLK2_FREQUENCY +#define STM32_TIM15_CLKIN STM32_PCLK2_FREQUENCY +#define STM32_TIM16_CLKIN STM32_PCLK2_FREQUENCY +#define STM32_TIM17_CLKIN STM32_PCLK2_FREQUENCY + +/* USART1 is connected to the ST-LINK virtual COM port. */ + +#define GPIO_USART1_RX GPIO_USART1_RX_1 +#define GPIO_USART1_TX GPIO_USART1_TX_1 + +/* User LEDs */ + +#define GPIO_LED_GREEN (GPIO_OUTPUT | GPIO_PUSHPULL | \ + GPIO_SPEED_2MHZ | GPIO_OUTPUT_CLEAR | \ + GPIO_PORTA | GPIO_PIN5) +#define GPIO_LED_RED (GPIO_OUTPUT | GPIO_PUSHPULL | \ + GPIO_SPEED_2MHZ | GPIO_OUTPUT_CLEAR | \ + GPIO_PORTE | GPIO_PIN14) +#define GPIO_LED_BLUE (GPIO_OUTPUT | GPIO_PUSHPULL | \ + GPIO_SPEED_2MHZ | GPIO_OUTPUT_CLEAR | \ + GPIO_PORTF | GPIO_PIN8) + +#define BOARD_LED_GREEN 0 +#define BOARD_LED_RED 1 +#define BOARD_LED_BLUE 2 +#define BOARD_NLEDS 3 + +#define BOARD_LED_GREEN_BIT (1 << BOARD_LED_GREEN) +#define BOARD_LED_RED_BIT (1 << BOARD_LED_RED) +#define BOARD_LED_BLUE_BIT (1 << BOARD_LED_BLUE) + +/* User button B1 is active high. */ + +#define GPIO_BTN_USER (GPIO_INPUT | GPIO_FLOAT | \ + GPIO_PORTC | GPIO_PIN13) +#define BUTTON_USER 0 +#define NUM_BUTTONS 1 +#define BUTTON_USER_BIT (1 << BUTTON_USER) + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +void stm32_board_initialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __BOARDS_ARM_STM32U3_NUCLEO_U3C5ZI_Q_INCLUDE_BOARD_H */ diff --git a/boards/arm/stm32u3/nucleo-u3c5zi-q/scripts/Make.defs b/boards/arm/stm32u3/nucleo-u3c5zi-q/scripts/Make.defs new file mode 100644 index 00000000000..bd6ad7907d0 --- /dev/null +++ b/boards/arm/stm32u3/nucleo-u3c5zi-q/scripts/Make.defs @@ -0,0 +1,36 @@ +############################################################################ +# boards/arm/stm32u3/nucleo-u3c5zi-q/scripts/Make.defs +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv8-m/Toolchain.defs + +ARCHSCRIPT = $(BOARD_DIR)$(DELIM)scripts$(DELIM)flash.ld + +CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) +CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) +CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) +AFLAGS := $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 diff --git a/boards/arm/stm32u3/nucleo-u3c5zi-q/scripts/flash.ld b/boards/arm/stm32u3/nucleo-u3c5zi-q/scripts/flash.ld new file mode 100644 index 00000000000..fb0cb3b062a --- /dev/null +++ b/boards/arm/stm32u3/nucleo-u3c5zi-q/scripts/flash.ld @@ -0,0 +1,107 @@ +/**************************************************************************** + * boards/arm/stm32u3/nucleo-u3c5zi-q/scripts/flash.ld + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 2048K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 640K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : + { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : + { + _sinit = ABSOLUTE(.); + KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*) + SORT_BY_INIT_PRIORITY(.ctors.*))) + KEEP(*(.init_array + EXCLUDE_FILE(*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o) + .ctors)) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : + { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : + { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : + { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + . = ALIGN(4); + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : + { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN(8); + _ebss = ABSOLUTE(.); + } > sram + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/boards/arm/stm32u3/nucleo-u3c5zi-q/src/CMakeLists.txt b/boards/arm/stm32u3/nucleo-u3c5zi-q/src/CMakeLists.txt new file mode 100644 index 00000000000..796aec3b5d1 --- /dev/null +++ b/boards/arm/stm32u3/nucleo-u3c5zi-q/src/CMakeLists.txt @@ -0,0 +1,25 @@ +# ############################################################################## +# boards/arm/stm32u3/nucleo-u3c5zi-q/src/CMakeLists.txt +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed to the Apache Software Foundation (ASF) under one or more contributor +# license agreements. See the NOTICE file distributed with this work for +# additional information regarding copyright ownership. The ASF licenses this +# file to you under the Apache License, Version 2.0 (the "License"); you may not +# use this file except in compliance with the License. You may obtain a copy of +# the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations under +# the License. +# +# ############################################################################## + +target_sources(board PRIVATE stm32_boot.c stm32_bringup.c) + +set_property(GLOBAL PROPERTY LD_SCRIPT "${NUTTX_BOARD_DIR}/scripts/flash.ld") diff --git a/boards/arm/stm32u3/nucleo-u3c5zi-q/src/Make.defs b/boards/arm/stm32u3/nucleo-u3c5zi-q/src/Make.defs new file mode 100644 index 00000000000..5d2504c5e8e --- /dev/null +++ b/boards/arm/stm32u3/nucleo-u3c5zi-q/src/Make.defs @@ -0,0 +1,30 @@ +############################################################################ +# boards/arm/stm32u3/nucleo-u3c5zi-q/src/Make.defs +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = stm32_boot.c stm32_bringup.c + +DEPPATH += --dep-path board +VPATH += :board +CFLAGS += ${INCDIR_PREFIX}$(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)board diff --git a/boards/arm/stm32u3/nucleo-u3c5zi-q/src/nucleo-u3c5zi-q.h b/boards/arm/stm32u3/nucleo-u3c5zi-q/src/nucleo-u3c5zi-q.h new file mode 100644 index 00000000000..f9184c2567b --- /dev/null +++ b/boards/arm/stm32u3/nucleo-u3c5zi-q/src/nucleo-u3c5zi-q.h @@ -0,0 +1,35 @@ +/**************************************************************************** + * boards/arm/stm32u3/nucleo-u3c5zi-q/src/nucleo-u3c5zi-q.h + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_ARM_STM32U3_NUCLEO_U3C5ZI_Q_SRC_NUCLEO_U3C5ZI_Q_H +#define __BOARDS_ARM_STM32U3_NUCLEO_U3C5ZI_Q_SRC_NUCLEO_U3C5ZI_Q_H + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +int stm32_bringup(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __BOARDS_ARM_STM32U3_NUCLEO_U3C5ZI_Q_SRC_NUCLEO_U3C5ZI_Q_H */ diff --git a/boards/arm/stm32u3/nucleo-u3c5zi-q/src/stm32_boot.c b/boards/arm/stm32u3/nucleo-u3c5zi-q/src/stm32_boot.c new file mode 100644 index 00000000000..3239f99281d --- /dev/null +++ b/boards/arm/stm32u3/nucleo-u3c5zi-q/src/stm32_boot.c @@ -0,0 +1,44 @@ +/**************************************************************************** + * boards/arm/stm32u3/nucleo-u3c5zi-q/src/stm32_boot.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include "nucleo-u3c5zi-q.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +void stm32_board_initialize(void) +{ +} + +#ifdef CONFIG_BOARD_LATE_INITIALIZE +void board_late_initialize(void) +{ + stm32_bringup(); +} +#endif diff --git a/boards/arm/stm32u3/nucleo-u3c5zi-q/src/stm32_bringup.c b/boards/arm/stm32u3/nucleo-u3c5zi-q/src/stm32_bringup.c new file mode 100644 index 00000000000..199ce1e41a0 --- /dev/null +++ b/boards/arm/stm32u3/nucleo-u3c5zi-q/src/stm32_bringup.c @@ -0,0 +1,50 @@ +/**************************************************************************** + * boards/arm/stm32u3/nucleo-u3c5zi-q/src/stm32_bringup.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <sys/mount.h> + +#include <nuttx/board.h> + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +int stm32_bringup(void) +{ +#ifdef CONFIG_FS_PROCFS + int ret; + + ret = mount(NULL, "/proc", "procfs", 0, NULL); + if (ret < 0) + { + return ret; + } +#endif + + return OK; +}
