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commit 86498c58e1e908e016692f7d760b5c7c2caeb397 Author: zhangyu117 <[email protected]> AuthorDate: Fri Aug 21 11:47:44 2026 +0800 arch/arm/src: add hwspinlock driver for cxd56, rp2040 and lc823450 Add hardware spinlock driver implementations for cxd56, rp2040, and lc823450 chips. These drivers provide the hwspinlock_ops_s interface used by the atomic hwspinlock backend. Signed-off-by: zhangyu117 <[email protected]> --- arch/arm/src/cxd56xx/CMakeLists.txt | 3 +- arch/arm/src/cxd56xx/Make.defs | 1 + arch/arm/src/cxd56xx/cxd56_hwspinlock.c | 63 ++++++++++++++++++++++++ arch/arm/src/lc823450/Make.defs | 1 + arch/arm/src/lc823450/lc823450_hwspinlock.c | 75 +++++++++++++++++++++++++++++ arch/arm/src/rp2040/Make.defs | 1 + arch/arm/src/rp2040/rp2040_hwspinlock.c | 59 +++++++++++++++++++++++ 7 files changed, 202 insertions(+), 1 deletion(-) diff --git a/arch/arm/src/cxd56xx/CMakeLists.txt b/arch/arm/src/cxd56xx/CMakeLists.txt index bd06dc25591..f6745758f22 100644 --- a/arch/arm/src/cxd56xx/CMakeLists.txt +++ b/arch/arm/src/cxd56xx/CMakeLists.txt @@ -39,7 +39,8 @@ set(SRCS cxd56_icc.c cxd56_powermgr.c cxd56_farapi.c - cxd56_sysctl.c) + cxd56_sysctl.c + cxd56_hwspinlock.c) if(CONFIG_SMP) list(APPEND SRCS cxd56_cpuidlestack.c) diff --git a/arch/arm/src/cxd56xx/Make.defs b/arch/arm/src/cxd56xx/Make.defs index 11f45965c4a..0c14887131e 100644 --- a/arch/arm/src/cxd56xx/Make.defs +++ b/arch/arm/src/cxd56xx/Make.defs @@ -39,6 +39,7 @@ CHIP_CSRCS += cxd56_icc.c CHIP_CSRCS += cxd56_powermgr.c CHIP_CSRCS += cxd56_farapi.c CHIP_CSRCS += cxd56_sysctl.c +CHIP_CSRCS += cxd56_hwspinlock.c ifeq ($(CONFIG_SMP),y) CHIP_CSRCS += cxd56_cpuidlestack.c diff --git a/arch/arm/src/cxd56xx/cxd56_hwspinlock.c b/arch/arm/src/cxd56xx/cxd56_hwspinlock.c new file mode 100644 index 00000000000..074ea25b896 --- /dev/null +++ b/arch/arm/src/cxd56xx/cxd56_hwspinlock.c @@ -0,0 +1,63 @@ +/**************************************************************************** + * arch/arm/src/cxd56xx/cxd56_hwspinlock.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/hwspinlock/hwspinlock.h> + +#include "arm_internal.h" +#include "hardware/cxd56_sph.h" + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static bool cxd56_hwspinlock_trylock(struct hwspinlock_dev_s *dev); +static void cxd56_hwspinlock_unlock(struct hwspinlock_dev_s *dev); + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +const struct hwspinlock_ops_s g_cxd56_hwspinlock_ops = +{ + .trylock = cxd56_hwspinlock_trylock, + .unlock = cxd56_hwspinlock_unlock +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static bool cxd56_hwspinlock_trylock(struct hwspinlock_dev_s *dev) +{ + uint32_t sphlocked = ((up_cpu_index() + 2) << 16) | 0x1; + + putreg32(REQ_LOCK, CXD56_SPH_REQ(dev->id)); + + return getreg32(CXD56_SPH_STS(dev->id)) == sphlocked; +} + +static void cxd56_hwspinlock_unlock(struct hwspinlock_dev_s *dev) +{ + putreg32(REQ_UNLOCK, CXD56_SPH_REQ(dev->id)); +} diff --git a/arch/arm/src/lc823450/Make.defs b/arch/arm/src/lc823450/Make.defs index 14e6f6216b5..d6a60696eef 100644 --- a/arch/arm/src/lc823450/Make.defs +++ b/arch/arm/src/lc823450/Make.defs @@ -25,6 +25,7 @@ include armv7-m/Make.defs CHIP_CSRCS = lc823450_allocateheap2.c lc823450_start.c lc823450_irq.c lc823450_timer.c CHIP_CSRCS += lc823450_lowputc.c lc823450_serial.c lc823450_clockconfig.c CHIP_CSRCS += lc823450_syscontrol.c lc823450_gpio.c +CHIP_CSRCS += lc823450_hwspinlock.c # Configuration-dependent LC823450 files diff --git a/arch/arm/src/lc823450/lc823450_hwspinlock.c b/arch/arm/src/lc823450/lc823450_hwspinlock.c new file mode 100644 index 00000000000..35472c0f3dc --- /dev/null +++ b/arch/arm/src/lc823450/lc823450_hwspinlock.c @@ -0,0 +1,75 @@ +/**************************************************************************** + * arch/arm/src/lc823450/lc823450_hwspinlock.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/hwspinlock/hwspinlock.h> + +#include "arm_internal.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define LC823450_MUTEX_REG_BASE 0x40005000 +#define LC823450_MUTEX_REG_LEN 4 +#define LC823450_MUTEX_REG_ADDR(id) \ + (LC823450_MUTEX_REG_BASE + (id) * LC823450_MUTEX_REG_LEN) + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static bool lc823450_hwspinlock_trylock(struct hwspinlock_dev_s *dev); +static void lc823450_hwspinlock_unlock(struct hwspinlock_dev_s *dev); + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +const struct hwspinlock_ops_s g_lc823450_hwspinlock_ops = +{ + .trylock = lc823450_hwspinlock_trylock, + .unlock = lc823450_hwspinlock_unlock +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static bool lc823450_hwspinlock_trylock(struct hwspinlock_dev_s *dev) +{ + uint32_t val; + + val = (up_cpu_index() << 16) | 0x1; + putreg32(val, LC823450_MUTEX_REG_ADDR(dev->id)); + + return getreg32(LC823450_MUTEX_REG_ADDR(dev->id)) == val; +} + +static void lc823450_hwspinlock_unlock(struct hwspinlock_dev_s *dev) +{ + uint32_t val; + + val = (up_cpu_index() << 16) | 0x0; + putreg32(val, LC823450_MUTEX_REG_ADDR(dev->id)); +} diff --git a/arch/arm/src/rp2040/Make.defs b/arch/arm/src/rp2040/Make.defs index 2eeabede0b9..43685810274 100644 --- a/arch/arm/src/rp2040/Make.defs +++ b/arch/arm/src/rp2040/Make.defs @@ -35,6 +35,7 @@ CHIP_CSRCS += rp2040_pio.c CHIP_CSRCS += rp2040_clock.c CHIP_CSRCS += rp2040_xosc.c CHIP_CSRCS += rp2040_pll.c +CHIP_CSRCS += rp2040_hwspinlock.c ifeq ($(CONFIG_SMP),y) CHIP_CSRCS += rp2040_cpustart.c diff --git a/arch/arm/src/rp2040/rp2040_hwspinlock.c b/arch/arm/src/rp2040/rp2040_hwspinlock.c new file mode 100644 index 00000000000..9cc762f1e19 --- /dev/null +++ b/arch/arm/src/rp2040/rp2040_hwspinlock.c @@ -0,0 +1,59 @@ +/**************************************************************************** + * arch/arm/src/rp2040/rp2040_hwspinlock.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/hwspinlock/hwspinlock.h> + +#include "arm_internal.h" +#include "hardware/rp2040_sio.h" + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static bool rp2040_hwspinlock_trylock(struct hwspinlock_dev_s *dev); +static void rp2040_hwspinlock_unlock(struct hwspinlock_dev_s *dev); + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +const struct hwspinlock_ops_s g_rp2040_hwspinlock_ops = +{ + .trylock = rp2040_hwspinlock_trylock, + .unlock = rp2040_hwspinlock_unlock +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static bool rp2040_hwspinlock_trylock(struct hwspinlock_dev_s *dev) +{ + return getreg32(RP2040_SIO_SPINLOCK(dev->id)); +} + +static void rp2040_hwspinlock_unlock(struct hwspinlock_dev_s *dev) +{ + putreg32(0, RP2040_SIO_SPINLOCK(dev->id)); +}
