royzah commented on code in PR #20193: URL: https://github.com/apache/nuttx/pull/20193#discussion_r4053635939
########## arch/arm64/src/common/arm64_aes.c: ########## @@ -0,0 +1,264 @@ +/**************************************************************************** + * arch/arm64/src/common/arm64_aes.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <assert.h> +#include <debug.h> +#include <stdbool.h> +#include <stdint.h> +#include <string.h> + +#include <crypto/aes.h> + +#include "arm64_internal.h" + +#ifdef CONFIG_ARM64_CRYPTO_AES + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* ID_AA64ISAR0_EL1.AES, bits [7:4]. Non-zero means AESE/AESD and the + * MixColumns pair are implemented. + */ + +#define ID_AA64ISAR0_AES_SHIFT 4 +#define ID_AA64ISAR0_AES_MASK 0xful + +#define AES_BLOCK_SIZE 16 + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/* The table-driven cipher indexes memory with key-dependent values, so its + * timing follows the cache. These instructions do not. + */ + +static bool aes_hw_present(void) +{ + uint64_t isar0; + + __asm__ volatile ("mrs %0, id_aa64isar0_el1" : "=r" (isar0)); + + return ((isar0 >> ID_AA64ISAR0_AES_SHIFT) & ID_AA64ISAR0_AES_MASK) != 0; +} + +/* Only SubWord is accelerated; the rest of the schedule is ordinary + * arithmetic, so it stays in C. + */ + +static uint32_t aes_sub_word(uint32_t in) +{ + uint8_t block[AES_BLOCK_SIZE]; + uint32_t out; + + /* A zero round key leaves AESE doing SubBytes and ShiftRows only, and + * ShiftRows cannot disturb a state whose four columns are identical. + */ + + memcpy(block + 0, &in, 4); + memcpy(block + 4, &in, 4); + memcpy(block + 8, &in, 4); + memcpy(block + 12, &in, 4); + + __asm__ volatile ( + "ld1 {v0.16b}, [%0] \n" + "movi v1.16b, #0 \n" + "aese v0.16b, v1.16b \n" + "st1 {v0.16b}, [%0] \n" + :: "r" (block) : "v0", "v1", "memory"); + + memcpy(&out, block, sizeof(out)); + return out; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: aes_setkey + * + * Description: + * Expand an AES key. Returns 0, or -1 for a key length that is not 128, + * 192 or 256 bits, or on a core without the extension. + * + ****************************************************************************/ + +int aes_setkey(FAR AES_CTX *ctx, FAR const uint8_t *key, int len) Review Comment: Yes. And it found a bug: my file and [crypto/aes.c](https://github.com/apache/nuttx/blob/master/crypto/aes.c) define the same five functions, so both on will not link. [aes_cypher()](https://github.com/apache/nuttx/blob/master/arch/arm/src/stm32h7/stm32_crypto.c) avoids that, like stm32h7 and [esp32](https://github.com/apache/nuttx/blob/master/arch/xtensa/src/esp32/esp32_crypto.c), but then only /dev/crypto gets it, not [xform.c](https://github.com/apache/nuttx/blob/master/crypto/xform.c). Prefer that? -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
