xiaoxiang781216 commented on code in PR #19797: URL: https://github.com/apache/nuttx/pull/19797#discussion_r4064175430
########## arch/xtensa/src/esp32s3/esp32s3_pgalloc.c: ########## @@ -0,0 +1,227 @@ +/**************************************************************************** + * arch/xtensa/src/esp32s3/esp32s3_pgalloc.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <assert.h> +#include <debug.h> +#include <inttypes.h> + +#include <nuttx/addrenv.h> +#include <nuttx/arch.h> +#include <nuttx/pgalloc.h> +#include <nuttx/sched.h> + +#include "sched/sched.h" + +#include "esp32s3_addrenv.h" + +#ifdef CONFIG_ESP32S3_SPIRAM +# include "esp32s3_spiram.h" +#endif + +#ifdef CONFIG_MM_PGALLOC Review Comment: remove the check ########## arch/xtensa/src/esp32s3/esp32s3_addrenv_utils.c: ########## @@ -0,0 +1,171 @@ +/**************************************************************************** + * arch/xtensa/src/esp32s3/esp32s3_addrenv_utils.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <assert.h> +#include <stdbool.h> +#include <stdint.h> + +#include <nuttx/addrenv.h> +#include <nuttx/arch.h> +#include <nuttx/pgalloc.h> + +#include "esp32s3_addrenv.h" + +#ifdef CONFIG_ARCH_ADDRENV Review Comment: remove the check ########## boards/xtensa/esp32s3/esp32s3-devkit/scripts/gnu-elf.ld: ########## @@ -0,0 +1,159 @@ +/**************************************************************************** + * boards/xtensa/esp32s3/esp32s3-devkit/scripts/gnu-elf.ld Review Comment: why not reuse the general elf LD template ########## arch/Kconfig: ########## @@ -493,6 +493,7 @@ config ARCH_HAVE_VFORK config ARCH_HAVE_FORK bool + default y if ARCH_XTENSA && BUILD_KERNEL Review Comment: let select in ARCH_XTENSA ########## arch/xtensa/src/esp32s3/esp32s3_pagefault.c: ########## @@ -0,0 +1,135 @@ +/**************************************************************************** + * arch/xtensa/src/esp32s3/esp32s3_pagefault.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <stdbool.h> +#include <stdint.h> +#include <debug.h> +#include <errno.h> + +#include <nuttx/sched.h> +#include <arch/irq.h> +#include <arch/xtensa/xtensa_corebits.h> + +#include "xtensa.h" +#include "sched/sched.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifdef CONFIG_ESP32S3_PAGEFAULT_SELFTEST +/* Runtime self-test: proof of the recoverable-fault primitive on silicon. + * A load of this out-of-cache-region address raises a precise LoadProhibited + * (EXCCAUSE 28, "cache attribute does not allow load") whose EXCVADDR tracks + * the address exactly. The dispatcher returns "serviced" WITHOUT making the + * address accessible for the first PF_SELFTEST_REPEATS re-executions, so the + * exception vector's RFE re-runs the identical faulting instruction. + * Being re-entered that many times for one instruction proves that RFE + * cleanly restarts a faulted precise access (the write-buffer / prefetch + * corner case that gates recoverable page faults); it then steps the saved + * PC past the 2-byte l32i.n so the faulting task resumes. Trigger it from a + * user task, e.g. examples/pffault: nsh> pffault r 0x80000000 + */ + +# define PF_SELFTEST_VADDR 0x80000000ul +# define PF_SELFTEST_REPEATS 3 + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static volatile int g_pf_selftest_hits; +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp32s3_pagefault_dispatch + * + * Description: + * Offered the precise, restartable exceptions raised by a cache-attribute + * permission violation (EXCCAUSE Load/Store/InstrFetch Prohibited). The + * faulting virtual address is in regs[REG_EXCVADDR] and the faulting PC in + * regs[REG_PC]; both are populated by the common Xtensa user exception + * handler (frame layout: NuttX REG_*). + * + * This unit establishes the recoverable-fault primitive. The full + * servicing (map a page / restore a cache attribute, then RFE-restart) is + * built on top in the addrenv / demand-paging units; here the dispatcher + * reports the fault (with its tracking EXCVADDR) and declines to service + * it, except under the self-test which proves the RFE-restart on silicon. + * + * Returned Value: + * OK if the faulting instruction may be (re-)executed via RFE; a negated + * errno otherwise (the caller then panics / aborts the faulting task). + * + ****************************************************************************/ + +int esp32s3_pagefault_dispatch(int exccause, uint32_t *regs) +{ + uintptr_t vaddr = (uintptr_t)regs[REG_EXCVADDR]; + uintptr_t pc = (uintptr_t)regs[REG_PC]; + +#ifdef CONFIG_ESP32S3_PAGEFAULT_SELFTEST + if (exccause == EXCCAUSE_LOAD_PROHIBITED && vaddr == PF_SELFTEST_VADDR) + { + g_pf_selftest_hits++; + + _alert("PAGEFAULT SELFTEST: restart #%d precise LoadProhibited " + "EXCVADDR=%08x PC=%08x\n", + g_pf_selftest_hits, (unsigned)vaddr, (unsigned)pc); + + if (g_pf_selftest_hits < PF_SELFTEST_REPEATS) + { + /* Return serviced without changing anything: the RFE must + * re-execute the identical faulting load and land back here. + */ + + return OK; + } + + /* Proof complete: step past the 2-byte l32i.n so the task resumes. */ + + regs[REG_PC] = pc + 2; + g_pf_selftest_hits = 0; + _alert("PAGEFAULT SELFTEST: RFE cleanly restarted the load %d times; " + "resuming\n", PF_SELFTEST_REPEATS); + return OK; + } +#endif + + /* Report the precise fault (with its tracking EXCVADDR) and decline to + * service it, so the caller falls through to the panic / abort path. + */ + + _alert("cache fault: EXCCAUSE=%d EXCVADDR=%08x PC=%08x task=%s\n", + exccause, (unsigned)vaddr, (unsigned)pc, Review Comment: remove the cast ########## arch/xtensa/src/esp32s3/Kconfig: ########## @@ -359,27 +359,9 @@ config ESP32S3_PGPOOL_SCRATCH instead, mapped for the duration of one operation and invalidated afterwards. ARCH_KMAP_VBASE and ARCH_KMAP_NPAGES describe it. -if ESP32S3_PGPOOL_SCRATCH Review Comment: let move the change in this patch into the initial patch ########## arch/xtensa/src/esp32s3/esp32s3_pgalloc.c: ########## @@ -217,47 +217,47 @@ void up_allocate_pgheap(void **heap_start, size_t *heap_size) * every region of every new process. */ - { - uintptr_t ramstart = (uintptr_t)esp_spiram_allocable_vaddr_start(); - uintptr_t ramend = (uintptr_t)esp_spiram_allocable_vaddr_end(); - uintptr_t poolvbase; - uint32_t rampbase; - - if (!esp32s3_mmu_paddr(ramstart, &rampbase)) - { - _err("ERROR: PSRAM window base %08" PRIxPTR " maps nothing\n", - ramstart); - PANIC(); - } - - if (ESP32S3_PGPOOL_PBASE < rampbase || - ESP32S3_PGPOOL_PEND > rampbase + (ramend - ramstart)) - { - _err("ERROR: page pool %08x-%08x is outside the mapped PSRAM " - "%08" PRIx32 "-%08" PRIxPTR "\n", - ESP32S3_PGPOOL_PBASE, ESP32S3_PGPOOL_PEND, - rampbase, rampbase + (ramend - ramstart)); - PANIC(); - } - - poolvbase = ramstart + (ESP32S3_PGPOOL_PBASE - rampbase); - - _info("PSRAM window %08" PRIxPTR "-%08" PRIxPTR " (phys %08" PRIx32 - "), page pool phys %08x-%08x at %08" PRIxPTR "\n", - ramstart, ramend, rampbase, - ESP32S3_PGPOOL_PBASE, ESP32S3_PGPOOL_PEND, poolvbase); - - check_windows_clear(MMU_ENTRY_OF(ramstart), MMU_ENTRY_OF(ramend - 1)); - - /* Everything above has been established while the pool was still - * mapped, which is the only time it can be. Now take that mapping - * away: from here the kernel reaches a pool page only through - * esp32s3_pgmap(), and an unprivileged task reaches one only if it is - * its own. - */ - - esp32s3_pgpool_unmap(poolvbase, ESP32S3_PGPOOL_SIZE); - } + { + uintptr_t ramstart = (uintptr_t)esp_spiram_allocable_vaddr_start(); Review Comment: let merge into the initial patch which make the wrong style ########## arch/xtensa/src/esp32s3/chip_macros.h: ########## @@ -33,7 +33,7 @@ #endif #endif -#if defined(CONFIG_ESP32S3_WCL) && defined(CONFIG_BUILD_PROTECTED) +#if defined(CONFIG_ESP32S3_WCL) && !defined(CONFIG_BUILD_FLAT) Review Comment: merge this patch to the patch which add the kernel support ########## arch/xtensa/src/esp32s3/esp32s3_addrenv.c: ########## @@ -0,0 +1,598 @@ +/**************************************************************************** + * arch/xtensa/src/esp32s3/esp32s3_addrenv.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <assert.h> +#include <debug.h> +#include <errno.h> +#include <string.h> + +#include <nuttx/addrenv.h> +#include <nuttx/arch.h> +#include <nuttx/irq.h> +#include <nuttx/pgalloc.h> +#include <nuttx/sched.h> + +#include "soc/ext_mem_defs.h" + +#include "esp32s3_addrenv.h" +#include "esp32s3_mmu.h" +#include "esp32s3_spiram.h" + +#ifdef CONFIG_ARCH_ADDRENV Review Comment: rremove too -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
