michallenc opened a new pull request, #20241:
URL: https://github.com/apache/nuttx/pull/20241

   ## Summary
   
   MCAN controller keeps track of empty TX HW FIFO slots in `priv->txfsem`
   semaphore. The semaphore is incremented from TX complete interrupt
   and taken before new frame is inserted to the HW FIFO.
   
   There may be a situation when TX HW FIFO is not full but the
   semaphore is not yet incremented because the driver didn't handle the
   interrupt. I managed to reproduce this issue when sending large
   data chunks over CAN bus and keeping the buffers full for most of
   the transmission process. This situation leads to the debug assertion
   although technically it's not a big issue -> the sending function
   waits on the semaphore until it's posted by the interrupt handler.
   
   Moreover, the sanity checks should not be necessary because
   `mcan_buffer_reserve` function will take care of fixing the semaphore
   value if it doesn't match with the FIFO.
   
   The entire semaphore logic is a bit weird and probably not
   necessary. All we need to do is to check `SAM_MCAN_TXFQS` register
   if there is at least one free slot in the queue. But this would
   require a bigger SAMv7 MCAN rewrite, this is rather a hot fix.
   
   ## Testing
   
   I was able to reproduce the issue when sending large chunks of data over CAN 
bus and basically keeping the HW buffers full for most of the time. That's when 
the removed assertion is false. Removing the assertion is rather a hotfix, the 
better long term solution would be the rewrite of SAMv7 MCAN driver to avoid 
using the semaphore, but I don't have a capacity for that right now.
   
   The removal of DEBUGASSERT doesn't mean we let any error happen, I managed 
to send all data over CAN bus without issues after this patch. This is thanks 
to `mcan_buffer_reserve` that fixes possible incorrect semaphore value if it 
doesn't match with the number of empty slots in FIFO.


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