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commit 9d0008c3b205ec7aa34efa06ed67f5026f51ae26
Author: leocafonso <[email protected]>
AuthorDate: Fri Sep 25 11:10:21 2026 -0700

    boards/arm/ra8m1: Add Renesas EK-RA8M1 board support
    
    Add board support for the EK-RA8M1 evaluation kit with nsh and
    nsh-leds configurations, linker script, LED support and bring-up.
    
    Co-Authored-By: Claude Sonnet 5 <[email protected]>
    Signed-off-by: leocafonso <[email protected]>
---
 boards/Kconfig                                     |  12 +
 boards/arm/ra8m1/ek-ra8m1/CMakeLists.txt           |  21 ++
 boards/arm/ra8m1/ek-ra8m1/Kconfig                  |   4 +
 .../arm/ra8m1/ek-ra8m1/configs/nsh-leds/defconfig  |  41 +++
 boards/arm/ra8m1/ek-ra8m1/configs/nsh/defconfig    |  40 +++
 boards/arm/ra8m1/ek-ra8m1/include/board.h          | 372 +++++++++++++++++++++
 boards/arm/ra8m1/ek-ra8m1/scripts/Make.defs        |  34 ++
 boards/arm/ra8m1/ek-ra8m1/scripts/ek_ra8m1.ld      | 289 ++++++++++++++++
 boards/arm/ra8m1/ek-ra8m1/src/CMakeLists.txt       |  31 ++
 boards/arm/ra8m1/ek-ra8m1/src/Makefile             |  31 ++
 boards/arm/ra8m1/ek-ra8m1/src/ek_ra8m1.h           |  55 +++
 boards/arm/ra8m1/ek-ra8m1/src/ra8m1_autoleds.c     | 124 +++++++
 boards/arm/ra8m1/ek-ra8m1/src/ra8m1_boot.c         |  78 +++++
 boards/arm/ra8m1/ek-ra8m1/src/ra8m1_bringup.c      |  79 +++++
 boards/arm/ra8m1/ek-ra8m1/src/ra8m1_userleds.c     |  98 ++++++
 15 files changed, 1309 insertions(+)

diff --git a/boards/Kconfig b/boards/Kconfig
index 3acfc7757b6..7a42a02720c 100644
--- a/boards/Kconfig
+++ b/boards/Kconfig
@@ -59,6 +59,14 @@ config ARCH_BOARD_XIAO_RA4M1
                This options selects the Seeed Studio XIAO RA4M1 board 
featuring the Renesas
                R7FA4M1 MCU running at 48 MHz.
 
+config ARCH_BOARD_EK_RA8M1
+       bool "Renesas EK-RA8M1"
+       depends on ARCH_CHIP_RA8M1
+       select ARCH_HAVE_LEDS
+       ---help---
+               This options selects the Renesas EK-RA8M1 evaluation kit 
featuring
+               the Renesas R7FA8M1AHECBD (Cortex-M85) MCU.
+
 config ARCH_BOARD_ARDUINO_M0
        bool "Arduino M0"
        depends on ARCH_CHIP_SAMD21G18A
@@ -4155,6 +4163,7 @@ config ARCH_BOARD
        default "qemu-i486"                    if ARCH_BOARD_QEMU_I486
        default "qemu-intel64"                 if ARCH_BOARD_INTEL64_QEMU
        default "xiao-ra4m1"                   if ARCH_BOARD_XIAO_RA4M1
+       default "ek-ra8m1"                     if ARCH_BOARD_EK_RA8M1
        default "raspberrypi-pico"             if ARCH_BOARD_RASPBERRYPI_PICO
        default "raspberrypi-4b"               if ARCH_BOARD_RASPBERRYPI_4B
        default "raspberrypi-pico-w"           if ARCH_BOARD_RASPBERRYPI_PICO_W
@@ -4746,6 +4755,9 @@ endif
 if ARCH_BOARD_XIAO_RA4M1
 source "boards/arm/ra4/xiao-ra4m1/Kconfig"
 endif
+if ARCH_BOARD_EK_RA8M1
+source "boards/arm/ra8m1/ek-ra8m1/Kconfig"
+endif
 if ARCH_BOARD_ARDUINO_M0
 source "boards/arm/samd2l2/arduino-m0/Kconfig"
 endif
diff --git a/boards/arm/ra8m1/ek-ra8m1/CMakeLists.txt 
b/boards/arm/ra8m1/ek-ra8m1/CMakeLists.txt
new file mode 100644
index 00000000000..b649c7ae8ec
--- /dev/null
+++ b/boards/arm/ra8m1/ek-ra8m1/CMakeLists.txt
@@ -0,0 +1,21 @@
+# 
##############################################################################
+# boards/arm/ra8m1/ek_ra8m1/CMakeLists.txt
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more 
contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may 
not
+# use this file except in compliance with the License.  You may obtain a copy 
of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# 
##############################################################################
+
+add_subdirectory(src)
diff --git a/boards/arm/ra8m1/ek-ra8m1/Kconfig 
b/boards/arm/ra8m1/ek-ra8m1/Kconfig
new file mode 100644
index 00000000000..f72f3c094ce
--- /dev/null
+++ b/boards/arm/ra8m1/ek-ra8m1/Kconfig
@@ -0,0 +1,4 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
diff --git a/boards/arm/ra8m1/ek-ra8m1/configs/nsh-leds/defconfig 
b/boards/arm/ra8m1/ek-ra8m1/configs/nsh-leds/defconfig
new file mode 100644
index 00000000000..7098f3a3998
--- /dev/null
+++ b/boards/arm/ra8m1/ek-ra8m1/configs/nsh-leds/defconfig
@@ -0,0 +1,41 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed 
.config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that 
includes your
+# modifications.
+#
+# CONFIG_ARCH_LEDS is not set
+# CONFIG_READLINE_ECHO is not set
+CONFIG_ARCH="arm"
+CONFIG_ARCH_BOARD="ek-ra8m1"
+CONFIG_ARCH_BOARD_EK_RA8M1=y
+CONFIG_ARCH_CHIP="ra8m1"
+CONFIG_ARCH_CHIP_R7FA8M1AHECBD=y
+CONFIG_ARCH_CHIP_RA8M1=y
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_BOARD_LOOPSPERMSEC=43103
+CONFIG_BUILTIN=y
+CONFIG_FS_PROCFS=y
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INTELHEX_BINARY=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_READLINE=y
+CONFIG_PREALLOC_TIMERS=4
+CONFIG_RAM_SIZE=917504
+CONFIG_RAM_START=0x22000000
+CONFIG_RA_SCI9_UART=y
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_WAITPID=y
+CONFIG_SCI9_SERIAL_CONSOLE=y
+CONFIG_START_DAY=28
+CONFIG_START_MONTH=6
+CONFIG_START_YEAR=2013
+CONFIG_SYSTEM_NSH=y
+CONFIG_TASK_NAME_SIZE=32
+CONFIG_USERLED=y
+CONFIG_USERLED_LOWER=y
diff --git a/boards/arm/ra8m1/ek-ra8m1/configs/nsh/defconfig 
b/boards/arm/ra8m1/ek-ra8m1/configs/nsh/defconfig
new file mode 100644
index 00000000000..c20b496bc04
--- /dev/null
+++ b/boards/arm/ra8m1/ek-ra8m1/configs/nsh/defconfig
@@ -0,0 +1,40 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed 
.config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that 
includes your
+# modifications.
+#
+CONFIG_ARCH="arm"
+CONFIG_ARCH_BOARD="ek-ra8m1"
+CONFIG_ARCH_BOARD_EK_RA8M1=y
+CONFIG_ARCH_CHIP="ra8m1"
+CONFIG_ARCH_CHIP_R7FA8M1AHECBD=y
+CONFIG_ARCH_CHIP_RA8M1=y
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_BOARD_LOOPSPERMSEC=43103
+CONFIG_BUILTIN=y
+CONFIG_FS_PROCFS=y
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INTELHEX_BINARY=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_READLINE=y
+CONFIG_PREALLOC_TIMERS=4
+CONFIG_RAM_SIZE=917504
+CONFIG_RAM_START=0x22000000
+CONFIG_RA_SCI9_UART=y
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_WAITPID=y
+CONFIG_SCI9_SERIAL_CONSOLE=y
+CONFIG_START_DAY=28
+CONFIG_START_MONTH=6
+CONFIG_START_YEAR=2013
+CONFIG_SYSTEM_NSH=y
+CONFIG_TASK_NAME_SIZE=32
+CONFIG_TESTING_OSTEST=y
+CONFIG_TESTING_OSTEST_NBARRIER_THREADS=3
+CONFIG_TESTING_OSTEST_STACKSIZE=2048
diff --git a/boards/arm/ra8m1/ek-ra8m1/include/board.h 
b/boards/arm/ra8m1/ek-ra8m1/include/board.h
new file mode 100644
index 00000000000..2b4d6eaa1bb
--- /dev/null
+++ b/boards/arm/ra8m1/ek-ra8m1/include/board.h
@@ -0,0 +1,372 @@
+/****************************************************************************
+ * boards/arm/ra8m1/ek-ra8m1/include/board.h
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __BOARDS_ARM_RA8M1_EK_RA8M1_INCLUDE_BOARD_H
+#define __BOARDS_ARM_RA8M1_EK_RA8M1_INCLUDE_BOARD_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+/* Do not include RA8M1 header files here */
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Clocking *****************************************************************/
+
+/* Every BOARD_* clock option below has to be defined by the board: the
+ * RA8M1 code (arch/arm/src/ra8m1/ra_clockconfig.h) derives all the clock
+ * frequencies from them and checks them against the limits of the RA8M1
+ * User's Manual, chapter 8.  A missing or invalid value stops the build
+ * with an #error that says what is wrong.  The MCU comes out of reset
+ * running from the 8 MHz MOCO with every divider at 1; the options here
+ * change that.
+ *
+ * The EK-RA8M1 clock sources are:
+ *
+ *   MOCO: 8 MHz internal oscillator (the reset system clock)
+ *   HOCO: internal oscillator, 16/18/20/32/48 MHz (BOARD_HOCO_FREQUENCY)
+ *   MOSC: 20 MHz resonator on EXTAL/XTAL
+ *
+ * The *_SOURCE options below take the real register-field values from
+ * arch/arm/src/ra8m1/hardware/ra8m1_system.h, not a value invented for
+ * this file: whichever register the option ends up in is named in each
+ * option's own description.  This file does not include that header (see
+ * the note above); the names are resolved later, when ra_clockconfig.h
+ * and ra_clockconfig.c use them, since both already include it themselves.
+ */
+
+/* Oscillators
+ *
+ * BOARD_HOCO_FREQUENCY
+ *   HOCO frequency in Hz: 16000000, 18000000, 20000000, 32000000 or
+ *   48000000.  This is the frequency the MCU starts the HOCO at after
+ *   reset, so it is also programmed into OFS1 (option bytes below).
+ *
+ * BOARD_MOSC_FREQUENCY
+ *   Frequency of the resonator, or of the external clock, on EXTAL/XTAL,
+ *   8000000 to 48000000 Hz.  Only needed when the MOSC is used, directly
+ *   or as a PLL source.
+ *
+ * BOARD_MOSC_EXTERNAL_CLOCK
+ *   0: a resonator is connected to EXTAL/XTAL.
+ *   1: EXTAL is driven by an external clock (no stabilization wait).
+ *
+ * BOARD_MOSC_STABILIZATION_US
+ *   How long to wait for the resonator to stabilize, in microseconds
+ *   (12 to 31139).  Use at least what the resonator manufacturer
+ *   recommends; it is rounded up to the next value the MOSC wait register
+ *   supports.  Not used with an external clock.
+ */
+
+#define BOARD_HOCO_FREQUENCY      48000000
+
+#define BOARD_MOSC_FREQUENCY      20000000
+#define BOARD_MOSC_EXTERNAL_CLOCK 0
+#define BOARD_MOSC_STABILIZATION_US 10000
+
+/* System clock source
+ *
+ * BOARD_SYSCLK_SOURCE feeds CPUCLK, ICLK, PCLKA-E, FCLK and BCLK (before
+ * their dividers).  It is the SCKSCR.CKSEL value: one of the
+ * R_SYSTEM_SCKSCR_CKSEL_* codes --
+ *
+ *   R_SYSTEM_SCKSCR_CKSEL_MOCO                  8 MHz MOCO (reset default)
+ *   R_SYSTEM_SCKSCR_CKSEL_HOCO                  HOCO, BOARD_HOCO_FREQUENCY
+ *   R_SYSTEM_SCKSCR_CKSEL_MAIN_CLOCK_OSCILLATOR Main oscillator (MOSC)
+ *   R_SYSTEM_SCKSCR_CKSEL_PLL                   PLL1 output P
+ *
+ * PLL2 can not be the system clock; it only feeds the dedicated peripheral
+ * clocks (SCICLK below).
+ */
+
+#define BOARD_SYSCLK_SOURCE       R_SYSTEM_SCKSCR_CKSEL_PLL
+
+/* PLL1 and PLL2
+ *
+ * A PLL is started only if something uses it: PLL1 when it is the system
+ * clock or a dedicated clock source, PLL2 when a dedicated clock uses it.
+ * The BOARD_PLL2_* options are only needed then.  For each PLL:
+ *
+ *   BOARD_PLLn_SOURCE
+ *     0 for the main oscillator (MOSC), or the PLLnCCR PLnSRCSEL bit
+ *     (R_SYSTEM_PLLCCR_PLSRCSEL for PLL1, R_SYSTEM_PLL2CCR_PL2SRCSEL for
+ *     PLL2) for the HOCO -- either source is 8 MHz to 48 MHz.  With the
+ *     HOCO as the source CPUCLK is limited to 360 MHz.
+ *   BOARD_PLLn_INPUT_DIVIDER
+ *     1 to 4.  Source / divider must be 6 MHz to 12 MHz.
+ *   BOARD_PLLn_MULTIPLIER
+ *     53 to 180.  Input x (multiplier + fraction) is the VCO frequency,
+ *     which must be 640 MHz to 1440 MHz.
+ *   BOARD_PLLn_MULTIPLIER_FRACTION
+ *     One of the PLLnCCR PLLnMULNF codes:
+ *     R_SYSTEM_PLL[2]CCR_PLL[2]MULNF_V0_00_VALUE_AFTER_RESET (+0),
+ *     _V0_33_1_3 (+1/3), _V0_50_1_2 (+1/2) or _V0_66_2_3 (+2/3).
+ *   BOARD_PLLn_DIVIDER_P
+ *     2, 4, 6, 8 or 16.  VCO / divider must be 40 MHz to 480 MHz.
+ *   BOARD_PLLn_DIVIDER_Q, BOARD_PLLn_DIVIDER_R
+ *     2, 3, 4, 5, 6, 8 or 9.  VCO / divider must be 71 MHz to 480 MHz.
+ *
+ * Here: MOSC 20 MHz / 2 = 10 MHz, x 96 = 960 MHz VCO, and P, Q and R at
+ * 960 MHz / 2 = 480 MHz.
+ */
+
+#define BOARD_PLL1_SOURCE         0
+#define BOARD_PLL1_INPUT_DIVIDER  2
+#define BOARD_PLL1_MULTIPLIER     96
+#define BOARD_PLL1_MULTIPLIER_FRACTION \
+  R_SYSTEM_PLLCCR_PLLMULNF_V0_00_VALUE_AFTER_RESET
+#define BOARD_PLL1_DIVIDER_P      2
+#define BOARD_PLL1_DIVIDER_Q      2
+#define BOARD_PLL1_DIVIDER_R      2
+
+#define BOARD_PLL2_SOURCE         0
+#define BOARD_PLL2_INPUT_DIVIDER  2
+#define BOARD_PLL2_MULTIPLIER     96
+#define BOARD_PLL2_MULTIPLIER_FRACTION \
+  R_SYSTEM_PLL2CCR_PLL2MULNF_V0_00_VALUE_AFTER_RESET
+#define BOARD_PLL2_DIVIDER_P      2
+#define BOARD_PLL2_DIVIDER_Q      2
+#define BOARD_PLL2_DIVIDER_R      2
+
+/* System clock dividers
+ *
+ * Each clock is the system clock divided by 1, 2, 3, 4, 6, 8, 12, 16, 32
+ * or 64.  Dividers of 3, 6 and 12 can not be mixed with 2, 4, 8, 16, 32
+ * and 64 across these nine options.  The limits, and the ratio rules that
+ * are checked at build time:
+ *
+ *   Option                Clock                              Maximum
+ *   --------------------  ---------------------------------  -------
+ *   BOARD_CPUCLK_DIVIDER  CPU clock (also SysTick)           480 MHz
+ *   BOARD_ICLK_DIVIDER    System clock (bus, flash cache)    240 MHz
+ *   BOARD_PCLKA_DIVIDER   Peripheral clock A (SPI, GPT, ..)  120 MHz
+ *   BOARD_PCLKB_DIVIDER   Peripheral clock B (WDT, ..)        60 MHz
+ *   BOARD_PCLKC_DIVIDER   Peripheral clock C (ADC12)          60 MHz
+ *   BOARD_PCLKD_DIVIDER   Peripheral clock D (GPT count)     120 MHz
+ *   BOARD_PCLKE_DIVIDER   Peripheral clock E                 240 MHz
+ *   BOARD_FCLK_DIVIDER    Flash interface clock (>=4 MHz)     60 MHz
+ *   BOARD_BCLK_DIVIDER    External bus clock                 120 MHz
+ *
+ * CPUCLK:ICLK and ICLK:PCLKA/PCLKB/FCLK/BCLK must be integer ratios, PCLKA
+ * must not be slower than PCLKB and PCLKD not slower than PCLKA.  If the
+ * system clock is the PLL and CPUCLK is above what the package allows at
+ * the moment of the switch (240 MHz for the BGA package) the start-up code
+ * switches with a slower CPU divider first and raises CPUCLK afterwards.
+ *
+ * Here: CPUCLK 480 MHz, ICLK 240 MHz, PCLKA 120 MHz, PCLKB 60 MHz,
+ * PCLKC 60 MHz, PCLKD 120 MHz, PCLKE 240 MHz, FCLK 60 MHz, BCLK 120 MHz.
+ */
+
+#define BOARD_CPUCLK_DIVIDER      1
+#define BOARD_ICLK_DIVIDER        2
+#define BOARD_PCLKA_DIVIDER       4
+#define BOARD_PCLKB_DIVIDER       8
+#define BOARD_PCLKC_DIVIDER       8
+#define BOARD_PCLKD_DIVIDER       4
+#define BOARD_PCLKE_DIVIDER       2
+#define BOARD_FCLK_DIVIDER        8
+#define BOARD_BCLK_DIVIDER        4
+
+/* SCI clock (SCICLK)
+ *
+ * The baud rate generator of every SCI runs from SCICLK, which is
+ * configured whenever an SCI UART is enabled (CONFIG_RA_SCIn_UART); these
+ * two options are only needed then.  SCICLK does not depend on PCLKA.
+ *
+ *   BOARD_SCICLK_SOURCE
+ *     RA_SCICLK_SRC_MOCO, _HOCO, _MOSC, _PLL1P, _PLL1Q, _PLL1R, _PLL2P,
+ *     _PLL2Q or _PLL2R (arch/arm/src/ra8m1/ra_clockconfig.h).  Unlike the
+ *     sources above, SCICKCR.SCICKSEL has no per-value name generated
+ *     from the SVD, so this one selector is defined by ra_clockconfig.h
+ *     itself rather than reusing a hardware register header.  The PLL
+ *     chosen is started if it is not already.
+ *   BOARD_SCICLK_DIVIDER
+ *     1, 2, 3, 4, 5, 6 or 8.  SCICLK must be at most 120 MHz.
+ *
+ * Here: PLL1Q (480 MHz) / 4 = 120 MHz, which gives 115200 baud with 0.16 %
+ * error.  The MOCO (8 MHz) would give 3.5 % error.
+ */
+
+#define BOARD_SCICLK_SOURCE       RA_SCICLK_SRC_PLL1Q
+#define BOARD_SCICLK_DIVIDER      4
+
+/* Option bytes *************************************************************/
+
+/* The option-setting memory is flash that the MCU reads at reset, before
+ * any code runs.  ra_option_setting.c programs it with the image from the
+ * options below (flash the image as ELF, HEX or SREC, not as a raw binary:
+ * these words sit far above the code flash).  This is a flat image, so the
+ * secure registers are used: OFS0 (0x0300_A100), OFS2 (0x0300_A104) and
+ * OFS1 (0x0300_A200).  Options are 0 (off) or 1 (on) unless stated.
+ *
+ * OFS0: watchdogs
+ *
+ *   BOARD_OFS0_IWDT_AUTOSTART, BOARD_OFS0_WDT_AUTOSTART
+ *     1 starts the independent watchdog (IWDT) or the watchdog (WDT)
+ *     counting right after reset with the options below.  Nothing
+ *     refreshes them yet on RA8M1 (there is no NuttX watchdog driver), so
+ *     leave them 0 unless other code does; otherwise the MCU resets over
+ *     and over.  With 0 the options below are not needed.
+ *   BOARD_OFS0_IWDT_TIMEOUT, BOARD_OFS0_WDT_TIMEOUT
+ *     Cycles of the divided clock before the counter underflows.
+ *     IWDT: 128, 512, 1024 or 2048.  WDT: 1024, 4096, 8192 or 16384.
+ *   BOARD_OFS0_IWDT_CLKDIV, BOARD_OFS0_WDT_CLKDIV
+ *     Division ratio of the counter clock.  IWDT (IWDTCLK divided by):
+ *     1, 16, 32, 64, 128 or 256.  WDT (PCLKB divided by): 4, 64, 128,
+ *     512, 2048 or 8192.
+ *   BOARD_OFS0_IWDT_WINDOW_END, BOARD_OFS0_WDT_WINDOW_END
+ *     Where the refresh window ends, in percent of the counter: 75, 50, 25
+ *     or 0 (no window end).  It has to be smaller than the window start.
+ *   BOARD_OFS0_IWDT_WINDOW_START, BOARD_OFS0_WDT_WINDOW_START
+ *     Where the refresh window starts: 25, 50, 75 or 100 (no window
+ *     start).  The counter starts at 100 % and underflows at 0 %.
+ *   BOARD_OFS0_IWDT_RESET, BOARD_OFS0_WDT_RESET
+ *     1: an underflow or refresh error resets the MCU.  0: it raises an
+ *     interrupt request instead.
+ *   BOARD_OFS0_IWDT_STOP_IN_SLEEP, BOARD_OFS0_WDT_STOP_IN_SLEEP
+ *     1: stop counting in the low power modes (IWDT: Sleep, Deep Sleep,
+ *     Software Standby, Deep Software Standby; WDT: Sleep and Deep Sleep).
+ */
+
+#define BOARD_OFS0_IWDT_AUTOSTART     0
+#define BOARD_OFS0_IWDT_TIMEOUT       2048
+#define BOARD_OFS0_IWDT_CLKDIV        128
+#define BOARD_OFS0_IWDT_WINDOW_END    0
+#define BOARD_OFS0_IWDT_WINDOW_START  100
+#define BOARD_OFS0_IWDT_RESET         1
+#define BOARD_OFS0_IWDT_STOP_IN_SLEEP 1
+
+#define BOARD_OFS0_WDT_AUTOSTART      0
+#define BOARD_OFS0_WDT_TIMEOUT        16384
+#define BOARD_OFS0_WDT_CLKDIV         128
+#define BOARD_OFS0_WDT_WINDOW_END     0
+#define BOARD_OFS0_WDT_WINDOW_START   100
+#define BOARD_OFS0_WDT_RESET          1
+#define BOARD_OFS0_WDT_STOP_IN_SLEEP  1
+
+/* OFS1: voltage detection, HOCO, debug and ECC
+ *
+ *   BOARD_OFS1_VDSEL_MV
+ *     Voltage detection 0 level (PVD0) in millivolts: 2850, 2580, 2150,
+ *     2000, 1900, 1800, 1700 or 1600.  1600 is prohibited when the VBATT
+ *     function is enabled, both BOARD_OFS1_LVD0_RESET and
+ *     BOARD_OFS1_PVD0_LOWPOWER are 0, and Deep Software Standby mode 1 or
+ *     2 is used.
+ *   BOARD_OFS1_LVD0_RESET
+ *     1: hold the MCU in reset while VCC is below the level above,
+ *     starting right after reset.
+ *   BOARD_OFS1_PVD0_LOWPOWER
+ *     1: PVD0 draws less current in Deep Software Standby mode 1 and 2,
+ *     with a slower response.
+ *   BOARD_OFS1_HOCO_START
+ *     1: the HOCO starts oscillating before the CPU runs, shortening the
+ *     wait for it to stabilize.  The system clock is not switched to it by
+ *     this.  Required when the Flexible Software Boot Loader (FSBL) runs.
+ *     The HOCO frequency is BOARD_HOCO_FREQUENCY above.
+ *   BOARD_OFS1_SWDBG
+ *     1: the MCU follows DBGAUTH0/DBGAUTH1, and the IWDT and WDT stop
+ *     automatically while the CPU is in the debug state.
+ *   BOARD_OFS1_INITECC
+ *     1: the ECC function of the TCM and the cache is on at start-up.
+ *     Changing it from 1 to 0 needs a power-on reset to take effect.
+ *
+ * OFS2: DCDC
+ *
+ *   BOARD_OFS2_DCDC
+ *     1: enable the on-chip DCDC regulator at start-up.  Set 0 only if the
+ *     board does not fit the DCDC external components.  It also sets the
+ *     settling time after the system clock is switched to the PLL (150 us
+ *     with the DCDC, 10 us without).
+ */
+
+#define BOARD_OFS1_VDSEL_MV           1600
+#define BOARD_OFS1_LVD0_RESET         0
+#define BOARD_OFS1_PVD0_LOWPOWER      0
+#define BOARD_OFS1_HOCO_START         0
+#define BOARD_OFS1_SWDBG              0
+#define BOARD_OFS1_INITECC            0
+
+#define BOARD_OFS2_DCDC               1
+
+/* Alternate function pin selections ****************************************/
+
+/* The on-board debugger (J-Link OB) provides a virtual COM port on SCI9:
+ * RXD9 on PA15 and TXD9 on PA14 (pin group 3 of SCI9).
+ */
+
+#define GPIO_SCI9_RX   GPIO_RXD9_MISO9_SCL9_3  /* PA15 */
+#define GPIO_SCI9_TX   GPIO_TXD9_MOSI9_SDA9_3  /* PA14 */
+
+/* LED pin selections *******************************************************/
+
+/* The EK-RA8M1 has three user LEDs.  They are driven active high. */
+
+#define GPIO_LED1  (gpio_pinset_t){ PORT6, PIN0,  (GPIO_OUTPUT | 
GPIO_LOW_DRIVE | GPIO_OUTPUT_LOW) }  /* P600, blue */
+#define GPIO_LED2  (gpio_pinset_t){ PORT4, PIN14, (GPIO_OUTPUT | 
GPIO_LOW_DRIVE | GPIO_OUTPUT_LOW) }  /* P414, green */
+#define GPIO_LED3  (gpio_pinset_t){ PORT1, PIN7,  (GPIO_OUTPUT | 
GPIO_LOW_DRIVE | GPIO_OUTPUT_LOW) }  /* P107, red */
+
+#define LED_DRIVER_PATH "/dev/userleds"
+
+/* LED index values for use with board_userled() */
+
+#define BOARD_LED1        0
+#define BOARD_LED2        1
+#define BOARD_LED3        2
+#define BOARD_NLEDS       3
+
+/* LED bits for use with board_userled_all() */
+
+#define BOARD_LED1_BIT    (1 << BOARD_LED1)
+#define BOARD_LED2_BIT    (1 << BOARD_LED2)
+#define BOARD_LED3_BIT    (1 << BOARD_LED3)
+
+/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
+ * defined.  In that case the LEDs are used to encode OS-related events as
+ * follows (see ra8m1_autoleds.c):
+ *
+ *   SYMBOL                Meaning                      LED1 LED2 LED3
+ *   --------------------  ---------------------------  ---- ---- ----
+ *   LED_STARTED           NuttX has been started       OFF  OFF  OFF
+ *   LED_HEAPALLOCATE      Heap has been allocated      OFF  OFF  OFF
+ *   LED_IRQSENABLED       Interrupts enabled           OFF  OFF  OFF
+ *   LED_STACKCREATED      Idle stack created           ON   OFF  OFF
+ *   LED_INIRQ             In an interrupt              N/C  ON   N/C
+ *   LED_SIGNAL            In a signal handler          N/C  ON   N/C
+ *   LED_ASSERTION         An assertion failed          N/C  ON   N/C
+ *   LED_PANIC             The system has crashed       N/C  N/C  ON
+ */
+
+#define LED_STARTED       0
+#define LED_HEAPALLOCATE  0
+#define LED_IRQSENABLED   0
+#define LED_STACKCREATED  1
+#define LED_INIRQ         2
+#define LED_SIGNAL        2
+#define LED_ASSERTION     2
+#define LED_PANIC         3
+
+#endif /* __BOARDS_ARM_RA8M1_EK_RA8M1_INCLUDE_BOARD_H */
diff --git a/boards/arm/ra8m1/ek-ra8m1/scripts/Make.defs 
b/boards/arm/ra8m1/ek-ra8m1/scripts/Make.defs
new file mode 100644
index 00000000000..932452b0c24
--- /dev/null
+++ b/boards/arm/ra8m1/ek-ra8m1/scripts/Make.defs
@@ -0,0 +1,34 @@
+############################################################################
+# boards/arm/ra8m1/ek_ra8m1/scripts/Make.defs
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements.  See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership.  The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License.  You may obtain a copy of the License at
+#
+#   http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations
+# under the License.
+#
+############################################################################
+
+include $(TOPDIR)/.config
+include $(TOPDIR)/tools/Config.mk
+include $(TOPDIR)/arch/arm/src/armv8-m/Toolchain.defs
+
+ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)ek_ra8m1.ld
+
+CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) 
$(ARCHDEFINES) $(EXTRAFLAGS) -pipe
+CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) 
$(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
+CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
+AFLAGS := $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) 
-T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
diff --git a/boards/arm/ra8m1/ek-ra8m1/scripts/ek_ra8m1.ld 
b/boards/arm/ra8m1/ek-ra8m1/scripts/ek_ra8m1.ld
new file mode 100644
index 00000000000..f44d2dbc416
--- /dev/null
+++ b/boards/arm/ra8m1/ek-ra8m1/scripts/ek_ra8m1.ld
@@ -0,0 +1,289 @@
+/****************************************************************************
+ * boards/arm/ra8m1/ek_ra8m1/scripts/ek_ra8m1.ld
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/* EK-RA8M1 (R7FA8M1AHECFC): 2016Kb of code flash, 896Kb of SRAM, plus
+ * 64Kb ITCM, 64Kb DTCM, 12Kb data flash, and the fixed-address Option
+ * Setting Memory registers.
+ *
+ * This is a flat (no TrustZone) image: it always runs in the secure state
+ * and links against the secure aliases of every memory (User's Manual
+ * Table 4.1): code flash at 0x0200_0000, SRAM at 0x2200_0000, data flash at
+ * 0x2700_0000, ITCM at 0x0000_0000, DTCM at 0x2000_0000.  (The non-secure
+ * aliases in Table 4.2 -- 0x1200_0000, 0x3200_0000, ... -- are not used.)
+ * The origins and lengths below match Renesas's own FSP-generated linker
+ * script for this board (fsp.ld -> memory_regions.ld in the e2 studio
+ * project), which is also a flat project.
+ *
+ * Option Setting Memory: OFS0/OFS1/OFS2 (watchdog, voltage detection,
+ * HOCO, ECC, DCDC), DUALSEL/BANKSEL (dual-bank flash select), BPS/PBPS
+ * (block write protection), their _SEL security-attribution selectors,
+ * plus the data-flash FSBL/SACC/SAMR registers, all live at fixed
+ * addresses outside the normal code-flash range.  Only the secure-region
+ * instances are reserved (OFS1 is the register at 0x0300_A200, which the
+ * manual calls OFS1_SEC); the non-secure copies are not used.  This script
+ * only reserves those addresses as MEMORY regions/output sections; the
+ * register images come from const, section-tagged C objects, e.g.
+ * `__attribute__((section(".option_setting_ofs0")))` (see
+ * arch/arm/src/ra8m1/ra_option_setting.c for OFS0/OFS1/OFS2).  Getting
+ * these values wrong can affect flash bank switching, write protection or
+ * the watchdogs, so nothing else here should be populated without
+ * confirming the bit pattern against the RA8M1 User's Manual.
+ *
+ * These sections sit ~16Mb above the code flash, so the image must be
+ * flashed as ELF/HEX/SREC: a raw `objcopy -O binary` would pad that gap.
+ */
+
+MEMORY
+{
+  flash (rx)  : ORIGIN = 0x02000000, LENGTH = 2016K
+  sram (rwx)  : ORIGIN = 0x22000000, LENGTH = 896K
+  itcm (rwx)  : ORIGIN = 0x00000000, LENGTH = 64K
+  dtcm (rwx)  : ORIGIN = 0x20000000, LENGTH = 64K
+  dataflash (rx) : ORIGIN = 0x27000000, LENGTH = 12K
+
+  option_setting_ofs0                 (r) : ORIGIN = 0x0300a100, LENGTH = 4
+  option_setting_ofs2                 (r) : ORIGIN = 0x0300a104, LENGTH = 4
+  option_setting_dualsel              (r) : ORIGIN = 0x0300a110, LENGTH = 4
+  option_setting_ofs1                 (r) : ORIGIN = 0x0300a200, LENGTH = 4
+  option_setting_banksel              (r) : ORIGIN = 0x0300a210, LENGTH = 4
+  option_setting_bps                  (r) : ORIGIN = 0x0300a240, LENGTH = 16
+  option_setting_pbps                 (r) : ORIGIN = 0x0300a260, LENGTH = 16
+  option_setting_ofs1_sel             (r) : ORIGIN = 0x0300a280, LENGTH = 4
+  option_setting_banksel_sel          (r) : ORIGIN = 0x0300a290, LENGTH = 4
+  option_setting_bps_sel              (r) : ORIGIN = 0x0300a2c0, LENGTH = 16
+  option_setting_data_flash_fsblctrl0 (r) : ORIGIN = 0x27030080, LENGTH = 4
+  option_setting_data_flash_fsblctrl1 (r) : ORIGIN = 0x27030084, LENGTH = 4
+  option_setting_data_flash_fsblctrl2 (r) : ORIGIN = 0x27030088, LENGTH = 4
+  option_setting_data_flash_sacc0     (r) : ORIGIN = 0x2703008c, LENGTH = 4
+  option_setting_data_flash_sacc1     (r) : ORIGIN = 0x27030090, LENGTH = 4
+  option_setting_data_flash_samr      (r) : ORIGIN = 0x27030094, LENGTH = 4
+}
+
+OUTPUT_ARCH(arm)
+EXTERN(_vectors)
+ENTRY(_stext)
+SECTIONS
+{
+    .text :
+    {
+        _stext = .;
+        *(.vectors)
+        . = _stext + 0x400;
+        KEEP(*(.rom_registers*))
+        *(.text .text.*)
+        *(.fixup)
+        *(.gnu.warning)
+        *(.rodata .rodata.*)
+        *(.gnu.linkonce.t.*)
+        *(.glue_7)
+        *(.glue_7t)
+        *(.got)
+        *(.gcc_except_table)
+        *(.gnu.linkonce.r.*)
+        _etext = .;
+    } > flash
+
+    .init_section :
+    {
+        _sinit = .;
+        KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*) 
SORT_BY_INIT_PRIORITY(.ctors.*)))
+        KEEP(*(.init_array .ctors))
+        _einit = .;
+    } > flash
+
+    .ARM.extab :
+    {
+        *(.ARM.extab*)
+    } >flash
+
+    .ARM.exidx :
+    {
+        __exidx_start = .;
+        *(.ARM.exidx*)
+        __exidx_end = .;
+    } >flash
+
+    .data :
+    {
+        _sdata = .;
+        *(.data .data.*)
+        *(.gnu.linkonce.d.*)
+        CONSTRUCTORS
+        . = ALIGN(4);
+        _edata = .;
+    } > sram AT > flash
+
+    _eronly = LOADADDR(.data);
+
+    .ramfunc ALIGN(4):
+    {
+        _sramfuncs = .;
+        *(.ramfunc  .ramfunc.*)
+        _eramfuncs = .;
+    } > sram AT > flash
+
+    _framfuncs = LOADADDR(.ramfunc);
+
+    .bss :
+    {
+        _sbss = .;
+        *(.bss .bss.*)
+        *(.gnu.linkonce.b.*)
+        *(COMMON)
+        . = ALIGN(8);
+        _ebss = .;
+    } > sram
+
+    /* ITCM/DTCM: volatile, zero out of reset -- like .data/.ramfunc,
+     * anything placed here (via __attribute__((section(".itcm")))  or
+     * ".dtcm") must be copied in from its flash load address by startup
+     * code before use; _eitcmonly/_edtcmonly give that code its source.
+     */
+
+    .itcm ALIGN(4) :
+    {
+        _sitcm = .;
+        *(.itcm .itcm.*)
+        _eitcm = .;
+    } > itcm AT > flash
+
+    _eitcmonly = LOADADDR(.itcm);
+
+    .dtcm ALIGN(4) :
+    {
+        _sdtcm = .;
+        *(.dtcm .dtcm.*)
+        . = ALIGN(4);
+        _edtcm = .;
+    } > dtcm AT > flash
+
+    _edtcmonly = LOADADDR(.dtcm);
+
+    /* Data flash: non-volatile, read in place like any other flash --
+     * unlike .itcm/.dtcm this needs no startup copy.
+     */
+
+    .dataflash (READONLY) :
+    {
+        _sdataflash = .;
+        KEEP(*(.data_flash .data_flash.*))
+        _edataflash = .;
+    } > dataflash
+
+    /* Option Setting Memory -- see the file header comment: these
+     * placeholder sections only reserve the correct fixed hardware
+     * address for each register; they carry no content of their own.
+     */
+
+    .option_setting_ofs0 (READONLY) :
+    {
+        KEEP(*(.option_setting_ofs0))
+    } > option_setting_ofs0
+
+    .option_setting_ofs2 (READONLY) :
+    {
+        KEEP(*(.option_setting_ofs2))
+    } > option_setting_ofs2
+
+    .option_setting_dualsel (READONLY) :
+    {
+        KEEP(*(.option_setting_dualsel))
+    } > option_setting_dualsel
+
+    .option_setting_ofs1 (READONLY) :
+    {
+        KEEP(*(.option_setting_ofs1))
+    } > option_setting_ofs1
+
+    .option_setting_banksel (READONLY) :
+    {
+        KEEP(*(.option_setting_banksel))
+    } > option_setting_banksel
+
+    .option_setting_bps (READONLY) :
+    {
+        KEEP(*(.option_setting_bps))
+    } > option_setting_bps
+
+    .option_setting_pbps (READONLY) :
+    {
+        KEEP(*(.option_setting_pbps))
+    } > option_setting_pbps
+
+    .option_setting_ofs1_sel (READONLY) :
+    {
+        KEEP(*(.option_setting_ofs1_sel))
+    } > option_setting_ofs1_sel
+
+    .option_setting_banksel_sel (READONLY) :
+    {
+        KEEP(*(.option_setting_banksel_sel))
+    } > option_setting_banksel_sel
+
+    .option_setting_bps_sel (READONLY) :
+    {
+        KEEP(*(.option_setting_bps_sel))
+    } > option_setting_bps_sel
+
+    .option_setting_data_flash_fsblctrl0 (READONLY) :
+    {
+        KEEP(*(.option_setting_data_flash_fsblctrl0))
+    } > option_setting_data_flash_fsblctrl0
+
+    .option_setting_data_flash_fsblctrl1 (READONLY) :
+    {
+        KEEP(*(.option_setting_data_flash_fsblctrl1))
+    } > option_setting_data_flash_fsblctrl1
+
+    .option_setting_data_flash_fsblctrl2 (READONLY) :
+    {
+        KEEP(*(.option_setting_data_flash_fsblctrl2))
+    } > option_setting_data_flash_fsblctrl2
+
+    .option_setting_data_flash_sacc0 (READONLY) :
+    {
+        KEEP(*(.option_setting_data_flash_sacc0))
+    } > option_setting_data_flash_sacc0
+
+    .option_setting_data_flash_sacc1 (READONLY) :
+    {
+        KEEP(*(.option_setting_data_flash_sacc1))
+    } > option_setting_data_flash_sacc1
+
+    .option_setting_data_flash_samr (READONLY) :
+    {
+        KEEP(*(.option_setting_data_flash_samr))
+    } > option_setting_data_flash_samr
+
+    /* Stabs debugging sections. */
+
+    .stab 0 : { *(.stab) }
+    .stabstr 0 : { *(.stabstr) }
+    .stab.excl 0 : { *(.stab.excl) }
+    .stab.exclstr 0 : { *(.stab.exclstr) }
+    .stab.index 0 : { *(.stab.index) }
+    .stab.indexstr 0 : { *(.stab.indexstr) }
+    .comment 0 : { *(.comment) }
+    .debug_abbrev 0 : { *(.debug_abbrev) }
+    .debug_info 0 : { *(.debug_info) }
+    .debug_line 0 : { *(.debug_line) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    .debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/boards/arm/ra8m1/ek-ra8m1/src/CMakeLists.txt 
b/boards/arm/ra8m1/ek-ra8m1/src/CMakeLists.txt
new file mode 100644
index 00000000000..0a5cdac40aa
--- /dev/null
+++ b/boards/arm/ra8m1/ek-ra8m1/src/CMakeLists.txt
@@ -0,0 +1,31 @@
+# 
##############################################################################
+# boards/arm/ra8m1/ek_ra8m1/src/CMakeLists.txt
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more 
contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may 
not
+# use this file except in compliance with the License.  You may obtain a copy 
of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# 
##############################################################################
+
+set(SRCS ra8m1_boot.c ra8m1_bringup.c)
+
+if(CONFIG_ARCH_LEDS)
+  list(APPEND SRCS ra8m1_autoleds.c)
+else()
+  list(APPEND SRCS ra8m1_userleds.c)
+endif()
+
+target_sources(board PRIVATE ${SRCS})
+
+set_property(GLOBAL PROPERTY LD_SCRIPT 
"${NUTTX_BOARD_DIR}/scripts/ek_ra8m1.ld")
diff --git a/boards/arm/ra8m1/ek-ra8m1/src/Makefile 
b/boards/arm/ra8m1/ek-ra8m1/src/Makefile
new file mode 100644
index 00000000000..644424ed202
--- /dev/null
+++ b/boards/arm/ra8m1/ek-ra8m1/src/Makefile
@@ -0,0 +1,31 @@
+############################################################################
+# boards/arm/ra8m1/ek_ra8m1/src/Makefile
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements.  See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership.  The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License.  You may obtain a copy of the License at
+#
+#   http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations
+# under the License.
+#
+############################################################################
+
+include $(TOPDIR)/Make.defs
+
+CSRCS = ra8m1_boot.c ra8m1_bringup.c
+
+ifeq ($(CONFIG_ARCH_LEDS),y)
+CSRCS += ra8m1_autoleds.c
+else
+CSRCS += ra8m1_userleds.c
+endif
+
+include $(TOPDIR)/boards/Board.mk
diff --git a/boards/arm/ra8m1/ek-ra8m1/src/ek_ra8m1.h 
b/boards/arm/ra8m1/ek-ra8m1/src/ek_ra8m1.h
new file mode 100644
index 00000000000..87d673e17ff
--- /dev/null
+++ b/boards/arm/ra8m1/ek-ra8m1/src/ek_ra8m1.h
@@ -0,0 +1,55 @@
+/****************************************************************************
+ * boards/arm/ra8m1/ek-ra8m1/src/ek_ra8m1.h
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __BOARDS_ARM_RA8M1_EK_RA8M1_SRC_EK_RA8M1_H
+#define __BOARDS_ARM_RA8M1_EK_RA8M1_SRC_EK_RA8M1_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <nuttx/compiler.h>
+
+#include <stdint.h>
+
+/****************************************************************************
+ * Public Functions Definitions
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/****************************************************************************
+ * Name: ra8m1_bringup
+ *
+ * Description:
+ *   Perform board-specific initialization.
+ *
+ *   CONFIG_BOARD_LATE_INITIALIZE=y :
+ *     Called from board_late_initialize().
+ *
+ ****************************************************************************/
+
+int ra8m1_bringup(void);
+
+#endif /* __ASSEMBLY__ */
+#endif /* __BOARDS_ARM_RA8M1_EK_RA8M1_SRC_EK_RA8M1_H */
diff --git a/boards/arm/ra8m1/ek-ra8m1/src/ra8m1_autoleds.c 
b/boards/arm/ra8m1/ek-ra8m1/src/ra8m1_autoleds.c
new file mode 100644
index 00000000000..a59c9406618
--- /dev/null
+++ b/boards/arm/ra8m1/ek-ra8m1/src/ra8m1_autoleds.c
@@ -0,0 +1,124 @@
+/****************************************************************************
+ * boards/arm/ra8m1/ek-ra8m1/src/ra8m1_autoleds.c
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#include <nuttx/board.h>
+
+#include <arch/board/board.h>
+
+#include "ra_gpio.h"
+#include "ek_ra8m1.h"
+
+#ifdef CONFIG_ARCH_LEDS
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_autoled_initialize
+ ****************************************************************************/
+
+void board_autoled_initialize(void)
+{
+  /* Configure the LED GPIOs for output, initially off */
+
+  ra_configgpio(GPIO_LED1);
+  ra_configgpio(GPIO_LED2);
+  ra_configgpio(GPIO_LED3);
+}
+
+/****************************************************************************
+ * Name: board_autoled_on
+ ****************************************************************************/
+
+void board_autoled_on(int led)
+{
+  switch (led)
+    {
+      /* 0: LED_STARTED, LED_HEAPALLOCATE, LED_IRQSENABLED: all LEDs off.
+       * Since the LEDs were initially all off and since this state only
+       * occurs one time, nothing need be done.
+       */
+
+      default:
+      case 0:
+        break;
+
+      /* 1: LED_STACKCREATED: LED1 on */
+
+      case 1:
+        ra_gpiowrite(GPIO_LED1, true);
+        break;
+
+      /* 2: LED_INIRQ, LED_SIGNAL, LED_ASSERTION: LED2 on */
+
+      case 2:
+        ra_gpiowrite(GPIO_LED2, true);
+        break;
+
+      /* 3: LED_PANIC: LED3 on */
+
+      case 3:
+        ra_gpiowrite(GPIO_LED3, true);
+        break;
+    }
+}
+
+/****************************************************************************
+ * Name: board_autoled_off
+ ****************************************************************************/
+
+void board_autoled_off(int led)
+{
+  switch (led)
+    {
+      /* 0 and 1 should never happen: they are only signalled once. */
+
+      default:
+      case 0:
+      case 1:
+        break;
+
+      /* 2: LED_INIRQ, LED_SIGNAL, LED_ASSERTION: LED2 off */
+
+      case 2:
+        ra_gpiowrite(GPIO_LED2, false);
+        break;
+
+      /* 3: LED_PANIC: LED3 off */
+
+      case 3:
+        ra_gpiowrite(GPIO_LED3, false);
+        break;
+    }
+}
+
+#endif /* CONFIG_ARCH_LEDS */
diff --git a/boards/arm/ra8m1/ek-ra8m1/src/ra8m1_boot.c 
b/boards/arm/ra8m1/ek-ra8m1/src/ra8m1_boot.c
new file mode 100644
index 00000000000..b69d11b0bff
--- /dev/null
+++ b/boards/arm/ra8m1/ek-ra8m1/src/ra8m1_boot.c
@@ -0,0 +1,78 @@
+/****************************************************************************
+ * boards/arm/ra8m1/ek-ra8m1/src/ra8m1_boot.c
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <nuttx/debug.h>
+#include <nuttx/board.h>
+
+#include "ek_ra8m1.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: ra_boardinitialize
+ *
+ * Description:
+ *   All RA architectures must provide the following entry point.  This
+ *   entry point is called early in the initialization -- after all memory
+ *   has been configured and mapped but before any devices have been
+ *   initialized.
+ *
+ ****************************************************************************/
+
+void ra_boardinitialize(void)
+{
+#ifdef CONFIG_ARCH_LEDS
+  /* Configure on-board LEDs if LED support has been selected. */
+
+  board_autoled_initialize();
+#endif
+}
+
+/****************************************************************************
+ * Name: board_late_initialize
+ *
+ * Description:
+ *   If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
+ *   initialization call will be performed in the boot-up sequence to a
+ *   function called board_late_initialize(). board_late_initialize() will be
+ *   called immediately after up_initialize() is called and just before the
+ *   initial application is started.  This additional initialization phase
+ *   may be used, for example, to initialize board-specific device drivers.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_BOARD_LATE_INITIALIZE
+void board_late_initialize(void)
+{
+  /* Perform board-specific initialization */
+
+  ra8m1_bringup();
+}
+#endif
diff --git a/boards/arm/ra8m1/ek-ra8m1/src/ra8m1_bringup.c 
b/boards/arm/ra8m1/ek-ra8m1/src/ra8m1_bringup.c
new file mode 100644
index 00000000000..aa56faac05f
--- /dev/null
+++ b/boards/arm/ra8m1/ek-ra8m1/src/ra8m1_bringup.c
@@ -0,0 +1,79 @@
+/****************************************************************************
+ * boards/arm/ra8m1/ek-ra8m1/src/ra8m1_bringup.c
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdio.h>
+#include <syslog.h>
+
+#include <nuttx/board.h>
+#include <nuttx/fs/fs.h>
+#include <nuttx/leds/userled.h>
+
+#include <arch/board/board.h>
+
+#include "ek_ra8m1.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#undef HAVE_LEDS
+
+#if !defined(CONFIG_ARCH_LEDS) && defined(CONFIG_USERLED_LOWER)
+#  define HAVE_LEDS 1
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: ra8m1_bringup
+ *
+ * Description:
+ *   Perform board-specific initialization.
+ *
+ ****************************************************************************/
+
+int ra8m1_bringup(void)
+{
+  int ret = OK;
+
+#ifdef HAVE_LEDS
+  board_userled_initialize();
+
+  /* Register the LED driver */
+
+  ret = userled_lower_initialize(LED_DRIVER_PATH);
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: userled_lower_initialize() failed: %d\n", ret);
+    }
+#endif
+
+  return ret;
+}
diff --git a/boards/arm/ra8m1/ek-ra8m1/src/ra8m1_userleds.c 
b/boards/arm/ra8m1/ek-ra8m1/src/ra8m1_userleds.c
new file mode 100644
index 00000000000..45b04547145
--- /dev/null
+++ b/boards/arm/ra8m1/ek-ra8m1/src/ra8m1_userleds.c
@@ -0,0 +1,98 @@
+/****************************************************************************
+ * boards/arm/ra8m1/ek-ra8m1/src/ra8m1_userleds.c
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#include <nuttx/board.h>
+
+#include <arch/board/board.h>
+
+#include "ra_gpio.h"
+#include "ek_ra8m1.h"
+
+#ifndef CONFIG_ARCH_LEDS
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const gpio_pinset_t g_ledcfg[BOARD_NLEDS] =
+{
+  GPIO_LED1, GPIO_LED2, GPIO_LED3
+};
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_userled_initialize
+ ****************************************************************************/
+
+uint32_t board_userled_initialize(void)
+{
+  int i;
+
+  /* Configure the LED GPIOs for output, initially off */
+
+  for (i = 0; i < BOARD_NLEDS; i++)
+    {
+      ra_configgpio(g_ledcfg[i]);
+    }
+
+  return BOARD_NLEDS;
+}
+
+/****************************************************************************
+ * Name: board_userled
+ ****************************************************************************/
+
+void board_userled(int led, bool ledon)
+{
+  if ((unsigned int)led < BOARD_NLEDS)
+    {
+      ra_gpiowrite(g_ledcfg[led], ledon);
+    }
+}
+
+/****************************************************************************
+ * Name: board_userled_all
+ ****************************************************************************/
+
+void board_userled_all(uint32_t ledset)
+{
+  int i;
+
+  for (i = 0; i < BOARD_NLEDS; i++)
+    {
+      ra_gpiowrite(g_ledcfg[i], (ledset & (1 << i)) != 0);
+    }
+}
+
+#endif /* !CONFIG_ARCH_LEDS */

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