jlaitine commented on code in PR #20430:
URL: https://github.com/apache/nuttx/pull/20430#discussion_r4158142666
##########
arch/arm/src/armv7-m/arm_vectors.c:
##########
@@ -58,12 +58,62 @@
extern void __start(void);
+#if defined(CONFIG_ARMV7M_ITCM_ECC) || defined(CONFIG_ARMV7M_DTCM_ECC)
+static void start(void) __attribute__((naked, no_instrument_function));
+#endif
+
static void start(void)
{
/* Zero lr to mark the end of backtrace */
+#if defined(CONFIG_ARMV7M_ITCM_ECC) || defined(CONFIG_ARMV7M_DTCM_ECC)
+ /* Run without a stack until TCM ECC is initialized. */
+
+ __asm__ __volatile__(
+ "cpsid i\n\t"
+ "mov lr, #0\n\t"
+ "movs r0, #7\n\t" /* EN | RMW | RETEN */
+#ifdef CONFIG_ARMV7M_ITCM_ECC
+ "ldr r3, =0xe000ef90\n\t" /* ITCMCR */
+ "str r0, [r3]\n\t"
Review Comment:
ECC is enabled by default, so then it should be disabled first; i didn't
check if that is possible. Also smaller than 64 bit writes seem to trigger ecc
fault ( perhaps it does 64 bit rmw internally and the initial 64-bit read fails
already?), so initializing .data / zeroing .bss with 32 bit writes fault if ecc
is not initialized. Full zero-initialize with 64-bit writes initially seemed
simplest and it is quick operation (about half ms). The zero initialization is
actually what the nxp's MCUXpresso SDK does as well, so I followed that pattern.
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