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The following commit(s) were added to refs/heads/master by this push:
new 447ebd7fd55 arch/arm/src/imxrt: Start the DWT cycle counter for perf
events.
447ebd7fd55 is described below
commit 447ebd7fd55326fff89e82022f7f8ba42efc4f4e
Author: Lourens Naude <[email protected]>
AuthorDate: Thu Oct 8 17:26:26 2026 +0100
arch/arm/src/imxrt: Start the DWT cycle counter for perf events.
CONFIG_ARCH_PERF_EVENTS is on by default for ARMv7-M, but imxrt never
called up_perf_init(), so perf_gettime() read zero and anything timed
with it, rpmsg_ping for one, reported 0 ns. Initialise the counter with
BOARD_CPU_FREQUENCY after the MPU is set up, as samv7 and stm32h7 do.
Assisted-by: Claude:claude-fable-5-1
Signed-off-by: Lourens Naude <[email protected]>
---
arch/arm/src/imxrt/imxrt_start.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/src/imxrt/imxrt_start.c b/arch/arm/src/imxrt/imxrt_start.c
index 02b807aa7ad..808bd549443 100644
--- a/arch/arm/src/imxrt/imxrt_start.c
+++ b/arch/arm/src/imxrt/imxrt_start.c
@@ -282,6 +282,10 @@ void __start(void)
imxrt_mpu_initialize();
#endif
+#ifdef CONFIG_ARCH_PERF_EVENTS
+ up_perf_init((void *)BOARD_CPU_FREQUENCY);
+#endif
+
/* Enable I- and D-Caches */
up_enable_icache();
