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The following commit(s) were added to refs/heads/master by this push:
new d2ce23c49eb arch/arm64: Let EL0 read CTR_EL0 and maintain the caches
by VA.
d2ce23c49eb is described below
commit d2ce23c49ebfdd9f5ed541a08493eb62c1aa20a5
Author: Marco Casaroli <[email protected]>
AuthorDate: Mon Oct 12 01:41:59 2026 +0200
arch/arm64: Let EL0 read CTR_EL0 and maintain the caches by VA.
User code could not read CTR_EL0, use DC ZVA, or clean and invalidate
the caches by virtual address: each of these trapped and the task was
killed. Programs read CTR_EL0 to find the cache line sizes, and must
clean the D-cache and invalidate the I-cache after they write code.
Set SCTLR_EL1.UCT, DZE and UCI, as other operating systems do. The
instructions still check the access permissions of the address.
Assisted-by: Claude Code:claude-opus-5-5
Signed-off-by: Marco Casaroli <[email protected]>
---
arch/arm64/src/common/arm64_arch.h | 3 +++
arch/arm64/src/common/arm64_boot.c | 3 +++
2 files changed, 6 insertions(+)
diff --git a/arch/arm64/src/common/arm64_arch.h
b/arch/arm64/src/common/arm64_arch.h
index 9ec953800a2..e83729e7c04 100644
--- a/arch/arm64/src/common/arm64_arch.h
+++ b/arch/arm64/src/common/arm64_arch.h
@@ -97,7 +97,10 @@
#define SCTLR_C_BIT BIT(2)
#define SCTLR_SA_BIT BIT(3)
#define SCTLR_I_BIT BIT(12)
+#define SCTLR_DZE_BIT BIT(14)
+#define SCTLR_UCT_BIT BIT(15)
#define SCTLR_BR_BIT BIT(17)
+#define SCTLR_UCI_BIT BIT(26)
/* Controls the impact of tag check faults
* due to loads and stores in EL0 EL1.
diff --git a/arch/arm64/src/common/arm64_boot.c
b/arch/arm64/src/common/arm64_boot.c
index 790bc8b71ea..1dfacf867d4 100644
--- a/arch/arm64/src/common/arm64_boot.c
+++ b/arch/arm64/src/common/arm64_boot.c
@@ -220,6 +220,9 @@ void arm64_boot_el1_init(void)
#ifndef CONFIG_ARM64_ICACHE_DISABLE
SCTLR_I_BIT | /* Enable i-cache */
#endif
+ SCTLR_DZE_BIT | /* EL0 may use DC ZVA */
+ SCTLR_UCT_BIT | /* EL0 may read CTR_EL0 */
+ SCTLR_UCI_BIT | /* EL0 may clean and invalidate by VA */
SCTLR_SA_BIT); /* Enable SP alignment check */
write_sysreg(reg, sctlr_el1);
