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commit 46c67a7b40418dcbe0d56b06061ee8245648943f Author: Marco Casaroli <[email protected]> AuthorDate: Sat Oct 17 20:22:42 2026 +0200 Documentation/qemu-armv8a: Describe the PL031 RTC. qemu-armv8a can register the PL031 RTC of the QEMU virt machine, with the new options QEMU_RTC_PL031_BASE, QEMU_RTC_PL031_IRQ and QEMU_RTC_PL031_SYNC. The board page did not describe it. Add the PL031 to the device list and the feature table, and add an RTC section with the options to enable and what they do. Assisted-by: Claude Code:claude-opus-5-5 Signed-off-by: Marco Casaroli <[email protected]> --- .../platforms/arm64/qemu/boards/qemu-armv8a/index.rst | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/Documentation/platforms/arm64/qemu/boards/qemu-armv8a/index.rst b/Documentation/platforms/arm64/qemu/boards/qemu-armv8a/index.rst index 675a02bb5f5..8da7d5f60df 100644 --- a/Documentation/platforms/arm64/qemu/boards/qemu-armv8a/index.rst +++ b/Documentation/platforms/arm64/qemu/boards/qemu-armv8a/index.rst @@ -10,6 +10,7 @@ hardware platform and provides support for these devices: * GICv2 and GICv3 interrupt controllers * ARM Generic Timer * PL011 UART controller +* PL031 RTC (optional) Getting Started =============== @@ -731,12 +732,30 @@ Interface Controller Driver/Component GIC on-chip interrupt controller PL011 UART on-chip serial port ARM TIMER on-chip system clock +PL031 RTC on-chip RTC (optional) ============== ============ ====================== The kernel currently does not support other hardware features on this QEMU platform. +RTC +=== + +The QEMU ``virt`` machine has a PL031 RTC at ``0x09010000`` (SPI 2), which +QEMU sets from the host clock. Without it, the system time starts at +``CONFIG_START_YEAR``, and the files on a host share (v9fs, hostfs) seem to +be from the future. Enable ``CONFIG_RTC``, ``CONFIG_RTC_DATETIME``, +``CONFIG_RTC_DRIVER``, ``CONFIG_RTC_ARCH`` and ``CONFIG_RTC_PL031``. Then +``up_rtc_initialize()`` registers the PL031 as the RTC of the system and as +``/dev/rtc0``, and the system time starts at the host time. +``CONFIG_QEMU_RTC_PL031_BASE`` and ``CONFIG_QEMU_RTC_PL031_IRQ`` give the +address and the interrupt. + +The PL031 counts whole seconds, so the system time can start up to one +second behind the host. With ``CONFIG_QEMU_RTC_PL031_SYNC``, the boot waits +(up to one second) for the RTC second to change. + Debugging with QEMU ===================
