This is an automated email from the ASF dual-hosted git repository.
xiaoxiang781216 pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git
The following commit(s) were added to refs/heads/master by this push:
new f9e367e154a arch/arm/ra8m1: advertise ARMv8-M cache support
f9e367e154a is described below
commit f9e367e154a6b308c4e18190bfee5525dae295af
Author: chao an <[email protected]>
AuthorDate: Tue Oct 20 14:57:21 2026 +0800
arch/arm/ra8m1: advertise ARMv8-M cache support
RA8M1 is based on the Cortex-M85 core and the chip header already defines
the
ARMv8-M instruction and data cache line sizes used by the cache maintenance
helpers. However, the RA8M1 family Kconfig did not advertise the generic
ARMv8-M cache capabilities, so the common ARMv8-M I-Cache and D-Cache
options
were not naturally exposed for this target.
Select ARMV8M_HAVE_ICACHE and ARMV8M_HAVE_DCACHE from RA8M1_FAMILY to make
the
existing ARMv8-M cache configuration options available to RA8M1 boards.
This
keeps the chip capability declaration aligned with the existing RA8M1 cache
line size definitions and the generic ARMv8-M cache implementation.
Signed-off-by: chao an <[email protected]>
---
arch/arm/src/ra8m1/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/src/ra8m1/Kconfig b/arch/arm/src/ra8m1/Kconfig
index 613e52366b6..8eca775cfa4 100644
--- a/arch/arm/src/ra8m1/Kconfig
+++ b/arch/arm/src/ra8m1/Kconfig
@@ -276,6 +276,8 @@ config RA8M1_FAMILY
bool
default n
select ARCH_CORTEXM85
+ select ARMV8M_HAVE_DCACHE
+ select ARMV8M_HAVE_ICACHE
menu "RA8M1 Peripheral Support"