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The following commit(s) were added to refs/heads/master by this push:
new 7043a1b475c armv8-m: limit FPSCR LTPSIZE reset to MVE builds
7043a1b475c is described below
commit 7043a1b475c1dd574249ede874dcc40fd52ea47e
Author: chao an <[email protected]>
AuthorDate: Tue Oct 20 16:20:31 2026 +0800
armv8-m: limit FPSCR LTPSIZE reset to MVE builds
FPSCR.LTPSIZE is an MVE tail-predication field. Resetting it on every
ARMv8-M FPU exception path is only needed when MVE support is enabled.
Limit the reset to CONFIG_ARM_HAVE_MVE so FPU-only ARMv8-M builds avoid
the extra FPSCR write, while MVE builds keep the required
tail-predication state handling.
Signed-off-by: chao an <[email protected]>
---
arch/arm/src/armv8-m/arm_doirq.c | 2 +-
arch/arm/src/armv8-m/arm_exception.S | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/src/armv8-m/arm_doirq.c b/arch/arm/src/armv8-m/arm_doirq.c
index e5ca07a4438..22c011e3fa5 100644
--- a/arch/arm/src/armv8-m/arm_doirq.c
+++ b/arch/arm/src/armv8-m/arm_doirq.c
@@ -48,7 +48,7 @@ void exception_direct(void)
{
int irq = getipsr();
-#ifdef CONFIG_ARCH_FPU
+#if defined(CONFIG_ARCH_FPU) && defined(CONFIG_ARM_HAVE_MVE)
__asm__ __volatile__
(
"mov r0, %0\n"
diff --git a/arch/arm/src/armv8-m/arm_exception.S
b/arch/arm/src/armv8-m/arm_exception.S
index 8c3f27193f6..bd5a40b1882 100644
--- a/arch/arm/src/armv8-m/arm_exception.S
+++ b/arch/arm/src/armv8-m/arm_exception.S
@@ -169,12 +169,14 @@ exception_common:
vstmdbeq r1!, {s16-s31} /* Save the
non-volatile FP context */
subne r1, #(4*SW_FPU_REGS)
+#ifdef CONFIG_ARM_HAVE_MVE
/* the FPSCR[18:16] LTPSIZE field must be set to 0b100 for
* "Tail predication not applied" as it's reset value.
*/
mov r0, #ARMV8M_FPSCR_LTPSIZE_NONE
vmsr fpscr, r0
+#endif
#endif
stmdb r1!, {r2-r12,r14} /* Save the remaining
registers plus the SP/PRIMASK values */
