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xiaoxiang781216 pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git


The following commit(s) were added to refs/heads/master by this push:
     new 879ad9c59e3 arch/arm/src/imx9: Handle MU general purpose interrupts 
without RFP.
879ad9c59e3 is described below

commit 879ad9c59e3239a51520de8f53c1d492d26148ee
Author: Phil-Engljaehringer <[email protected]>
AuthorDate: Wed Oct 21 18:14:08 2026 +0200

    arch/arm/src/imx9: Handle MU general purpose interrupts without RFP.
    
    imx9_mu_interrupt() only checked the GSR pending bits inside the
    SR.RFP (receive full pending) branch. A general purpose interrupt
    that is not accompanied by a receive register write, for example an
    SCMI P2A notification doorbell from the i.MX95 System Manager, was
    therefore never acknowledged nor passed to the subscribed callback.
    With the bit enabled in GIER the interrupt stays asserted and fires
    again immediately, so the core is stuck in the handler.
    
    Check GSR on every interrupt, masked with GIER, so only subscribed
    general purpose interrupts are acknowledged and reported.
    
    Also fix the existing nxstyle errors in the file (indentation of the
    MU7/MU8 checks in imx9_mu_init(), braces for the busy-wait loop in
    imx9_mu_send_msg()).
    
    Assisted-by: GitHub-Copilot:claude-opus-5.5
    Signed-off-by: Phil-Engljaehringer <[email protected]>
---
 arch/arm/src/imx9/imx9_mu.c | 27 ++++++++++++++++-----------
 1 file changed, 16 insertions(+), 11 deletions(-)

diff --git a/arch/arm/src/imx9/imx9_mu.c b/arch/arm/src/imx9/imx9_mu.c
index 21b741ee5bb..a7cb91c5b7b 100644
--- a/arch/arm/src/imx9/imx9_mu.c
+++ b/arch/arm/src/imx9/imx9_mu.c
@@ -130,17 +130,21 @@ static int imx9_mu_interrupt(int irq, void *context, void 
*args)
                 }
             }
         }
+    }
+
+  /* GPI doorbells are independent of RFP */
+
+  gsr &= getreg32(IMX9_MU_GIER(dev->mubase));
 
-      for (int i = 0; i < NR_OF_GPI; i++)
+  for (int i = 0; i < NR_OF_GPI; i++)
+    {
+      if (gsr & (1 << i))
         {
-          if (gsr & (1 << i))
-            {
-              putreg32((1 << i), IMX9_MU_GSR(dev->mubase));
+          putreg32((1 << i), IMX9_MU_GSR(dev->mubase));
 
-              if (dev->gpi_callback)
-                {
-                  dev->gpi_callback(i, dev);
-                }
+          if (dev->gpi_callback)
+            {
+              dev->gpi_callback(i, dev);
             }
         }
     }
@@ -190,7 +194,7 @@ struct imx9_mudev_s *imx9_mu_init(int index)
   else
 #endif
 #ifdef CONFIG_IMX9_MU7
-      if ((index == 7))
+  if ((index == 7))
     {
       priv = &g_mu7_dev;
     }
@@ -198,7 +202,7 @@ struct imx9_mudev_s *imx9_mu_init(int index)
   else
 #endif
 #ifdef CONFIG_IMX9_MU8
-      if ((index == 8))
+  if ((index == 8))
     {
       priv = &g_mu8_dev;
     }
@@ -265,7 +269,8 @@ void imx9_mu_send_msg(struct imx9_mudev_s *priv, uint32_t 
reg_index,
   /* Wait TX register to be empty. */
 
   while ((getreg32(IMX9_MU_TSR(priv->mubase)) & (1UL << reg_index)) == 0UL)
-    ;
+    {
+    }
 
   putreg32(msg, IMX9_MU_TR1(priv->mubase) + (reg_index * sizeof(uint32_t)));
 }

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