nttedt-miyawaki commented on issue #20881: URL: https://github.com/apache/nuttx/issues/20881#issuecomment-6405700103
Follow-up: we have asked NXP about one part of the observations that the fix does not explain. https://community.nxp.com/t5/i-MX-Processors/i-MX-RT1176-eDMA-CR-HALT-set-by-Halt-On-Error-clears-without-any/m-p/2423527#M247134 With CONFIG_IMXRT_EDMA_HOE=y, CR read in the error interrupt showed HALT set (0x432), but CR read later from thread context showed HALT clear (0x412). In NuttX, CR is written only in arm_dma_initialize(), and the error handler does not write CR[HALT] = 0. The Reference Manual says the eDMA ignores all service requests until software writes 0 to HALT, so we do not know what cleared it. This matters because the time until HALT is cleared appears to set how long the other eDMA users (LPSPI, LPI2C, LPUART) stop: in the delayed pairs, the interruption matched the gap between the two errors (up to about 270 ms). The merged fix removes the zero-iteration TCD that caused these errors, but any other eDMA error with HOE enabled may stall the shared eDMA in the same way. We will post NXP's answer here when we have it. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
