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commit 0c9e8f2b832fa26257641ccb80b1c514dbb4b897 Author: Kerogit <[email protected]> AuthorDate: Wed Feb 18 12:50:26 2026 +0100 arch/avr/src/avrdx: provide zero latency interrupts option This patch provides Zero Latency interrupt option as described in the High Performance: Zero Latency Interrupts guide. When configured, it enables the user to select interrupt vectors which will not be handled by the common interrupt service routine. Instead, the user (or board/driver/etc.) is responsible for providing the ISR. The change was tested by rudimentary application driving WS2812 programmable LED using UART interface. Signed-off-by: Kerogit <[email protected]> --- .../guides/concurrency/zerolatencyinterrupts.rst | 42 ++ arch/avr/src/avrdx/Kconfig | 29 ++ arch/avr/src/avrdx/Kconfig-hpintr | 434 +++++++++++++++++++++ arch/avr/src/avrdx/avrdx_exceptions.S | 318 +++++++++++++++ 4 files changed, 823 insertions(+) diff --git a/Documentation/guides/concurrency/zerolatencyinterrupts.rst b/Documentation/guides/concurrency/zerolatencyinterrupts.rst index 2a5f14e70c2..7cacc2caa44 100644 --- a/Documentation/guides/concurrency/zerolatencyinterrupts.rst +++ b/Documentation/guides/concurrency/zerolatencyinterrupts.rst @@ -307,3 +307,45 @@ You can find an example that tests the high priority, nested interrupts in the N * ``nuttx/boards/arm/stm32f1/viewtool-stm32f107/src/stm32_highpri`` Test driver. +AVR DA/DB implementation +======================== + +Implementation of high priority interrupts allows the user to bypass the generic +interrupt handling. There is, however, no mechanism described in the "Getting Back +into the Game" section. + +This AVR family only has one interrupt vector that can be declared as high-priority. +Nevertheless, you can disable the generic handler for multiple vectors - they will +execute with regular priority though. + +AVR DA/DB Configuration Options +------------------------------- + +High priority interrupts are enabled in +:menuselection:`System type --> Enable high priority interrupts` + +Enabling this option allows fine-grained selection of interrupt handlers +which should have their default implementation disabled. + +Interrupt handlers that relate to hardware controlled by drivers must +not be overridden this way. + +Non-default interrupt handling +------------------------------ + +With GCC, interrupt handler is defined using the following code: + +.. code:: c + + void __vector_avrdx_usart2_dre (void) \ + __attribute__ ((__signal__,__used__, __externally_visible__)); + void __vector_avrdx_usart2_dre (void) + { + /* your implementation */ + } + +The compiled code will preserve contents of all registers (not just call-preserved ones +like in regular functions) and return using ``reti`` (return from interrupt) instruction. + +The function name always corresponds to interrupt name as specified in datasheet +for the chip in question. diff --git a/arch/avr/src/avrdx/Kconfig b/arch/avr/src/avrdx/Kconfig index 931f68e75ff..e4f7756d969 100644 --- a/arch/avr/src/avrdx/Kconfig +++ b/arch/avr/src/avrdx/Kconfig @@ -642,4 +642,33 @@ config AVRDX_ARCH_UDELAY_NO_OSC32K Say Y if your board does not use 32.768kHz clock. +menuconfig AVRDX_HIGH_PRIO_INTERRUPTS + bool "Enable high priority interrupts" + default n + ---help--- + Enabling this option unlocks fine grained selection of interrupt handlers + to be excluded from generic interrupt handling. Instead, your application/board + code will provide handler suited to your specific needs. + + Generic interrupt handling always saves context of the process that was interrupted + and then calls into the operating system common code which takes care of driver + code invocation, scheduling etc. This takes time which may not be desirable + for interrupts that execute often or need to have strict response times. + + However, since (if) your implementation does not do that, your interrupt handler + must not communicate with the operating system. It is also not possible to disable + generic interrupt handling for interrupt vectors used by enabled drivers. + + More comprehensive information can be found in Documentation, in the guide article + named High Performance: Zero Latency Interrupts, Maskable Nested Interrupts. + + Interrupt handlers to be excluded from generic interrupt handling are specified + by "Peripheral source" codes from the datasheet. + +if AVRDX_HIGH_PRIO_INTERRUPTS + +source "arch/avr/src/avrdx/Kconfig-hpintr" + +endif # AVRDX_HIGH_PRIO_INTERRUPTS + endif # if ARCH_CHIP_AVRDX diff --git a/arch/avr/src/avrdx/Kconfig-hpintr b/arch/avr/src/avrdx/Kconfig-hpintr new file mode 100644 index 00000000000..bc4c94b0167 --- /dev/null +++ b/arch/avr/src/avrdx/Kconfig-hpintr @@ -0,0 +1,434 @@ +config AVRDX_HIGH_PRIO_BOD_VLM + bool "BOD_VLM" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_RTC_PIT + bool "RTC_PIT" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_CCL_CCL + bool "CCL_CCL" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_PORTA_PORT + bool "PORTA_PORT" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + + Note that since it is impossible to determine which I/O ports + are used by board code for input drivers (e.g. button), + no mutual exclusion is in place for this configuration option + with regards to drivers. Caution is advised. + +config AVRDX_HIGH_PRIO_TCA0_OVF + bool "TCA0_OVF" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_TCA0_HUNF + bool "TCA0_HUNF" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_TCA0_CMP0 + bool "TCA0_CMP0" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_TCA0_CMP1 + bool "TCA0_CMP1" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_TCA0_CMP2 + bool "TCA0_CMP2" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_TCB0_INT + bool "TCB0_INT" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_TCB1_INT + bool "TCB1_INT" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_TCD0_OVF + bool "TCD0_OVF" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_TCD0_TRIG + bool "TCD0_TRIG" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_TWI0_TWIS + bool "TWI0_TWIS" + depends on !AVR_TWI0 + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_TWI0_TWIM + bool "TWI0_TWIM" + depends on !AVR_TWI0 + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_SPI0_INT + bool "SPI0_INT" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_USART0_RXC + bool "USART0_RXC" + depends on !AVR_USART0 + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_USART0_DRE + bool "USART0_DRE" + depends on !AVR_USART0 + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_USART0_TXC + bool "USART0_TXC" + depends on !AVR_USART0 + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_PORTD_PORT + bool "PORTD_PORT" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + + Note that since it is impossible to determine which I/O ports + are used by board code for input drivers (e.g. button), + no mutual exclusion is in place for this configuration option + with regards to drivers. Caution is advised. + +config AVRDX_HIGH_PRIO_AC0_AC + bool "AC0_AC" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_ADC0_RESRDY + bool "ADC0_RESRDY" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_ADC0_WCMP + bool "ADC0_WCMP" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_ZCD0_ZCD + bool "ZCD0_ZCD" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_PTC_PTC + bool "PTC_PTC" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_AC1_AC + bool "AC1_AC" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_PORTC_PORT + bool "PORTC_PORT" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + + Note that since it is impossible to determine which I/O ports + are used by board code for input drivers (e.g. button), + no mutual exclusion is in place for this configuration option + with regards to drivers. Caution is advised. + +config AVRDX_HIGH_PRIO_TCB2_INT + bool "TCB2_INT" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_USART1_RXC + bool "USART1_RXC" + depends on !AVR_USART1 + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_USART1_DRE + bool "USART1_DRE" + depends on !AVR_USART1 + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_USART1_TXC + bool "USART1_TXC" + depends on !AVR_USART1 + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_PORTF_PORT + bool "PORTF_PORT" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + + Note that since it is impossible to determine which I/O ports + are used by board code for input drivers (e.g. button), + no mutual exclusion is in place for this configuration option + with regards to drivers. Caution is advised. + +config AVRDX_HIGH_PRIO_NVMCTRL_EE + bool "NVMCTRL_EE" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_SPI1_INT + bool "SPI1_INT" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_USART2_RXC + bool "USART2_RXC" + depends on !AVR_USART2 + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_USART2_DRE + bool "USART2_DRE" + depends on !AVR_USART2 + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_USART2_TXC + bool "USART2_TXC" + depends on !AVR_USART2 + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_AC2_AC + bool "AC2_AC" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_TCB3_INT + bool "TCB3_INT" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_TWI1_TWIS + bool "TWI1_TWIS" + depends on !AVR_TWI1 && AVR_HAVE_TWI1 + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_TWI1_TWIM + bool "TWI1_TWIM" + depends on !AVR_TWI1 && AVR_HAVE_TWI1 + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_PORTB_PORT + bool "PORTB_PORT" + depends on AVR_HAVE_PORTB + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + + Note that since it is impossible to determine which I/O ports + are used by board code for input drivers (e.g. button), + no mutual exclusion is in place for this configuration option + with regards to drivers. Caution is advised. + +config AVRDX_HIGH_PRIO_PORTE_PORT + bool "PORTE_PORT" + depends on AVR_HAVE_PORTE + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + + Note that since it is impossible to determine which I/O ports + are used by board code for input drivers (e.g. button), + no mutual exclusion is in place for this configuration option + with regards to drivers. Caution is advised. + +config AVRDX_HIGH_PRIO_TCA1_OVF + bool "TCA1_OVF" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_TCA1_HUNF + bool "TCA1_HUNF" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_TCA1_CMP0 + bool "TCA1_CMP0" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_TCA1_CMP1 + bool "TCA1_CMP1" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_TCA1_CMP2 + bool "TCA1_CMP2" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_ZCD1_ZCD + bool "ZCD1_ZCD" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_USART3_RXC + bool "USART3_RXC" + depends on AVR_HAVE_USART_4 + depends on !AVR_USART3 + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_USART3_DRE + bool "USART3_DRE" + depends on AVR_HAVE_USART_4 + depends on !AVR_USART3 + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_USART3_TXC + bool "USART3_TXC" + depends on AVR_HAVE_USART_4 + depends on !AVR_USART3 + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_USART4_RXC + bool "USART4_RXC" + depends on AVR_HAVE_USART_4 + depends on !AVR_USART4 + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_USART4_DRE + bool "USART4_DRE" + depends on AVR_HAVE_USART_4 + depends on !AVR_USART4 + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_USART4_TXC + bool "USART4_TXC" + depends on AVR_HAVE_USART_4 + depends on !AVR_USART4 + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_PORTG_PORT + bool "PORTG_PORT" + depends on AVR_HAVE_PORTG + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + + Note that since it is impossible to determine which I/O ports + are used by board code for input drivers (e.g. button), + no mutual exclusion is in place for this configuration option + with regards to drivers. Caution is advised. + +config AVRDX_HIGH_PRIO_ZCD2_ZCD + bool "ZCD2_ZCD" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_TCB4_INT + bool "TCB4_INT" + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_USART5_RXC + bool "USART5_RXC" + depends on AVR_HAVE_USART_5 + depends on !AVR_USART5 + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_USART5_DRE + bool "USART5_DRE" + depends on AVR_HAVE_USART_5 + depends on !AVR_USART5 + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. + +config AVRDX_HIGH_PRIO_USART5_TXC + bool "USART5_TXC" + depends on AVR_HAVE_USART_5 + depends on !AVR_USART5 + default n + ---help--- + Disable generic interrupt handler for this interrupt vector. diff --git a/arch/avr/src/avrdx/avrdx_exceptions.S b/arch/avr/src/avrdx/avrdx_exceptions.S index b73c83f1b29..570e0c08f7f 100644 --- a/arch/avr/src/avrdx/avrdx_exceptions.S +++ b/arch/avr/src/avrdx/avrdx_exceptions.S @@ -50,174 +50,492 @@ #if defined(CONFIG_ARCH_CHIP_AVR128DA28) HANDLER avrdx_nmi, AVRDX_IRQ_NMI, excpt_common +# ifndef CONFIG_AVRDX_HIGH_PRIO_BOD_VLM HANDLER avrdx_bod_vlm, AVRDX_IRQ_BOD_VLM, excpt_common +# endif HANDLER avrdx_rtc_cnt, AVRDX_IRQ_RTC_CNT, excpt_common +# ifndef CONFIG_AVRDX_HIGH_PRIO_RTC_PIT HANDLER avrdx_rtc_pit, AVRDX_IRQ_RTC_PIT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_CCL_CCL HANDLER avrdx_ccl_ccl, AVRDX_IRQ_CCL_CCL, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_PORTA_PORT HANDLER avrdx_porta_port, AVRDX_IRQ_PORTA_PORT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCA0_OVF HANDLER avrdx_tca0_ovf, AVRDX_IRQ_TCA0_OVF, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCA0_HUNF HANDLER avrdx_tca0_hunf, AVRDX_IRQ_TCA0_HUNF, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCA0_CMP0 HANDLER avrdx_tca0_cmp0, AVRDX_IRQ_TCA0_CMP0, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCA0_CMP1 HANDLER avrdx_tca0_cmp1, AVRDX_IRQ_TCA0_CMP1, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCA0_CMP2 HANDLER avrdx_tca0_cmp2, AVRDX_IRQ_TCA0_CMP2, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCB0_INT HANDLER avrdx_tcb0_int, AVRDX_IRQ_TCB0_INT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCB1_INT HANDLER avrdx_tcb1_int, AVRDX_IRQ_TCB1_INT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCD0_OVF HANDLER avrdx_tcd0_ovf, AVRDX_IRQ_TCD0_OVF, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCD0_TRIG HANDLER avrdx_tcd0_trig, AVRDX_IRQ_TCD0_TRIG, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TWI0_TWIS HANDLER avrdx_twi0_twis, AVRDX_IRQ_TWI0_TWIS, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TWI0_TWIM HANDLER avrdx_twi0_twim, AVRDX_IRQ_TWI0_TWIM, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_SPI0_INT HANDLER avrdx_spi0_int, AVRDX_IRQ_SPI0_INT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART0_RXC HANDLER avrdx_usart0_rxc, AVRDX_IRQ_USART0_RXC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART0_DRE HANDLER avrdx_usart0_dre, AVRDX_IRQ_USART0_DRE, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART0_TXC HANDLER avrdx_usart0_txc, AVRDX_IRQ_USART0_TXC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_PORTD_PORT HANDLER avrdx_portd_port, AVRDX_IRQ_PORTD_PORT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_AC0_AC HANDLER avrdx_ac0_ac, AVRDX_IRQ_AC0_AC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_ADC0_RESRDY HANDLER avrdx_adc0_resrdy, AVRDX_IRQ_ADC0_RESRDY, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_ADC0_WCMP HANDLER avrdx_adc0_wcmp, AVRDX_IRQ_ADC0_WCMP, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_ZCD0_ZCD HANDLER avrdx_zcd0_zcd, AVRDX_IRQ_ZCD0_ZCD, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_PTC_PTC HANDLER avrdx_ptc_ptc, AVRDX_IRQ_PTC_PTC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_AC1_AC HANDLER avrdx_ac1_ac, AVRDX_IRQ_AC1_AC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_PORTC_PORT HANDLER avrdx_portc_port, AVRDX_IRQ_PORTC_PORT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCB2_INT HANDLER avrdx_tcb2_int, AVRDX_IRQ_TCB2_INT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART1_RXC HANDLER avrdx_usart1_rxc, AVRDX_IRQ_USART1_RXC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART1_DRE HANDLER avrdx_usart1_dre, AVRDX_IRQ_USART1_DRE, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART1_TXC HANDLER avrdx_usart1_txc, AVRDX_IRQ_USART1_TXC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_PORTF_PORT HANDLER avrdx_portf_port, AVRDX_IRQ_PORTF_PORT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_NVMCTRL_EE HANDLER avrdx_nvmctrl_ee, AVRDX_IRQ_NVMCTRL_EE, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_SPI1_INT HANDLER avrdx_spi1_int, AVRDX_IRQ_SPI1_INT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART2_RXC HANDLER avrdx_usart2_rxc, AVRDX_IRQ_USART2_RXC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART2_DRE HANDLER avrdx_usart2_dre, AVRDX_IRQ_USART2_DRE, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART2_TXC HANDLER avrdx_usart2_txc, AVRDX_IRQ_USART2_TXC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_AC2_AC HANDLER avrdx_ac2_ac, AVRDX_IRQ_AC2_AC, excpt_common +# endif #elif defined(CONFIG_ARCH_CHIP_AVR128DA64) HANDLER avrdx_nmi, AVRDX_IRQ_NMI, excpt_common +# ifndef CONFIG_AVRDX_HIGH_PRIO_BOD_VLM HANDLER avrdx_bod_vlm, AVRDX_IRQ_BOD_VLM, excpt_common +# endif HANDLER avrdx_rtc_cnt, AVRDX_IRQ_RTC_CNT, excpt_common +# ifndef CONFIG_AVRDX_HIGH_PRIO_RTC_PIT HANDLER avrdx_rtc_pit, AVRDX_IRQ_RTC_PIT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_CCL_CCL HANDLER avrdx_ccl_ccl, AVRDX_IRQ_CCL_CCL, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_PORTA_PORT HANDLER avrdx_porta_port, AVRDX_IRQ_PORTA_PORT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCA0_OVF HANDLER avrdx_tca0_ovf, AVRDX_IRQ_TCA0_OVF, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCA0_HUNF HANDLER avrdx_tca0_hunf, AVRDX_IRQ_TCA0_HUNF, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCA0_CMP0 HANDLER avrdx_tca0_cmp0, AVRDX_IRQ_TCA0_CMP0, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCA0_CMP1 HANDLER avrdx_tca0_cmp1, AVRDX_IRQ_TCA0_CMP1, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCA0_CMP2 HANDLER avrdx_tca0_cmp2, AVRDX_IRQ_TCA0_CMP2, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCB0_INT HANDLER avrdx_tcb0_int, AVRDX_IRQ_TCB0_INT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCB1_INT HANDLER avrdx_tcb1_int, AVRDX_IRQ_TCB1_INT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCD0_OVF HANDLER avrdx_tcd0_ovf, AVRDX_IRQ_TCD0_OVF, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCD0_TRIG HANDLER avrdx_tcd0_trig, AVRDX_IRQ_TCD0_TRIG, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TWI0_TWIS HANDLER avrdx_twi0_twis, AVRDX_IRQ_TWI0_TWIS, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TWI0_TWIM HANDLER avrdx_twi0_twim, AVRDX_IRQ_TWI0_TWIM, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_SPI0_INT HANDLER avrdx_spi0_int, AVRDX_IRQ_SPI0_INT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART0_RXC HANDLER avrdx_usart0_rxc, AVRDX_IRQ_USART0_RXC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART0_DRE HANDLER avrdx_usart0_dre, AVRDX_IRQ_USART0_DRE, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART0_TXC HANDLER avrdx_usart0_txc, AVRDX_IRQ_USART0_TXC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_PORTD_PORT HANDLER avrdx_portd_port, AVRDX_IRQ_PORTD_PORT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_AC0_AC HANDLER avrdx_ac0_ac, AVRDX_IRQ_AC0_AC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_ADC0_RESRDY HANDLER avrdx_adc0_resrdy, AVRDX_IRQ_ADC0_RESRDY, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_ADC0_WCMP HANDLER avrdx_adc0_wcmp, AVRDX_IRQ_ADC0_WCMP, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_ZCD0_ZCD HANDLER avrdx_zcd0_zcd, AVRDX_IRQ_ZCD0_ZCD, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_PTC_PTC HANDLER avrdx_ptc_ptc, AVRDX_IRQ_PTC_PTC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_AC1_AC HANDLER avrdx_ac1_ac, AVRDX_IRQ_AC1_AC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_PORTC_PORT HANDLER avrdx_portc_port, AVRDX_IRQ_PORTC_PORT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCB2_INT HANDLER avrdx_tcb2_int, AVRDX_IRQ_TCB2_INT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART1_RXC HANDLER avrdx_usart1_rxc, AVRDX_IRQ_USART1_RXC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART1_DRE HANDLER avrdx_usart1_dre, AVRDX_IRQ_USART1_DRE, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART1_TXC HANDLER avrdx_usart1_txc, AVRDX_IRQ_USART1_TXC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_PORTF_PORT HANDLER avrdx_portf_port, AVRDX_IRQ_PORTF_PORT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_NVMCTRL_EE HANDLER avrdx_nvmctrl_ee, AVRDX_IRQ_NVMCTRL_EE, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_SPI1_INT HANDLER avrdx_spi1_int, AVRDX_IRQ_SPI1_INT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART2_RXC HANDLER avrdx_usart2_rxc, AVRDX_IRQ_USART2_RXC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART2_DRE HANDLER avrdx_usart2_dre, AVRDX_IRQ_USART2_DRE, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART2_TXC HANDLER avrdx_usart2_txc, AVRDX_IRQ_USART2_TXC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_AC2_AC HANDLER avrdx_ac2_ac, AVRDX_IRQ_AC2_AC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCB3_INT HANDLER avrdx_tcb3_int, AVRDX_IRQ_TCB3_INT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TWI1_TWIS HANDLER avrdx_twi1_twis, AVRDX_IRQ_TWI1_TWIS, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TWI1_TWIM HANDLER avrdx_twi1_twim, AVRDX_IRQ_TWI1_TWIM, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_PORTB_PORT HANDLER avrdx_portb_port, AVRDX_IRQ_PORTB_PORT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_PORTE_PORT HANDLER avrdx_porte_port, AVRDX_IRQ_PORTE_PORT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCA1_OVF HANDLER avrdx_tca1_ovf, AVRDX_IRQ_TCA1_OVF, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCA1_HUNF HANDLER avrdx_tca1_hunf, AVRDX_IRQ_TCA1_HUNF, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCA1_CMP0 HANDLER avrdx_tca1_cmp0, AVRDX_IRQ_TCA1_CMP0, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCA1_CMP1 HANDLER avrdx_tca1_cmp1, AVRDX_IRQ_TCA1_CMP1, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCA1_CMP2 HANDLER avrdx_tca1_cmp2, AVRDX_IRQ_TCA1_CMP2, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_ZCD1_ZCD HANDLER avrdx_zcd1_zcd, AVRDX_IRQ_ZCD1_ZCD, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART3_RXC HANDLER avrdx_usart3_rxc, AVRDX_IRQ_USART3_RXC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART3_DRE HANDLER avrdx_usart3_dre, AVRDX_IRQ_USART3_DRE, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART3_TXC HANDLER avrdx_usart3_txc, AVRDX_IRQ_USART3_TXC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART4_RXC HANDLER avrdx_usart4_rxc, AVRDX_IRQ_USART4_RXC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART4_DRE HANDLER avrdx_usart4_dre, AVRDX_IRQ_USART4_DRE, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART4_TXC HANDLER avrdx_usart4_txc, AVRDX_IRQ_USART4_TXC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_PORTG_PORT HANDLER avrdx_portg_port, AVRDX_IRQ_PORTG_PORT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_ZCD2_ZCD HANDLER avrdx_zcd2_zcd, AVRDX_IRQ_ZCD2_ZCD, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCB4_INT HANDLER avrdx_tcb4_int, AVRDX_IRQ_TCB4_INT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART5_RXC HANDLER avrdx_usart5_rxc, AVRDX_IRQ_USART5_RXC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART5_DRE HANDLER avrdx_usart5_dre, AVRDX_IRQ_USART5_DRE, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART5_TXC HANDLER avrdx_usart5_txc, AVRDX_IRQ_USART5_TXC, excpt_common +# endif #elif defined(CONFIG_ARCH_CHIP_AVR128DB64) HANDLER avrdx_nmi, AVRDX_IRQ_NMI, excpt_common +# ifndef CONFIG_AVRDX_HIGH_PRIO_BOD_VLM HANDLER avrdx_bod_vlm, AVRDX_IRQ_BOD_VLM, excpt_common +# endif HANDLER avrdx_clkctrl_cfd, AVRDX_IRQ_CLKCTRL_CFD, excpt_common HANDLER avrdx_mvio_mvio, AVRDX_IRQ_MVIO_MVIO, excpt_common HANDLER avrdx_rtc_cnt, AVRDX_IRQ_RTC_CNT, excpt_common +# ifndef CONFIG_AVRDX_HIGH_PRIO_RTC_PIT HANDLER avrdx_rtc_pit, AVRDX_IRQ_RTC_PIT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_CCL_CCL HANDLER avrdx_ccl_ccl, AVRDX_IRQ_CCL_CCL, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_PORTA_PORT HANDLER avrdx_porta_port, AVRDX_IRQ_PORTA_PORT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCA0_OVF HANDLER avrdx_tca0_ovf, AVRDX_IRQ_TCA0_OVF, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCA0_HUNF HANDLER avrdx_tca0_hunf, AVRDX_IRQ_TCA0_HUNF, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCA0_CMP0 HANDLER avrdx_tca0_cmp0, AVRDX_IRQ_TCA0_CMP0, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCA0_CMP1 HANDLER avrdx_tca0_cmp1, AVRDX_IRQ_TCA0_CMP1, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCA0_CMP2 HANDLER avrdx_tca0_cmp2, AVRDX_IRQ_TCA0_CMP2, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCB0_INT HANDLER avrdx_tcb0_int, AVRDX_IRQ_TCB0_INT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCB1_INT HANDLER avrdx_tcb1_int, AVRDX_IRQ_TCB1_INT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCD0_OVF HANDLER avrdx_tcd0_ovf, AVRDX_IRQ_TCD0_OVF, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCD0_TRIG HANDLER avrdx_tcd0_trig, AVRDX_IRQ_TCD0_TRIG, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TWI0_TWIS HANDLER avrdx_twi0_twis, AVRDX_IRQ_TWI0_TWIS, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TWI0_TWIM HANDLER avrdx_twi0_twim, AVRDX_IRQ_TWI0_TWIM, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_SPI0_INT HANDLER avrdx_spi0_int, AVRDX_IRQ_SPI0_INT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART0_RXC HANDLER avrdx_usart0_rxc, AVRDX_IRQ_USART0_RXC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART0_DRE HANDLER avrdx_usart0_dre, AVRDX_IRQ_USART0_DRE, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART0_TXC HANDLER avrdx_usart0_txc, AVRDX_IRQ_USART0_TXC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_PORTD_PORT HANDLER avrdx_portd_port, AVRDX_IRQ_PORTD_PORT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_AC0_AC HANDLER avrdx_ac0_ac, AVRDX_IRQ_AC0_AC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_ADC0_RESRDY HANDLER avrdx_adc0_resrdy, AVRDX_IRQ_ADC0_RESRDY, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_ADC0_WCMP HANDLER avrdx_adc0_wcmp, AVRDX_IRQ_ADC0_WCMP, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_ZCD0_ZCD HANDLER avrdx_zcd0_zcd, AVRDX_IRQ_ZCD0_ZCD, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_AC1_AC HANDLER avrdx_ac1_ac, AVRDX_IRQ_AC1_AC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_PORTC_PORT HANDLER avrdx_portc_port, AVRDX_IRQ_PORTC_PORT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCB2_INT HANDLER avrdx_tcb2_int, AVRDX_IRQ_TCB2_INT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART1_RXC HANDLER avrdx_usart1_rxc, AVRDX_IRQ_USART1_RXC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART1_DRE HANDLER avrdx_usart1_dre, AVRDX_IRQ_USART1_DRE, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART1_TXC HANDLER avrdx_usart1_txc, AVRDX_IRQ_USART1_TXC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_PORTF_PORT HANDLER avrdx_portf_port, AVRDX_IRQ_PORTF_PORT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_NVMCTRL_EE HANDLER avrdx_nvmctrl_ee, AVRDX_IRQ_NVMCTRL_EE, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_SPI1_INT HANDLER avrdx_spi1_int, AVRDX_IRQ_SPI1_INT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART2_RXC HANDLER avrdx_usart2_rxc, AVRDX_IRQ_USART2_RXC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART2_DRE HANDLER avrdx_usart2_dre, AVRDX_IRQ_USART2_DRE, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART2_TXC HANDLER avrdx_usart2_txc, AVRDX_IRQ_USART2_TXC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_AC2_AC HANDLER avrdx_ac2_ac, AVRDX_IRQ_AC2_AC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TWI1_TWIS HANDLER avrdx_twi1_twis, AVRDX_IRQ_TWI1_TWIS, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TWI1_TWIM HANDLER avrdx_twi1_twim, AVRDX_IRQ_TWI1_TWIM, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCB3_INT HANDLER avrdx_tcb3_int, AVRDX_IRQ_TCB3_INT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_PORTB_PORT HANDLER avrdx_portb_port, AVRDX_IRQ_PORTB_PORT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_PORTE_PORT HANDLER avrdx_porte_port, AVRDX_IRQ_PORTE_PORT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCA1_OVF HANDLER avrdx_tca1_ovf, AVRDX_IRQ_TCA1_OVF, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCA1_HUNF HANDLER avrdx_tca1_hunf, AVRDX_IRQ_TCA1_HUNF, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCA1_CMP0 HANDLER avrdx_tca1_cmp0, AVRDX_IRQ_TCA1_CMP0, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCA1_CMP1 HANDLER avrdx_tca1_cmp1, AVRDX_IRQ_TCA1_CMP1, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCA1_CMP2 HANDLER avrdx_tca1_cmp2, AVRDX_IRQ_TCA1_CMP2, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_ZCD1_ZCD HANDLER avrdx_zcd1_zcd, AVRDX_IRQ_ZCD1_ZCD, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART3_RXC HANDLER avrdx_usart3_rxc, AVRDX_IRQ_USART3_RXC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART3_DRE HANDLER avrdx_usart3_dre, AVRDX_IRQ_USART3_DRE, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART3_TXC HANDLER avrdx_usart3_txc, AVRDX_IRQ_USART3_TXC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART4_RXC HANDLER avrdx_usart4_rxc, AVRDX_IRQ_USART4_RXC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART4_DRE HANDLER avrdx_usart4_dre, AVRDX_IRQ_USART4_DRE, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART4_TXC HANDLER avrdx_usart4_txc, AVRDX_IRQ_USART4_TXC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_PORTG_PORT HANDLER avrdx_portg_port, AVRDX_IRQ_PORTG_PORT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_ZCD2_ZCD HANDLER avrdx_zcd2_zcd, AVRDX_IRQ_ZCD2_ZCD, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_TCB4_INT HANDLER avrdx_tcb4_int, AVRDX_IRQ_TCB4_INT, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART5_RXC HANDLER avrdx_usart5_rxc, AVRDX_IRQ_USART5_RXC, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART5_DRE HANDLER avrdx_usart5_dre, AVRDX_IRQ_USART5_DRE, excpt_common +# endif +# ifndef CONFIG_AVRDX_HIGH_PRIO_USART5_TXC HANDLER avrdx_usart5_txc, AVRDX_IRQ_USART5_TXC, excpt_common +# endif #else # error "Unrecognized chip" #endif
