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commit a479d137f28adb2948524b05adfa7c716038e193 Author: Marco Casaroli <[email protected]> AuthorDate: Tue Oct 27 20:29:32 2026 +0100 arch/arm, arch/arm64: Fix the old nxstyle errors of seven files. The next commits change the copyright lines of these files, and checkpatch checks every file that a change touches. Fix their old nxstyle errors first: the indentation of an asm statement, of two switch statements and of some lines, the missing blank lines after declarations, and the braces of an empty while loop. The code does not change. Assisted-by: Claude Code:claude-opus-5-5 Signed-off-by: Marco Casaroli <[email protected]> --- arch/arm/src/armv7-m/arm_stackcheck.c | 2 +- arch/arm/src/armv8-m/arm_stackcheck.c | 2 +- arch/arm/src/lc823450/lc823450_sdc.c | 2 + arch/arm/src/lpc54xx/lpc54_i2c_master.c | 4 +- arch/arm64/src/bcm2711/bcm2711_oneshot.c | 1 + arch/arm64/src/bcm2711/bcm2711_pwm.c | 101 ++++++++++++++++--------------- 6 files changed, 58 insertions(+), 54 deletions(-) diff --git a/arch/arm/src/armv7-m/arm_stackcheck.c b/arch/arm/src/armv7-m/arm_stackcheck.c index e3c290cbdd9..eee129c47b7 100644 --- a/arch/arm/src/armv7-m/arm_stackcheck.c +++ b/arch/arm/src/armv7-m/arm_stackcheck.c @@ -104,7 +104,7 @@ void __stack_overflow_trap(void) static void stack_check_enter(void *func, void *caller, void *arg) { - asm volatile ( + asm volatile ( " mrs r2, ipsr \n" /* Check whether we are in interrupt mode */ " cmp r2, #0 \n" /* since we don't switch r10 on interrupt entry, we */ " bne 2f \n" /* can't detect overflow of the interrupt stack. */ diff --git a/arch/arm/src/armv8-m/arm_stackcheck.c b/arch/arm/src/armv8-m/arm_stackcheck.c index 4e72b194a85..a1c03f86b4b 100644 --- a/arch/arm/src/armv8-m/arm_stackcheck.c +++ b/arch/arm/src/armv8-m/arm_stackcheck.c @@ -104,7 +104,7 @@ void __stack_overflow_trap(void) static void stack_check_enter(void *func, void *caller, void *arg) { - asm volatile ( + asm volatile ( " mrs r2, ipsr \n" /* Check whether we are in interrupt mode */ " cmp r2, #0 \n" /* since we don't switch r10 on interrupt entry, we */ " bne 2f \n" /* can't detect overflow of the interrupt stack. */ diff --git a/arch/arm/src/lc823450/lc823450_sdc.c b/arch/arm/src/lc823450/lc823450_sdc.c index 4b2f83d42a3..6447e3dbeae 100644 --- a/arch/arm/src/lc823450/lc823450_sdc.c +++ b/arch/arm/src/lc823450/lc823450_sdc.c @@ -148,6 +148,7 @@ static int _lc823450_sdc_support_trim(struct sddrcfg_s *cf) int ret = ((sddr_refmediatype(cf) == SDDR_MEDIA_TYPE_MMC) ? (((cf)->ex.mmc.extcsd_sec_feature_support & (1UL << 4)) ? 1 : 0) : 0); + return ret; } @@ -453,6 +454,7 @@ int lc823450_sdc_readsector(uint32_t ch, if (0 == addr) { uint8_t *p = (pbuf + 0x1c2); /* partition id */ + if (0x7 == *p) { mcinfo("exFAT (NTFS) detected\n"); diff --git a/arch/arm/src/lpc54xx/lpc54_i2c_master.c b/arch/arm/src/lpc54xx/lpc54_i2c_master.c index 2ca2eb83987..64b15afdab7 100644 --- a/arch/arm/src/lpc54xx/lpc54_i2c_master.c +++ b/arch/arm/src/lpc54xx/lpc54_i2c_master.c @@ -847,9 +847,9 @@ static int lpc54_i2c_transfer(struct i2c_master_s *dev, do { #ifndef CONFIG_I2C_POLLED - nxsem_wait(&priv->waitsem); + nxsem_wait(&priv->waitsem); #else - lpc54_i2c_statemachine(priv); + lpc54_i2c_statemachine(priv); #endif } while (priv->state != I2CSTATE_IDLE); diff --git a/arch/arm64/src/bcm2711/bcm2711_oneshot.c b/arch/arm64/src/bcm2711/bcm2711_oneshot.c index c348109263d..95f47086f85 100644 --- a/arch/arm64/src/bcm2711/bcm2711_oneshot.c +++ b/arch/arm64/src/bcm2711/bcm2711_oneshot.c @@ -140,6 +140,7 @@ static struct bcm2711_chan_s g_chans[BCM_SYST_NUMCHANS] = static clkcnt_t get_current_count(void) { clkcnt_t count; + count = (clkcnt_t)getreg32(BCM_SYST_CHI) << 32; count |= getreg32(BCM_SYST_CLO); return count; diff --git a/arch/arm64/src/bcm2711/bcm2711_pwm.c b/arch/arm64/src/bcm2711/bcm2711_pwm.c index ffc4d4f15cc..042df119964 100644 --- a/arch/arm64/src/bcm2711/bcm2711_pwm.c +++ b/arch/arm64/src/bcm2711/bcm2711_pwm.c @@ -334,34 +334,34 @@ static int bcm2711_pwm_start(FAR struct pwm_lowerhalf_s *dev, switch (info->channels[i].channel) { - case 1: - bcm2711_setpulse(BCM_PWM_RNG1(priv->base), - BCM_PWM_DAT1(priv->base), - info->channels[i].duty, info->frequency); - bcm2711_channel_pol(priv, BCM_PWM_CTL_POLA1, - info->channels[i].cpol); - - /* Enable channel output */ - - modreg32(BCM_PWM_CTL_PWEN1, BCM_PWM_CTL_PWEN1, - BCM_PWM_CTL(priv->base)); - break; - case 2: - bcm2711_setpulse(BCM_PWM_RNG2(priv->base), - BCM_PWM_DAT2(priv->base), - info->channels[i].duty, info->frequency); - bcm2711_channel_pol(priv, BCM_PWM_CTL_POLA2, - info->channels[i].cpol); - - /* Enable channel output */ - - modreg32(BCM_PWM_CTL_PWEN2, BCM_PWM_CTL_PWEN2, - BCM_PWM_CTL(priv->base)); - break; - default: - pwmerr("Invalid channel %d\n", info->channels[i].channel); - nxmutex_unlock(&priv->lock); /* Unlock before return */ - return -EINVAL; + case 1: + bcm2711_setpulse(BCM_PWM_RNG1(priv->base), + BCM_PWM_DAT1(priv->base), + info->channels[i].duty, info->frequency); + bcm2711_channel_pol(priv, BCM_PWM_CTL_POLA1, + info->channels[i].cpol); + + /* Enable channel output */ + + modreg32(BCM_PWM_CTL_PWEN1, BCM_PWM_CTL_PWEN1, + BCM_PWM_CTL(priv->base)); + break; + case 2: + bcm2711_setpulse(BCM_PWM_RNG2(priv->base), + BCM_PWM_DAT2(priv->base), + info->channels[i].duty, info->frequency); + bcm2711_channel_pol(priv, BCM_PWM_CTL_POLA2, + info->channels[i].cpol); + + /* Enable channel output */ + + modreg32(BCM_PWM_CTL_PWEN2, BCM_PWM_CTL_PWEN2, + BCM_PWM_CTL(priv->base)); + break; + default: + pwmerr("Invalid channel %d\n", info->channels[i].channel); + nxmutex_unlock(&priv->lock); /* Unlock before return */ + return -EINVAL; } nxmutex_unlock(&priv->lock); /* Unlock for next iteration */ @@ -452,30 +452,30 @@ struct pwm_lowerhalf_s *bcm2711_pwminitialize(int timer) switch (timer) { #ifdef CONFIG_BCM2711_PWM0 - case 0: - priv = &g_pwm0; - bcm2711_gpio_set_func(CONFIG_BCM2711_PWM0_CHAN1_PIN, - BCM2711_PWM0_CHAN1_PIN_ALT); - bcm2711_gpio_set_pulls(CONFIG_BCM2711_PWM0_CHAN1_PIN, false, false); - bcm2711_gpio_set_func(CONFIG_BCM2711_PWM0_CHAN2_PIN, - BCM2711_PWM0_CHAN2_PIN_ALT); - bcm2711_gpio_set_pulls(CONFIG_BCM2711_PWM0_CHAN2_PIN, false, false); - break; + case 0: + priv = &g_pwm0; + bcm2711_gpio_set_func(CONFIG_BCM2711_PWM0_CHAN1_PIN, + BCM2711_PWM0_CHAN1_PIN_ALT); + bcm2711_gpio_set_pulls(CONFIG_BCM2711_PWM0_CHAN1_PIN, false, false); + bcm2711_gpio_set_func(CONFIG_BCM2711_PWM0_CHAN2_PIN, + BCM2711_PWM0_CHAN2_PIN_ALT); + bcm2711_gpio_set_pulls(CONFIG_BCM2711_PWM0_CHAN2_PIN, false, false); + break; #endif #ifdef CONFIG_BCM2711_PWM1 - case 1: - priv = &g_pwm1; - bcm2711_gpio_set_func(BCM2711_PWM1_CHAN1_PIN, - BCM2711_PWM1_CHAN1_PIN_ALT); - bcm2711_gpio_set_pulls(BCM2711_PWM1_CHAN1_PIN, false, false); - bcm2711_gpio_set_func(BCM2711_PWM1_CHAN2_PIN, - BCM2711_PWM1_CHAN2_PIN_ALT); - bcm2711_gpio_set_pulls(BCM2711_PWM1_CHAN2_PIN, false, false); - break; + case 1: + priv = &g_pwm1; + bcm2711_gpio_set_func(BCM2711_PWM1_CHAN1_PIN, + BCM2711_PWM1_CHAN1_PIN_ALT); + bcm2711_gpio_set_pulls(BCM2711_PWM1_CHAN1_PIN, false, false); + bcm2711_gpio_set_func(BCM2711_PWM1_CHAN2_PIN, + BCM2711_PWM1_CHAN2_PIN_ALT); + bcm2711_gpio_set_pulls(BCM2711_PWM1_CHAN2_PIN, false, false); + break; #endif - default: - pwmerr("No PWM%d interface.", timer); - return NULL; + default: + pwmerr("No PWM%d interface.", timer); + return NULL; } /* Don't re-initialize */ @@ -514,7 +514,8 @@ struct pwm_lowerhalf_s *bcm2711_pwminitialize(int timer) /* Wait for clock to no longer be busy */ while (getreg32(PWM_GPCLKCTL) & BCM_GPCLK_CM_CTL_BUSY) - ; + { + } putreg32(BCM_GPCLK_PASSWD | BCM_PWMCLK_DIV_VAL, PWM_GPCLKDIV); putreg32(BCM_GPCLK_PASSWD | BCM_GPCLK_CLKSRC_OSC, PWM_GPCLKCTL);
