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The following commit(s) were added to refs/heads/master by this push:
new 3620728 arch/stm32h7: Fix nxstyle errors
3620728 is described below
commit 3620728db21c3ef176a8b8e0d36297b6465072c3
Author: Nathan Hartman <[email protected]>
AuthorDate: Mon Jan 18 12:55:47 2021 -0500
arch/stm32h7: Fix nxstyle errors
arch/arm/src/stm32h7/stm32_dtcm.c:
arch/arm/src/stm32h7/stm32_lowputc.c:
* Fix nxstyle issues.
---
arch/arm/src/stm32h7/stm32_dtcm.c | 4 ++++
arch/arm/src/stm32h7/stm32_lowputc.c | 17 ++++++++++++-----
2 files changed, 16 insertions(+), 5 deletions(-)
diff --git a/arch/arm/src/stm32h7/stm32_dtcm.c
b/arch/arm/src/stm32h7/stm32_dtcm.c
index eae75ef..5ede648 100644
--- a/arch/arm/src/stm32h7/stm32_dtcm.c
+++ b/arch/arm/src/stm32h7/stm32_dtcm.c
@@ -58,4 +58,8 @@
struct mm_heap_s g_dtcm_heap;
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
#endif /* HAVE_DTCM_HEAP */
diff --git a/arch/arm/src/stm32h7/stm32_lowputc.c
b/arch/arm/src/stm32h7/stm32_lowputc.c
index 51bcab6..626f29e 100644
--- a/arch/arm/src/stm32h7/stm32_lowputc.c
+++ b/arch/arm/src/stm32h7/stm32_lowputc.c
@@ -272,6 +272,7 @@
# undef USE_OVER8
/* Calculate USART BAUD rate divider */
+
/* Baud rate for standard USART (SPI mode included):
*
* In case of oversampling by 16, the equation is:
@@ -289,7 +290,9 @@
# define STM32_USARTDIV16 \
((STM32_APBCLOCK + (STM32_CONSOLE_BAUD >> 1)) / STM32_CONSOLE_BAUD)
- /* Use oversampling by 8 only if the divisor is small. But what is small?
*/
+ /* Use oversampling by 8 only if the divisor is small. But what is
+ * small?
+ */
# if STM32_USARTDIV8 > 100
# define STM32_BRR_VALUE STM32_USARTDIV16
@@ -337,7 +340,8 @@ void arm_lowputc(char ch)
#ifdef HAVE_CONSOLE
/* Wait until the TX data register is empty */
- while ((getreg32(STM32_CONSOLE_BASE + STM32_USART_ISR_OFFSET) &
USART_ISR_TXE) == 0);
+ while ((getreg32(STM32_CONSOLE_BASE + STM32_USART_ISR_OFFSET) &
+ USART_ISR_TXE) == 0);
#ifdef STM32_CONSOLE_RS485_DIR
stm32_gpiowrite(STM32_CONSOLE_RS485_DIR, STM32_CONSOLE_RS485_DIR_POLARITY);
#endif
@@ -347,8 +351,10 @@ void arm_lowputc(char ch)
putreg32((uint32_t)ch, STM32_CONSOLE_BASE + STM32_USART_TDR_OFFSET);
#ifdef STM32_CONSOLE_RS485_DIR
- while ((getreg32(STM32_CONSOLE_BASE + STM32_USART_ISR_OFFSET) &
USART_ISR_TC) == 0);
- stm32_gpiowrite(STM32_CONSOLE_RS485_DIR, !STM32_CONSOLE_RS485_DIR_POLARITY);
+ while ((getreg32(STM32_CONSOLE_BASE + STM32_USART_ISR_OFFSET) &
+ USART_ISR_TC) == 0);
+ stm32_gpiowrite(STM32_CONSOLE_RS485_DIR,
+ !STM32_CONSOLE_RS485_DIR_POLARITY);
#endif
#endif /* HAVE_CONSOLE */
@@ -391,7 +397,8 @@ void stm32_lowsetup(void)
#ifdef STM32_CONSOLE_RS485_DIR
stm32_configgpio(STM32_CONSOLE_RS485_DIR);
- stm32_gpiowrite(STM32_CONSOLE_RS485_DIR, !STM32_CONSOLE_RS485_DIR_POLARITY);
+ stm32_gpiowrite(STM32_CONSOLE_RS485_DIR,
+ !STM32_CONSOLE_RS485_DIR_POLARITY);
#endif
/* Enable and configure the selected console device */
