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commit 9f414cf6dbd3b8e13a3c87b4be96696e03973e67 Author: Masayuki Ishikawa <[email protected]> AuthorDate: Fri Feb 5 10:33:59 2021 +0900 arch: max32660: Fix style warnings and compile errors Summary: - This commit fixes style warnings under max32660 - Also fix compile errors in max32660_gpio.c with CONFIG_DEBUG_GPIO_INFO=y Impact: - None Testing: - Built with max32660-evsys:nsh Signed-off-by: Masayuki Ishikawa <[email protected]> --- .../src/max326xx/max32660/max32660_clockconfig.c | 16 +++--- arch/arm/src/max326xx/max32660/max32660_dma.c | 17 +++--- arch/arm/src/max326xx/max32660/max32660_dma.h | 4 +- arch/arm/src/max326xx/max32660/max32660_gpio.c | 33 +++++------ arch/arm/src/max326xx/max32660/max32660_gpio.h | 2 +- arch/arm/src/max326xx/max32660/max32660_gpioirq.c | 14 +++-- arch/arm/src/max326xx/max32660/max32660_lowputc.c | 23 ++++---- arch/arm/src/max326xx/max32660/max32660_rtc.c | 66 +++++++++++----------- 8 files changed, 93 insertions(+), 82 deletions(-) diff --git a/arch/arm/src/max326xx/max32660/max32660_clockconfig.c b/arch/arm/src/max326xx/max32660/max32660_clockconfig.c index 499e82e..3b38139 100644 --- a/arch/arm/src/max326xx/max32660/max32660_clockconfig.c +++ b/arch/arm/src/max326xx/max32660/max32660_clockconfig.c @@ -124,7 +124,7 @@ static uint32_t max326_sysclk_frequency(void) /* The divider is in the GCR_CLKCTRL:PSC setting: * * Fsysclk = Fsysclk / (2^psc) - */ + */ regval = getreg32(MAX326_GCR_CLKCTRL); psc = (regval & GCR_CLKCTRL_PSC_MASK) >> GCR_CLKCTRL_PSC_SHIFT; @@ -143,7 +143,7 @@ static void max326_enable_hfio(FAR const struct clock_setup_s *clksetup) { uint32_t regval; - /* Check if the HFIO is needed. */ + /* Check if the HFIO is needed. */ if (clksetup->hfio) { @@ -383,7 +383,7 @@ static void max326_set_ovr(FAR const struct clock_setup_s *clksetup) max326_select_lirc8k(); } - /* Wait for SYSOSC to become ready */ + /* Wait for SYSOSC to become ready */ while ((getreg32(MAX326_GCR_CLKCTRL) & GCR_CLKCTRL_CLKRDY) == 0) { @@ -439,6 +439,7 @@ static void max326_set_clksrc(FAR const struct clock_setup_s *clksetup) switch (clksetup->clksrc) { case CLKSRC_HFIO: /* High frequency internal oscillator */ + /* Select the High-Frequency Internal Oscillator (HFIO) as the * SYSOSC clock source. */ @@ -448,6 +449,7 @@ static void max326_set_clksrc(FAR const struct clock_setup_s *clksetup) break; case CLKSRC_8KHZ: /* 8kHz Internal Ultra-Low Power Nano-Ring Oscillator */ + /* Select the 8kHz Internal Ultra-Low Power Nano-Ring Oscillator * as the SYSOSC clock source. */ @@ -597,7 +599,7 @@ static void max326_periph_reset(void) * clocking using the settings in board.h. This function also performs * other low-level chip as necessary. * - *****************************************************************************/ + ****************************************************************************/ void max326_clockconfig(FAR const struct clock_setup_s *clksetup) { @@ -685,7 +687,7 @@ void max326_clockconfig(FAR const struct clock_setup_s *clksetup) * Description: * Return the High-Frequency Internal Oscillator (HFIO) frequency. * - *****************************************************************************/ + ****************************************************************************/ uint32_t max326_hfio_frequency(void) { @@ -715,7 +717,7 @@ uint32_t max326_hfio_frequency(void) * Description: * Return the current CPU frequency. * - *****************************************************************************/ + ****************************************************************************/ uint32_t max326_cpu_frequency(void) { @@ -728,7 +730,7 @@ uint32_t max326_cpu_frequency(void) * Description: * Return the current peripheral clock frequency. * - *****************************************************************************/ + ****************************************************************************/ uint32_t max326_pclk_frequency(void) { diff --git a/arch/arm/src/max326xx/max32660/max32660_dma.c b/arch/arm/src/max326xx/max32660/max32660_dma.c index 9da2be6..fe1c9e7 100644 --- a/arch/arm/src/max326xx/max32660/max32660_dma.c +++ b/arch/arm/src/max326xx/max32660/max32660_dma.c @@ -63,8 +63,9 @@ * Private Types ****************************************************************************/ -/* This structure describes state of a DMA channel */ -/* TODO: Additional reload values for chains > 2 could be held here */ +/* This structure describes state of a DMA channel + * TODO: Additional reload values for chains > 2 could be held here + */ struct max326_dmach_s { @@ -192,8 +193,8 @@ static int max326_dmach_interrupt(int irq, FAR void *context, FAR void *arg) if ((stat & DMACH_STAT_CHST) != 0) { - /* We must be on the buffer of a chained DMA */ - /* TODO: Add software logic to manage more than two DMA buffers in + /* We must be on the buffer of a chained DMA + * TODO: Add software logic to manage more than two DMA buffers in * the chain. */ @@ -245,7 +246,9 @@ void weak_function arm_dma_initialize(void) { struct max326_dmach_s *dmach = &g_max326_dmach[i]; - /* Initialize the state structure (assuming that it is already zeroed) */ + /* Initialize the state structure + * (assuming that it is already zeroed) + */ dmach->chno = i; @@ -303,8 +306,8 @@ DMA_HANDLE max326_dma_channel(void) * * Description: * Release a DMA channel. NOTE: The 'handle' used in this argument must - * NEVER be used again until max326_dma_channel() is called again to re-gain - * a valid handle. + * NEVER be used again until max326_dma_channel() is called again + * to re-gain a valid handle. * * Returned Value: * None diff --git a/arch/arm/src/max326xx/max32660/max32660_dma.h b/arch/arm/src/max326xx/max32660/max32660_dma.h index bf42a8e..c5a2b6c 100644 --- a/arch/arm/src/max326xx/max32660/max32660_dma.h +++ b/arch/arm/src/max326xx/max32660/max32660_dma.h @@ -125,8 +125,8 @@ DMA_HANDLE max326_dma_channel(void); * * Description: * Release a DMA channel. NOTE: The 'handle' used in this argument must - * NEVER be used again until max326_dma_channel() is called again to re-gain - * a valid handle. + * NEVER be used again until max326_dma_channel() is called again to + * re-gain a valid handle. * * Returned Value: * None diff --git a/arch/arm/src/max326xx/max32660/max32660_gpio.c b/arch/arm/src/max326xx/max32660/max32660_gpio.c index 015314b..b7f8e6a 100644 --- a/arch/arm/src/max326xx/max32660/max32660_gpio.c +++ b/arch/arm/src/max326xx/max32660/max32660_gpio.c @@ -337,13 +337,13 @@ int max326_gpio_config(max326_pinset_t pinset) } else { - /* Four levels of drive strength: Order by drive strength: - * - * LO DS0=0 DS1=0 - * MEDLO DS0=1 DS1=0 - * MEDHI DS0=0 DS1=1 - * HI DS0=1 DS1=1 - */ + /* Four levels of drive strength: Order by drive strength: + * + * LO DS0=0 DS1=0 + * MEDLO DS0=1 DS1=0 + * MEDHI DS0=0 DS1=1 + * HI DS0=1 DS1=1 + */ if (subset == GPIO_DRIVE_MEDLO || subset == GPIO_DRIVE_HI) { @@ -484,7 +484,7 @@ bool max326_gpio_read(max326_pinset_t pinset) ****************************************************************************/ #ifdef CONFIG_DEBUG_GPIO_INFO -int max326_gpio_dump(max326_pinset_t pinset, const char *msg); +int max326_gpio_dump(max326_pinset_t pinset, const char *msg) { unsigned int pin; uint32_t pinmask; @@ -513,7 +513,6 @@ int max326_gpio_dump(max326_pinset_t pinset, const char *msg); afmode |= (regval & pinmask) != 0 ? 2 : 0; gpioinfo(" Mode: %d\n", g_afmode[afmode]); - regval = getreg32(MAX326_GPIO0_OUTEN); gpioinfo(" Output Enable: %s\n", (regval & pinmask) != 0 ? "Yes" : "No"); @@ -527,7 +526,7 @@ int max326_gpio_dump(max326_pinset_t pinset, const char *msg); (regval & pinmask) != 0 ? "High" : "Low"); regval = getreg32(MAX326_GPIO0_INTMODE); - edge = (regval & pinmask) != 0 + edge = (regval & pinmask) != 0; gpioinfo(" Intr Mode: %s\n", edge ? "Yes" : "No"); regval = getreg32(MAX326_GPIO0_INTPOL); @@ -562,13 +561,13 @@ int max326_gpio_dump(max326_pinset_t pinset, const char *msg); gpioinfo(" Wakeup Enabled: %s\n", (regval & pinmask) != 0 ? "Yes" : "No"); - pullmode = 0 + pullmode = 0; regval = getreg32(MAX326_GPIO0_PULLEN); if ((regval & pinmask) != 0) { if ((PULLUP_SET & pinmask) == 0) { - pullmode = 1: + pullmode = 1; } else { @@ -583,9 +582,9 @@ int max326_gpio_dump(max326_pinset_t pinset, const char *msg); regval = getreg32(MAX326_GPIO0_DS0SEL); if ((regval & pinmask) != 0) { - if (PULLUP_SET & pinmask) == 0) + if ((PULLUP_SET & pinmask) == 0) { - dsmode = 3: + dsmode = 3; } else { @@ -593,10 +592,10 @@ int max326_gpio_dump(max326_pinset_t pinset, const char *msg); dsmode = (regval & pinmask) != 0 ? 3 : 1; } } - else if (PULLUP_SET & pinmask) != 0) + else if ((PULLUP_SET & pinmask) != 0) { regval = getreg32(MAX326_GPIO0_DS1SEL); - if (regval & pinmask) != 0) + if ((regval & pinmask) != 0) { dsmode = 2; } @@ -611,5 +610,7 @@ int max326_gpio_dump(max326_pinset_t pinset, const char *msg); regval = getreg32(MAX326_GPIO0_SRSEL); gpioinfo(" Slew Enabled: %s\n", (regval & pinmask) != 0 ? "Yes" : "No"); + + return 0; } #endif diff --git a/arch/arm/src/max326xx/max32660/max32660_gpio.h b/arch/arm/src/max326xx/max32660/max32660_gpio.h index 08ee36c..f1e4ccf 100644 --- a/arch/arm/src/max326xx/max32660/max32660_gpio.h +++ b/arch/arm/src/max326xx/max32660/max32660_gpio.h @@ -44,7 +44,7 @@ * Pre-processor Definitions ************************************************************************************/ -/* Bit-encoded input to max326_gpio_config() ******************************************/ +/* Bit-encoded input to max326_gpio_config() ****************************************/ /* 16-Bit Encoding: FFFF WRRV HSDD NNNN * diff --git a/arch/arm/src/max326xx/max32660/max32660_gpioirq.c b/arch/arm/src/max326xx/max32660/max32660_gpioirq.c index 7368704..b8035bd 100644 --- a/arch/arm/src/max326xx/max32660/max32660_gpioirq.c +++ b/arch/arm/src/max326xx/max32660/max32660_gpioirq.c @@ -193,17 +193,18 @@ void max326_gpio_irqconfig(max326_pinset_t cfgset) putreg32(regval, MAX326_GPIO0_INTDUALEDGE); } -/************************************************************************************ +/**************************************************************************** * Name: max326_gpio_irqdisable * * Description: - * Disable a GPIO pin interrupt. This function should not be called directly but, + * Disable a GPIO pin interrupt. + * This function should not be called directly but, * rather through up_disable_irq(); * * Assumptions: * We are in a critical section. * - ************************************************************************************/ + ****************************************************************************/ void max326_gpio_irqdisable(int irq) { @@ -221,17 +222,18 @@ void max326_gpio_irqdisable(int irq) } } -/************************************************************************************ +/**************************************************************************** * Name: max326_gpio_irqenable * * Description: - * Enable a GPIO pin interrupt. This function should not be called directly but, + * Enable a GPIO pin interrupt. + * This function should not be called directly but, * rather through up_enable_irq(); * * Assumptions: * We are in a critical section. * - ************************************************************************************/ + ****************************************************************************/ void max326_gpio_irqenable(int irq) { diff --git a/arch/arm/src/max326xx/max32660/max32660_lowputc.c b/arch/arm/src/max326xx/max32660/max32660_lowputc.c index 5159497..5b453c8 100644 --- a/arch/arm/src/max326xx/max32660/max32660_lowputc.c +++ b/arch/arm/src/max326xx/max32660/max32660_lowputc.c @@ -216,20 +216,20 @@ static void max326_setbaud(uintptr_t base, } #endif -/************************************************************************************ +/**************************************************************************** * Public Functions - ************************************************************************************/ + ****************************************************************************/ -/************************************************************************************ +/**************************************************************************** * Name: max326_lowsetup * * Description: - * Called at the very beginning of _start. Performs low level initialization - * including setup of the console UART. This UART initialization is done - * early so that the serial console is available for debugging very early in - * the boot sequence. + * Called at the very beginning of _start. + * Performs low level initialization including setup of the console UART. + * This UART initialization is done early so that the serial console + * is available for debugging very early in the boot sequence. * - ************************************************************************************/ + ****************************************************************************/ void max326_lowsetup(void) { @@ -260,7 +260,7 @@ void max326_lowsetup(void) max326_uart1_enableclk(); - /* Configure UART1 pins */ + /* Configure UART1 pins */ max326_gpio_config(GPIO_UART1_RX); max326_gpio_config(GPIO_UART1_TX); @@ -304,8 +304,9 @@ void max326_uart_configure(uintptr_t base, max326_setbaud(CONSOLE_BASE, config); - /* Configure RX and TX FIFOs */ - /* Flush FIFOs */ + /* Configure RX and TX FIFOs + * Flush FIFOs + */ ctrl0 = getreg32(base + MAX326_UART_CTRL0_OFFSET); ctrl0 |= (UART_CTRL0_TXFLUSH | UART_CTRL0_RXFLUSH); diff --git a/arch/arm/src/max326xx/max32660/max32660_rtc.c b/arch/arm/src/max326xx/max32660/max32660_rtc.c index d611007..f05e5ff 100644 --- a/arch/arm/src/max326xx/max32660/max32660_rtc.c +++ b/arch/arm/src/max326xx/max32660/max32660_rtc.c @@ -226,7 +226,7 @@ static b32_t max326_rtc_tm2b32(FAR const struct timespec *tp) * 00000000 00000001 00000000 00000000 = 1 Sec */ - if (tp->tv_nsec > 0) + if (tp->tv_nsec > 0) { fracpart = itob32(tp->tv_nsec) / NSEC_PER_SEC; } @@ -443,7 +443,8 @@ int up_rtc_gettime(FAR struct timespec *tp) * Name: up_rtc_settime * * Description: - * Set the RTC to the provided time. All RTC implementations must be able to + * Set the RTC to the provided time. + * All RTC implementations must be able to * set their time based on a standard tm. * * Input Parameters: @@ -515,7 +516,8 @@ int up_rtc_settime(FAR const struct timespec *tp) ****************************************************************************/ #ifdef CONFIG_RTC_ALARM -int max326_rtc_setalarm(FAR struct timespec *ts, alm_callback_t cb, FAR void *arg) +int max326_rtc_setalarm(FAR struct timespec *ts, + alm_callback_t cb, FAR void *arg) { irqstate_t flags; b32_t b32now; @@ -581,23 +583,23 @@ int max326_rtc_setalarm(FAR struct timespec *ts, alm_callback_t cb, FAR void *ar * has to be subtracted from 1 << 32. */ - if ((uint32_t)b32toi(b32delay) >= 16777216) - { - rssa = 0; - } - else - { - uint64_t tmp = ((b32delay >> (32 - 8)) & 0x00000000ffffffff); - if (tmp == 0) - { - rssa = UINT32_MAX; - } - else - { - tmp = 0x0000000100000000 - tmp; - rssa = (uint32_t)tmp; - } - } + if ((uint32_t)b32toi(b32delay) >= 16777216) + { + rssa = 0; + } + else + { + uint64_t tmp = ((b32delay >> (32 - 8)) & 0x00000000ffffffff); + if (tmp == 0) + { + rssa = UINT32_MAX; + } + else + { + tmp = 0x0000000100000000 - tmp; + rssa = (uint32_t)tmp; + } + } /* We need to disable ALARMs in order to write to the RSSA registers. */ @@ -691,18 +693,18 @@ int max326_rtc_rdalarm(FAR b32_t *ftime) * over to zero, that is (1 << 32) - RRSA. */ - if (rssa > 0) - { - b32delay = 0x0000000100000000 - (uint64_t)rssa; - b32delay = (b32delay & 0x00000000ffffffff) << (32 - 8); - } - else - { - b32delay = 0; - } - - *ftime = b32now + b32delay; - return OK; + if (rssa > 0) + { + b32delay = 0x0000000100000000 - (uint64_t)rssa; + b32delay = (b32delay & 0x00000000ffffffff) << (32 - 8); + } + else + { + b32delay = 0; + } + + *ftime = b32now + b32delay; + return OK; } #endif
