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The following commit(s) were added to refs/heads/master by this push:
new 7caebdd arch/risc-v: Fix stack alignment according to calling
convention
7caebdd is described below
commit 7caebdd50fcb13cd865579c044297e9865f191c5
Author: Gustavo Henrique Nihei <[email protected]>
AuthorDate: Tue Apr 27 10:48:00 2021 -0300
arch/risc-v: Fix stack alignment according to calling convention
The RISC-V Integer Calling Convention states that the stack pointer
shall always be aligned to a 128-bit boundary upon procedure entry, both
for RV32* and RV64* ISAs (exception to the RV32E ISA, which must follow a
specific convention)
---
arch/risc-v/src/bl602/bl602_head.S | 8 ++++----
arch/risc-v/src/c906/c906_head.S | 8 ++++----
arch/risc-v/src/common/riscv_createstack.c | 29 ++++++++++-------------------
arch/risc-v/src/common/riscv_stackframe.c | 13 +++----------
arch/risc-v/src/common/riscv_usestack.c | 28 ++++++++++------------------
arch/risc-v/src/esp32c3/esp32c3_interrupt.S | 8 ++++----
arch/risc-v/src/fe310/fe310_head.S | 8 ++++----
arch/risc-v/src/k210/k210_head.S | 12 ++++++------
arch/risc-v/src/litex/litex_head.S | 8 ++++----
arch/risc-v/src/rv32im/riscv_vfork.c | 4 ----
10 files changed, 49 insertions(+), 77 deletions(-)
diff --git a/arch/risc-v/src/bl602/bl602_head.S
b/arch/risc-v/src/bl602/bl602_head.S
index 040ac23..a1e870e 100644
--- a/arch/risc-v/src/bl602/bl602_head.S
+++ b/arch/risc-v/src/bl602/bl602_head.S
@@ -150,16 +150,16 @@ exception_common:
* Name: g_intstackalloc and g_intstacktop
************************************************************************************/
-#if CONFIG_ARCH_INTERRUPTSTACK > 3
+#if CONFIG_ARCH_INTERRUPTSTACK > 15
.bss
- .align 4
+ .balign 16
.global g_intstackalloc
.global g_intstacktop
.type g_intstackalloc, object
.type g_intstacktop, object
g_intstackalloc:
- .skip (CONFIG_ARCH_INTERRUPTSTACK & ~3)
+ .skip ((CONFIG_ARCH_INTERRUPTSTACK + 8) & ~15)
g_intstacktop:
.size g_intstacktop, 0
- .size g_intstackalloc, (CONFIG_ARCH_INTERRUPTSTACK & ~3)
+ .size g_intstackalloc, (CONFIG_ARCH_INTERRUPTSTACK & ~15)
#endif
diff --git a/arch/risc-v/src/c906/c906_head.S b/arch/risc-v/src/c906/c906_head.S
index e0db739..f183286 100644
--- a/arch/risc-v/src/c906/c906_head.S
+++ b/arch/risc-v/src/c906/c906_head.S
@@ -264,16 +264,16 @@ exception_common:
* Name: g_intstackalloc and g_intstacktop
************************************************************************************/
-#if CONFIG_ARCH_INTERRUPTSTACK > 7
+#if CONFIG_ARCH_INTERRUPTSTACK > 15
.bss
- .align 8
+ .balign 16
.global g_intstackalloc
.global g_intstacktop
.type g_intstackalloc, object
.type g_intstacktop, object
g_intstackalloc:
- .skip ((CONFIG_ARCH_INTERRUPTSTACK + 4) & ~7)
+ .skip ((CONFIG_ARCH_INTERRUPTSTACK + 8) & ~15)
g_intstacktop:
.size g_intstacktop, 0
- .size g_intstackalloc, (CONFIG_ARCH_INTERRUPTSTACK & ~7)
+ .size g_intstackalloc, (CONFIG_ARCH_INTERRUPTSTACK & ~15)
#endif
diff --git a/arch/risc-v/src/common/riscv_createstack.c
b/arch/risc-v/src/common/riscv_createstack.c
index 2086b85..f41919b 100644
--- a/arch/risc-v/src/common/riscv_createstack.c
+++ b/arch/risc-v/src/common/riscv_createstack.c
@@ -42,20 +42,13 @@
* Pre-processor Macros
****************************************************************************/
-/* RISC-V requires at least a 4-byte stack alignment.
- * For floating point use, however, the stack must be aligned to 8-byte
- * addresses.
- */
-
-#if defined(CONFIG_LIBC_FLOATINGPOINT) || defined (CONFIG_ARCH_RV64GC)
-# define STACK_ALIGNMENT 8
-#else
-# define STACK_ALIGNMENT 4
-#endif
+/* RISC-V requires a 16-byte stack alignment. */
+
+#define STACK_ALIGNMENT 16
/* Stack alignment macros */
-#define STACK_ALIGN_MASK (STACK_ALIGNMENT-1)
+#define STACK_ALIGN_MASK (STACK_ALIGNMENT - 1)
#define STACK_ALIGN_DOWN(a) ((a) & ~STACK_ALIGN_MASK)
#define STACK_ALIGN_UP(a) (((a) + STACK_ALIGN_MASK) & ~STACK_ALIGN_MASK)
@@ -193,18 +186,16 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t
stack_size, uint8_t ttype)
uintptr_t top_of_stack;
size_t size_of_stack;
- /* RISCV uses a push-down stack: the stack grows toward lower
- * addresses in memory. The stack pointer register points to the
- * lowest, valid working address (the "top" of the stack). Items on
- * the stack are referenced as positive word offsets from sp.
+ /* RISC-V uses a push-down stack: the stack grows toward lower
+ * addresses in memory. The stack pointer register points to the
+ * lowest, valid working address (the "top" of the stack). Items on
+ * the stack are referenced as positive word offsets from SP.
*/
top_of_stack = (uintptr_t)tcb->stack_alloc_ptr + stack_size;
- /* The RISC-V stack must be aligned at word (4 byte) boundaries; for
- * floating point use, the stack must be aligned to 8-byte addresses.
- * If necessary top_of_stack must be rounded down to the next
- * boundary to meet these alignment requirements.
+ /* The RISC-V stack must be aligned at 128-bit (16-byte) boundaries.
+ * If necessary top_of_stack must be rounded down to the next boundary.
*/
top_of_stack = STACK_ALIGN_DOWN(top_of_stack);
diff --git a/arch/risc-v/src/common/riscv_stackframe.c
b/arch/risc-v/src/common/riscv_stackframe.c
index 5b4b7f3..ec6023f 100644
--- a/arch/risc-v/src/common/riscv_stackframe.c
+++ b/arch/risc-v/src/common/riscv_stackframe.c
@@ -37,20 +37,13 @@
* Pre-processor Macros
****************************************************************************/
-/* RISC-V requires at least a 4-byte stack alignment.
- * For floating point use, however, the stack must be aligned to 8-byte
- * addresses.
- */
+/* RISC-V requires a 16-byte stack alignment. */
-#if defined(CONFIG_LIBC_FLOATINGPOINT) || defined (CONFIG_ARCH_RV64GC)
-# define STACK_ALIGNMENT 8
-#else
-# define STACK_ALIGNMENT 4
-#endif
+#define STACK_ALIGNMENT 16
/* Stack alignment macros */
-#define STACK_ALIGN_MASK (STACK_ALIGNMENT-1)
+#define STACK_ALIGN_MASK (STACK_ALIGNMENT - 1)
#define STACK_ALIGN_DOWN(a) ((a) & ~STACK_ALIGN_MASK)
#define STACK_ALIGN_UP(a) (((a) + STACK_ALIGN_MASK) & ~STACK_ALIGN_MASK)
diff --git a/arch/risc-v/src/common/riscv_usestack.c
b/arch/risc-v/src/common/riscv_usestack.c
index d6debd5..68b2a89 100644
--- a/arch/risc-v/src/common/riscv_usestack.c
+++ b/arch/risc-v/src/common/riscv_usestack.c
@@ -39,20 +39,13 @@
* Pre-processor Definitions
****************************************************************************/
-/* RISC-V requires at least a 4-byte stack alignment.
- * For floating point use, however, the stack must be aligned to 8-byte
- * addresses.
- */
-
-#if defined(CONFIG_LIBC_FLOATINGPOINT) || defined (CONFIG_ARCH_RV64GC)
-# define STACK_ALIGNMENT 8
-#else
-# define STACK_ALIGNMENT 4
-#endif
+/* RISC-V requires a 16-byte stack alignment. */
+
+#define STACK_ALIGNMENT 16
/* Stack alignment macros */
-#define STACK_ALIGN_MASK (STACK_ALIGNMENT-1)
+#define STACK_ALIGN_MASK (STACK_ALIGNMENT - 1)
#define STACK_ALIGN_DOWN(a) ((a) & ~STACK_ALIGN_MASK)
#define STACK_ALIGN_UP(a) (((a) + STACK_ALIGN_MASK) & ~STACK_ALIGN_MASK)
@@ -112,17 +105,16 @@ int up_use_stack(FAR struct tcb_s *tcb, FAR void *stack,
size_t stack_size)
tcb->stack_alloc_ptr = stack;
- /* RISC-V uses a push-down stack: the stack grows toward loweraddresses in
- * memory. The stack pointer register, points to the lowest, valid work
- * address (the "top" of the stack). Items on the stack are referenced
- * as positive word offsets from sp.
+ /* RISC-V uses a push-down stack: the stack grows toward lower addresses in
+ * memory. The stack pointer register, points to the lowest, valid work
+ * address (the "top" of the stack). Items on the stack are referenced
+ * as positive word offsets from SP.
*/
top_of_stack = (uintptr_t)tcb->stack_alloc_ptr + stack_size;
- /* The RISC-V stack must be aligned at word (4 byte) or double word
- * (8 byte) boundaries. If necessary top_of_stack must be rounded down to
- * the next boundary.
+ /* The RISC-V stack must be aligned at 128-bit (16-byte) boundaries.
+ * If necessary top_of_stack must be rounded down to the next boundary.
*/
top_of_stack = STACK_ALIGN_DOWN(top_of_stack);
diff --git a/arch/risc-v/src/esp32c3/esp32c3_interrupt.S
b/arch/risc-v/src/esp32c3/esp32c3_interrupt.S
index fcd3e1e..eedf93a 100644
--- a/arch/risc-v/src/esp32c3/esp32c3_interrupt.S
+++ b/arch/risc-v/src/esp32c3/esp32c3_interrupt.S
@@ -42,14 +42,14 @@
.section .noinit
-#if CONFIG_ARCH_INTERRUPTSTACK > 3
- .align 4
+#if CONFIG_ARCH_INTERRUPTSTACK > 15
+ .balign 16
.type g_intstackalloc, @object
.type g_intstacktop, @object
g_intstackalloc:
- .skip (CONFIG_ARCH_INTERRUPTSTACK & ~3)
+ .skip ((CONFIG_ARCH_INTERRUPTSTACK + 8) & ~15)
g_intstacktop:
- .size g_intstackalloc, (CONFIG_ARCH_INTERRUPTSTACK & ~3)
+ .size g_intstackalloc, (CONFIG_ARCH_INTERRUPTSTACK & ~15)
#endif
/****************************************************************************
diff --git a/arch/risc-v/src/fe310/fe310_head.S
b/arch/risc-v/src/fe310/fe310_head.S
index 53790f7..642f338 100644
--- a/arch/risc-v/src/fe310/fe310_head.S
+++ b/arch/risc-v/src/fe310/fe310_head.S
@@ -201,16 +201,16 @@ exception_common:
* Name: g_intstackalloc and g_intstacktop
************************************************************************************/
-#if CONFIG_ARCH_INTERRUPTSTACK > 3
+#if CONFIG_ARCH_INTERRUPTSTACK > 15
.bss
- .align 4
+ .balign 16
.global g_intstackalloc
.global g_intstacktop
.type g_intstackalloc, object
.type g_intstacktop, object
g_intstackalloc:
- .skip (CONFIG_ARCH_INTERRUPTSTACK & ~3)
+ .skip ((CONFIG_ARCH_INTERRUPTSTACK + 8) & ~15)
g_intstacktop:
.size g_intstacktop, 0
- .size g_intstackalloc, (CONFIG_ARCH_INTERRUPTSTACK & ~3)
+ .size g_intstackalloc, (CONFIG_ARCH_INTERRUPTSTACK & ~15)
#endif
diff --git a/arch/risc-v/src/k210/k210_head.S b/arch/risc-v/src/k210/k210_head.S
index e05bee4..f5bdc32 100644
--- a/arch/risc-v/src/k210/k210_head.S
+++ b/arch/risc-v/src/k210/k210_head.S
@@ -242,24 +242,24 @@ normal_irq:
* Name: g_intstackalloc and g_intstacktop
************************************************************************************/
-#if CONFIG_ARCH_INTERRUPTSTACK > 7
+#if CONFIG_ARCH_INTERRUPTSTACK > 15
.bss
- .align 8
+ .balign 16
.global g_intstackalloc
.global g_intstacktop
.type g_intstackalloc, object
.type g_intstacktop, object
g_intstackalloc:
#ifndef CONFIG_SMP
- .skip ((CONFIG_ARCH_INTERRUPTSTACK + 4) & ~7)
+ .skip ((CONFIG_ARCH_INTERRUPTSTACK + 8) & ~15)
#else
- .skip (((CONFIG_ARCH_INTERRUPTSTACK * CONFIG_SMP_NCPUS) + 4) & ~7)
+ .skip (((CONFIG_ARCH_INTERRUPTSTACK * CONFIG_SMP_NCPUS) + 8) & ~15)
#endif
g_intstacktop:
.size g_intstacktop, 0
#ifndef CONFIG_SMP
- .size g_intstackalloc, (CONFIG_ARCH_INTERRUPTSTACK & ~7)
+ .size g_intstackalloc, (CONFIG_ARCH_INTERRUPTSTACK & ~15)
#else
- .size g_intstackalloc, ((CONFIG_ARCH_INTERRUPTSTACK * CONFIG_SMP_NCPUS) &
~7)
+ .size g_intstackalloc, ((CONFIG_ARCH_INTERRUPTSTACK * CONFIG_SMP_NCPUS) &
~15)
#endif
#endif
diff --git a/arch/risc-v/src/litex/litex_head.S
b/arch/risc-v/src/litex/litex_head.S
index 7012f07..c44e989 100644
--- a/arch/risc-v/src/litex/litex_head.S
+++ b/arch/risc-v/src/litex/litex_head.S
@@ -188,16 +188,16 @@ exception_common:
* Name: g_intstackalloc and g_intstacktop
************************************************************************************/
-#if CONFIG_ARCH_INTERRUPTSTACK > 3
+#if CONFIG_ARCH_INTERRUPTSTACK > 15
.bss
- .align 4
+ .balign 16
.global g_intstackalloc
.global g_intstacktop
.type g_intstackalloc, object
.type g_intstacktop, object
g_intstackalloc:
- .skip (CONFIG_ARCH_INTERRUPTSTACK & ~3)
+ .skip ((CONFIG_ARCH_INTERRUPTSTACK + 8) & ~15)
g_intstacktop:
.size g_intstacktop, 0
- .size g_intstackalloc, (CONFIG_ARCH_INTERRUPTSTACK & ~3)
+ .size g_intstackalloc, (CONFIG_ARCH_INTERRUPTSTACK & ~15)
#endif
diff --git a/arch/risc-v/src/rv32im/riscv_vfork.c
b/arch/risc-v/src/rv32im/riscv_vfork.c
index bb390fa..29e091b 100644
--- a/arch/risc-v/src/rv32im/riscv_vfork.c
+++ b/arch/risc-v/src/rv32im/riscv_vfork.c
@@ -41,10 +41,6 @@
* Pre-processor Definitions
****************************************************************************/
-#ifndef CONFIG_STACK_ALIGNMENT
-# define CONFIG_STACK_ALIGNMENT 4
-#endif
-
/****************************************************************************
* Private Functions
****************************************************************************/
