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commit e9f630ecb5d34f20d58a26609f5de9dc16ecf6a9 Author: Xiang Xiao <[email protected]> AuthorDate: Sun Oct 30 01:26:11 2022 +0800 Fix clang compiler warning in boards/arm/stm32/ Error: board/stm32_ssd1289.c:290:33: error: shifting a negative signed value is undefined [-Werror,-Wshift-negative-value] putreg32(FSMC_BTR_ADDSET(5) | FSMC_BTR_ADDHLD(0) | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~ /github/workspace/sources/nuttx/arch/arm/src/chip/hardware/stm32_fsmc.h:164:42: note: expanded from macro 'FSMC_BTR_ADDHLD' ^ /github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:135:54: note: expanded from macro 'putreg32' ^ Error: board/stm32_ssd1289.c:291:33: error: shifting a negative signed value is undefined [-Werror,-Wshift-negative-value] FSMC_BTR_DATAST(9) | FSMC_BTR_BUSTURN(0) | ~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~ /github/workspace/sources/nuttx/arch/arm/src/chip/hardware/stm32_fsmc.h:172:42: note: expanded from macro 'FSMC_BTR_BUSTURN' ^ /github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:135:54: note: expanded from macro 'putreg32' ^ Error: board/stm32_ssd1289.c:292:12: error: shifting a negative signed value is undefined [-Werror,-Wshift-negative-value] FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ /github/workspace/sources/nuttx/arch/arm/src/chip/hardware/stm32_fsmc.h:176:42: note: expanded from macro 'FSMC_BTR_CLKDIV' ^ /github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:135:54: note: expanded from macro 'putreg32' ^ Error: board/stm32_ssd1289.c:292:33: error: shifting a negative signed value is undefined [-Werror,-Wshift-negative-value] FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) | ~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~ /github/workspace/sources/nuttx/arch/arm/src/chip/hardware/stm32_fsmc.h:180:42: note: expanded from macro 'FSMC_BTR_DATLAT' ^ /github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:135:54: note: expanded from macro 'putreg32' ^ Signed-off-by: Xiang Xiao <[email protected]> --- boards/arm/stm32/fire-stm32v2/src/stm32_selectlcd.c | 2 +- boards/arm/stm32/hymini-stm32v/src/stm32_r61505u.c | 2 +- boards/arm/stm32/hymini-stm32v/src/stm32_ssd1289.c | 2 +- boards/arm/stm32/stm3210e-eval/src/stm32_selectlcd.c | 2 +- boards/arm/stm32/stm3220g-eval/src/stm32_selectlcd.c | 6 +++--- boards/arm/stm32/stm3240g-eval/src/stm32_selectlcd.c | 6 +++--- boards/arm/stm32/stm32f4discovery/src/stm32_ssd1289.c | 6 +++--- boards/arm/stm32/viewtool-stm32f107/src/stm32_ssd1289.c | 2 +- 8 files changed, 14 insertions(+), 14 deletions(-) diff --git a/boards/arm/stm32/fire-stm32v2/src/stm32_selectlcd.c b/boards/arm/stm32/fire-stm32v2/src/stm32_selectlcd.c index 5c6af94819..6a385dcf0c 100644 --- a/boards/arm/stm32/fire-stm32v2/src/stm32_selectlcd.c +++ b/boards/arm/stm32/fire-stm32v2/src/stm32_selectlcd.c @@ -165,7 +165,7 @@ void stm32_selectlcd(void) putreg32(FSMC_BTR_ADDSET(1) | FSMC_BTR_ADDHLD(0) | FSMC_BTR_DATAST(2) | FSMC_BTR_BUSTURN(0) | - FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) | + FSMC_BTR_CLKDIV(1) | FSMC_BTR_DATLAT(2) | FSMC_BTR_ACCMODA, STM32_FSMC_BTR1); putreg32(0xffffffff, STM32_FSMC_BWTR4); diff --git a/boards/arm/stm32/hymini-stm32v/src/stm32_r61505u.c b/boards/arm/stm32/hymini-stm32v/src/stm32_r61505u.c index c89d49748e..f034f124c0 100644 --- a/boards/arm/stm32/hymini-stm32v/src/stm32_r61505u.c +++ b/boards/arm/stm32/hymini-stm32v/src/stm32_r61505u.c @@ -296,7 +296,7 @@ static void stm32_selectlcd(void) /* Bank1 NOR/SRAM timing register configuration */ putreg32(FSMC_BTR_ADDSET(2) | FSMC_BTR_ADDHLD(0) | FSMC_BTR_DATAST(2) | - FSMC_BTR_BUSTURN(0) | FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) | + FSMC_BTR_BUSTURN(0) | FSMC_BTR_CLKDIV(1) | FSMC_BTR_DATLAT(2) | FSMC_BTR_ACCMODA, STM32_FSMC_BTR1); diff --git a/boards/arm/stm32/hymini-stm32v/src/stm32_ssd1289.c b/boards/arm/stm32/hymini-stm32v/src/stm32_ssd1289.c index 9ef75ac701..46875308cf 100644 --- a/boards/arm/stm32/hymini-stm32v/src/stm32_ssd1289.c +++ b/boards/arm/stm32/hymini-stm32v/src/stm32_ssd1289.c @@ -375,7 +375,7 @@ static void stm32_selectlcd(void) /* Bank1 NOR/SRAM timing register configuration */ putreg32(FSMC_BTR_ADDSET(1) | FSMC_BTR_ADDHLD(0) | FSMC_BTR_DATAST(2) | - FSMC_BTR_BUSTURN(0) | FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) | + FSMC_BTR_BUSTURN(0) | FSMC_BTR_CLKDIV(1) | FSMC_BTR_DATLAT(2) | FSMC_BTR_ACCMODA, STM32_FSMC_BTR1); diff --git a/boards/arm/stm32/stm3210e-eval/src/stm32_selectlcd.c b/boards/arm/stm32/stm3210e-eval/src/stm32_selectlcd.c index 5db4ecc61f..ad62481973 100644 --- a/boards/arm/stm32/stm3210e-eval/src/stm32_selectlcd.c +++ b/boards/arm/stm32/stm3210e-eval/src/stm32_selectlcd.c @@ -117,7 +117,7 @@ void stm32_selectlcd(void) putreg32(FSMC_BTR_ADDSET(1) | FSMC_BTR_ADDHLD(0) | FSMC_BTR_DATAST(2) | FSMC_BTR_BUSTURN(0) | - FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) | + FSMC_BTR_CLKDIV(1) | FSMC_BTR_DATLAT(2) | FSMC_BTR_ACCMODA, STM32_FSMC_BTR4); putreg32(0xffffffff, STM32_FSMC_BWTR4); diff --git a/boards/arm/stm32/stm3220g-eval/src/stm32_selectlcd.c b/boards/arm/stm32/stm3220g-eval/src/stm32_selectlcd.c index 92bfc0c6d6..3af64fdc59 100644 --- a/boards/arm/stm32/stm3220g-eval/src/stm32_selectlcd.c +++ b/boards/arm/stm32/stm3220g-eval/src/stm32_selectlcd.c @@ -136,9 +136,9 @@ void stm32_selectlcd(void) /* Bank3 NOR/SRAM timing register configuration */ - putreg32(FSMC_BTR_ADDSET(5) | FSMC_BTR_ADDHLD(0) | - FSMC_BTR_DATAST(9) | FSMC_BTR_BUSTURN(0) | - FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) | + putreg32(FSMC_BTR_ADDSET(5) | FSMC_BTR_ADDHLD(1) | + FSMC_BTR_DATAST(9) | FSMC_BTR_BUSTURN(1) | + FSMC_BTR_CLKDIV(1) | FSMC_BTR_DATLAT(2) | FSMC_BTR_ACCMODA, STM32_FSMC_BTR3); putreg32(0xffffffff, STM32_FSMC_BWTR3); diff --git a/boards/arm/stm32/stm3240g-eval/src/stm32_selectlcd.c b/boards/arm/stm32/stm3240g-eval/src/stm32_selectlcd.c index 23c1f085e3..b33852077d 100644 --- a/boards/arm/stm32/stm3240g-eval/src/stm32_selectlcd.c +++ b/boards/arm/stm32/stm3240g-eval/src/stm32_selectlcd.c @@ -136,9 +136,9 @@ void stm32_selectlcd(void) /* Bank3 NOR/SRAM timing register configuration */ - putreg32(FSMC_BTR_ADDSET(5) | FSMC_BTR_ADDHLD(0) | - FSMC_BTR_DATAST(9) | FSMC_BTR_BUSTURN(0) | - FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) | + putreg32(FSMC_BTR_ADDSET(5) | FSMC_BTR_ADDHLD(1) | + FSMC_BTR_DATAST(9) | FSMC_BTR_BUSTURN(1) | + FSMC_BTR_CLKDIV(1) | FSMC_BTR_DATLAT(2) | FSMC_BTR_ACCMODA, STM32_FSMC_BTR3); putreg32(0xffffffff, STM32_FSMC_BWTR3); diff --git a/boards/arm/stm32/stm32f4discovery/src/stm32_ssd1289.c b/boards/arm/stm32/stm32f4discovery/src/stm32_ssd1289.c index c436e24183..7d8623e50c 100644 --- a/boards/arm/stm32/stm32f4discovery/src/stm32_ssd1289.c +++ b/boards/arm/stm32/stm32f4discovery/src/stm32_ssd1289.c @@ -287,9 +287,9 @@ void stm32_selectlcd(void) /* Bank1 NOR/SRAM timing register configuration */ - putreg32(FSMC_BTR_ADDSET(5) | FSMC_BTR_ADDHLD(0) | - FSMC_BTR_DATAST(9) | FSMC_BTR_BUSTURN(0) | - FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) | + putreg32(FSMC_BTR_ADDSET(5) | FSMC_BTR_ADDHLD(1) | + FSMC_BTR_DATAST(9) | FSMC_BTR_BUSTURN(1) | + FSMC_BTR_CLKDIV(1) | FSMC_BTR_DATLAT(2) | FSMC_BTR_ACCMODA, STM32_FSMC_BTR1); putreg32(0xffffffff, STM32_FSMC_BWTR1); diff --git a/boards/arm/stm32/viewtool-stm32f107/src/stm32_ssd1289.c b/boards/arm/stm32/viewtool-stm32f107/src/stm32_ssd1289.c index ffb940a558..6732cd6555 100644 --- a/boards/arm/stm32/viewtool-stm32f107/src/stm32_ssd1289.c +++ b/boards/arm/stm32/viewtool-stm32f107/src/stm32_ssd1289.c @@ -445,7 +445,7 @@ static void stm32_selectlcd(void) putreg32( FSMC_BTR_ADDSET(1) | FSMC_BTR_ADDHLD(0) | FSMC_BTR_DATAST(2) | FSMC_BTR_BUSTURN(0) | - FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) | + FSMC_BTR_CLKDIV(1) | FSMC_BTR_DATLAT(2) | FSMC_BTR_ACCMODA, STM32_FSMC_BTR1);
