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The following commit(s) were added to refs/heads/master by this push: new c655870b22 boards/esp32s3: Link stack checking function and data to SRAM when enable flash or PSRAM driver c655870b22 is described below commit c655870b22736e53982efdd4f8c8f8c919ed8320 Author: Dong Heng <dongh...@espressif.com> AuthorDate: Tue Oct 17 10:11:12 2023 +0800 boards/esp32s3: Link stack checking function and data to SRAM when enable flash or PSRAM driver During PSRAM initialization and flash operations, the Cache needs to be disabled. So all data and code for the aforementioned scope is required to be placed in Internal RAM. --- boards/xtensa/esp32s3/common/scripts/legacy_sections.ld | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/boards/xtensa/esp32s3/common/scripts/legacy_sections.ld b/boards/xtensa/esp32s3/common/scripts/legacy_sections.ld index a6690168bb..22ebcdbcd8 100644 --- a/boards/xtensa/esp32s3/common/scripts/legacy_sections.ld +++ b/boards/xtensa/esp32s3/common/scripts/legacy_sections.ld @@ -131,6 +131,12 @@ SECTIONS #ifdef CONFIG_ESP32S3_SPIRAM_MODE_OCT *libarch.a:esp32s3_psram_octal.*(.literal .text .literal.* .text.*) #endif +#if defined(CONFIG_STACK_CANARIES) && \ + (defined(CONFIG_ESP32S3_SPIFLASH) || \ + defined(CONFIG_ESP32S3_SPIRAM)) + *libc.a:lib_stackchk.*(.literal .text .literal.* .text.*) +#endif + *(.wifirxiram .wifirxiram.*) *(.wifi0iram .wifi0iram.*) *(.wifiorslpiram .wifiorslpiram.*) @@ -214,6 +220,11 @@ SECTIONS *libphy.a:(.rodata .rodata.*) *libarch.a:xtensa_context.*(.rodata .rodata.*) +#if defined(CONFIG_STACK_CANARIES) && \ + (defined(CONFIG_ESP32S3_SPIFLASH) || \ + defined(CONFIG_ESP32S3_SPIRAM)) + *libc.a:lib_stackchk.*(.rodata .rodata.*) +#endif _edata = ABSOLUTE(.); . = ALIGN(4);