This is an automated email from the ASF dual-hosted git repository.
tqchen pushed a change to branch tvm-buffer-type-var-refactor
in repository https://gitbox.apache.org/repos/asf/tvm.git
omit 60ed387ecc [FIX][TIRX] Repair typed-buffer CI regressions
omit 6c825ec173 [FIX][TIRX] Preserve behavior after typed-buffer migration
omit 0028169c6d [REFACTOR][TIRX] Represent buffers as typed variables
add 62fb780bb0 [FIX][TIRx] Use cluster arrivals for remote mbarrier views
(#20074)
add ae99c3fd92 [TVMSCRIPT][TIRx] Preserve parser source spans in IR
(#20073)
add 5a16c7befa [FIX][TIRx] Make TilePrimitiveCall serializable (#20071)
add 05c487d69a [FIX][TIRx] Preserve pointer expression types (#20070)
add 0fbc04baeb [FIX][TIRx] Remap buffers consistently in ConvertSSA
(#20069)
add 58b71d78cf [FIX][TIRx][CUDA] Fix tcgen05 register fragment layouts
(#20068)
add 115029b3ab [FIX][TIRx] Constant-fold copy slice extents (#20067)
add 341f070a74 [REFACTOR][TIRX] Represent buffers as typed variables
add c112cf9fed [FIX][TIRX] Preserve behavior after typed-buffer migration
add 8c82011301 [FIX][TIRX] Repair typed-buffer CI regressions
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Summary of changes:
docs/tirx/layout.rst | 31 ++++
docs/tirx/native_basics/cuda/buffers.rst | 10 +-
docs/tirx/native_basics/cuda/data_types.rst | 15 +-
.../tile_primitives/copy_async/tcgen05_ldst.rst | 57 ++++++--
include/tvm/script/ir_builder/base.h | 10 ++
include/tvm/tirx/tirx_stmt.h | 2 +
python/tvm/backend/cuda/lang/alloc_pool.py | 7 +
python/tvm/backend/cuda/lang/pipeline.py | 73 +++++++---
python/tvm/backend/cuda/op.py | 2 +-
.../cuda/operator/tile_primitive/copy/_common.py | 6 +-
.../tile_primitive/copy_async/tcgen05_ldst.py | 75 ++++++----
.../cuda/operator/tile_primitive/copy_async/tma.py | 2 +-
python/tvm/script/ir_builder/base.py | 29 ++++
python/tvm/script/parser/core/diagnostics.py | 35 +++--
python/tvm/script/parser/core/evaluator.py | 19 ++-
python/tvm/script/parser/core/parser.py | 27 +++-
python/tvm/tirx/layout.py | 32 ++++-
python/tvm/tirx/op.py | 35 +++--
python/tvm/tirx/script/parser/parser.py | 11 +-
src/script/ir_builder/base.cc | 85 +++++++++++
src/tirx/script/builder/utils.h | 4 +
src/tirx/transform/ir_utils.cc | 59 ++++++--
tests/python/tirx-base/test_tir_op_types.py | 10 ++
.../test_tir_transform_convert_ssa.py | 29 ++++
.../python/tirx/codegen/test_codegen_blackwell.py | 156 +++++++++++++++++++++
tests/python/tirx/codegen/test_codegen_dsmem.py | 48 +++++++
.../tile_primitive/cuda/copy_async/test_tma.py | 14 ++
.../cuda/copy_async/test_tmem_16xnb.py | 136 +++++++++++++++++-
.../tile_primitive/cuda/elementwise/test_binary.py | 37 ++++-
tests/python/tirx/test_layout.py | 11 ++
tests/python/tirx/test_op.py | 31 +++-
tests/python/tirx/test_parser_printer.py | 55 ++++++++
.../tvmscript/test_tvmscript_ir_builder_tir.py | 14 +-
.../tvmscript/test_tvmscript_parser_source.py | 126 +++++++++++++++++
34 files changed, 1181 insertions(+), 112 deletions(-)
