This is an automated email from the ASF dual-hosted git repository. tqchen pushed a commit to branch tirx-standalone-root in repository https://gitbox.apache.org/repos/asf/tvm.git
commit 8a10be0a14b770909c29fa93613fef769fffe599 Author: Tianqi Chen <[email protected]> AuthorDate: Fri Oct 16 15:36:20 2026 -0400 [TIRx] Clarify overload sets, leaf ownership, and terminal throws (#20765) TIRx visitors and code generators intentionally override only part of their base overload sets. Expose the remaining overloads and mark the private analyzer implementations as leaf types. Make terminal FFI throw paths explicit so MSVC can recognize that those paths cannot return. This preserves the existing dispatch and exception behavior while addressing the focused Clang and MSVC warnings. --- tirx/include/tvm/ir/transform.h | 1 + tirx/include/tvm/script/printer/doc_translator.h | 1 + tirx/src/backend/cuda/codegen/codegen_cuda_host.cc | 2 ++ tirx/src/backend/cuda/transforms/bind_backend_config.cc | 2 ++ tirx/src/backend/cuda/transforms/lower_iket.cc | 4 ++++ tirx/src/codegen/c/codegen_c.h | 1 + tirx/src/codegen/llvm/codegen_cpu.cc | 1 + tirx/src/codegen/llvm/codegen_llvm.h | 1 + tirx/src/codegen/llvm/codegen_x86_64.cc | 2 ++ tirx/src/ir/prim/math.cc | 1 + tirx/src/ir/prim/op.cc | 2 ++ tirx/src/sym/const_int_bound.cc | 2 +- tirx/src/sym/modular_set.cc | 3 ++- tirx/src/sym/z3_prover.cc | 2 +- tirx/src/tirx/analysis/check_well_formed.cc | 1 + tirx/src/tirx/transform/narrow_datatype.cc | 2 ++ tirx/src/tirx/transform/vectorize_loop.cc | 4 ++++ 17 files changed, 29 insertions(+), 3 deletions(-) diff --git a/tirx/include/tvm/ir/transform.h b/tirx/include/tvm/ir/transform.h index b08c6d8d4f..0d7763e677 100644 --- a/tirx/include/tvm/ir/transform.h +++ b/tirx/include/tvm/ir/transform.h @@ -177,6 +177,7 @@ class PassContext : public ffi::ObjectRef { TVM_FFI_THROW(AttributeError) << "Expect config " << key << " to have type " << type_str << ", but instead get " << ffi::details::AnyUnsafe::GetMismatchTypeInfo<ValueType>(value); + TVM_FFI_UNREACHABLE(); } else { return *opt_val; } diff --git a/tirx/include/tvm/script/printer/doc_translator.h b/tirx/include/tvm/script/printer/doc_translator.h index 283fa81d55..202c85938b 100644 --- a/tirx/include/tvm/script/printer/doc_translator.h +++ b/tirx/include/tvm/script/printer/doc_translator.h @@ -477,6 +477,7 @@ inline ffi::Optional<ExprDoc> DocTranslatorObj::DefaultTranslate(ffi::AnyView va ? std::string("printer has no Doc hook for ") + value.GetTypeKey() : "printer Doc hook must be a native pointer or ffi.Function"); + TVM_FFI_UNREACHABLE(); } } // namespace printer diff --git a/tirx/src/backend/cuda/codegen/codegen_cuda_host.cc b/tirx/src/backend/cuda/codegen/codegen_cuda_host.cc index 6103dfffe9..968061a9fc 100644 --- a/tirx/src/backend/cuda/codegen/codegen_cuda_host.cc +++ b/tirx/src/backend/cuda/codegen/codegen_cuda_host.cc @@ -47,6 +47,8 @@ namespace codegen { class CodeGenCUDAHost : public CodeGenCHost { public: + using CodeGenCHost::Dispatch_; + void Init(Target target) { CodeGenCHost::Init(false, true, true, target->str(), {}); // Retain C-host wrapper initialization, with an FFI/CUDA-only prelude. diff --git a/tirx/src/backend/cuda/transforms/bind_backend_config.cc b/tirx/src/backend/cuda/transforms/bind_backend_config.cc index 3534825f5f..4acc81980e 100644 --- a/tirx/src/backend/cuda/transforms/bind_backend_config.cc +++ b/tirx/src/backend/cuda/transforms/bind_backend_config.cc @@ -112,6 +112,8 @@ class DeviceHelperSpecializer : public StmtExprMutator { std::unordered_set<const GlobalVarNode*> originals; private: + using StmtExprMutator::Mutate_; + UnchangedOr<Stmt> Mutate_(const RegionStmtNode* op, InplaceMode inplace_mode) final { if (op->op->name != "tirx.device_entry") { return StmtExprMutator::Mutate_(op, inplace_mode); diff --git a/tirx/src/backend/cuda/transforms/lower_iket.cc b/tirx/src/backend/cuda/transforms/lower_iket.cc index b65be5d52a..b51dabc7fe 100644 --- a/tirx/src/backend/cuda/transforms/lower_iket.cc +++ b/tirx/src/backend/cuda/transforms/lower_iket.cc @@ -577,6 +577,8 @@ class StripIket : public StmtExprMutator { explicit StripIket(TokenTensorSet token_tensors) : token_tensors_(std::move(token_tensors)) {} private: + using StmtExprMutator::Mutate_; + UnchangedOr<Stmt> Mutate_(const BindNode* alloc, InplaceMode inplace_mode) final { if (const auto* call = alloc->value.as<CallNode>(); call && call->op.same_as(tirx::alloc_tensor_op()) && @@ -1083,6 +1085,8 @@ class InstrumentOfficialKernel : public StmtExprMutator { } private: + using StmtExprMutator::Mutate_; + const Declaration& Lookup(DeclarationKind kind, const CallNode* call) const { DeclarationKey key{kind, GetName(call)}; auto it = info_.declarations.find(key); diff --git a/tirx/src/codegen/c/codegen_c.h b/tirx/src/codegen/c/codegen_c.h index 9732a57323..68a97e54a5 100644 --- a/tirx/src/codegen/c/codegen_c.h +++ b/tirx/src/codegen/c/codegen_c.h @@ -64,6 +64,7 @@ class CodeGenC : public tvm::ExprFunctor<void(const Expr&, std::ostream&)>, public CodeGenSourceBase { public: using tvm::ExprFunctor<void(const Expr&, std::ostream&)>::Dispatch; + using tvm::ExprFunctor<void(const Expr&, std::ostream&)>::Dispatch_; using StmtFunctor::Dispatch; /*! diff --git a/tirx/src/codegen/llvm/codegen_cpu.cc b/tirx/src/codegen/llvm/codegen_cpu.cc index 98cd256969..60688548cd 100644 --- a/tirx/src/codegen/llvm/codegen_cpu.cc +++ b/tirx/src/codegen/llvm/codegen_cpu.cc @@ -411,6 +411,7 @@ CodeGenLLVM::TypedPointer CodeGenCPU::CreateStructRefPtr(Type type, llvm::Value* } default: TVM_FFI_THROW(InternalError) << "unknown field code"; + TVM_FFI_UNREACHABLE(); } } diff --git a/tirx/src/codegen/llvm/codegen_llvm.h b/tirx/src/codegen/llvm/codegen_llvm.h index 0cfc685db2..f9bdbf8e00 100644 --- a/tirx/src/codegen/llvm/codegen_llvm.h +++ b/tirx/src/codegen/llvm/codegen_llvm.h @@ -95,6 +95,7 @@ class CodeGenLLVM : public tvm::ExprFunctor<llvm::Value*(const Expr&)>, public StmtFunctor<void(const Stmt&)> { public: using tvm::ExprFunctor<llvm::Value*(const Expr&)>::Dispatch; + using tvm::ExprFunctor<llvm::Value*(const Expr&)>::Dispatch_; using StmtFunctor::Dispatch; CodeGenLLVM(); // Do not make it default here. diff --git a/tirx/src/codegen/llvm/codegen_x86_64.cc b/tirx/src/codegen/llvm/codegen_x86_64.cc index b929823d03..e638a725be 100644 --- a/tirx/src/codegen/llvm/codegen_x86_64.cc +++ b/tirx/src/codegen/llvm/codegen_x86_64.cc @@ -43,6 +43,8 @@ namespace codegen { class CodeGenX86_64 final : public CodeGenCPU { public: + using CodeGenCPU::Dispatch_; + llvm::Value* Dispatch_(const prim::CastNode* op) override; private: diff --git a/tirx/src/ir/prim/math.cc b/tirx/src/ir/prim/math.cc index 5cc173d98e..ffd57eb52b 100644 --- a/tirx/src/ir/prim/math.cc +++ b/tirx/src/ir/prim/math.cc @@ -251,6 +251,7 @@ PrimExpr infinity(PrimType value_ty, Location loc) { } } TVM_FFI_THROW(InternalError) << "Cannot decide infinity for type " << dtype; + TVM_FFI_UNREACHABLE(); } PrimExpr pow(PrimExpr x, PrimExpr y, Location loc) { diff --git a/tirx/src/ir/prim/op.cc b/tirx/src/ir/prim/op.cc index 8153c442d5..438f56a50e 100644 --- a/tirx/src/ir/prim/op.cc +++ b/tirx/src/ir/prim/op.cc @@ -243,6 +243,7 @@ PrimExpr max_value(PrimType value_ty, Location loc) { return FloatImm(value_ty, 6.0, loc); } TVM_FFI_THROW(InternalError) << "Cannot decide max_value for type" << dtype; + TVM_FFI_UNREACHABLE(); } PrimExpr min_value(PrimType value_ty, Location loc) { @@ -297,6 +298,7 @@ PrimExpr min_value(PrimType value_ty, Location loc) { return FloatImm(value_ty, -6.0, loc); } TVM_FFI_THROW(InternalError) << "Cannot decide min_value for type" << dtype; + TVM_FFI_UNREACHABLE(); } PrimExpr cast(PrimExpr value, PrimType t, Location loc) { diff --git a/tirx/src/sym/const_int_bound.cc b/tirx/src/sym/const_int_bound.cc index 85f5078612..b5c9c1e55b 100644 --- a/tirx/src/sym/const_int_bound.cc +++ b/tirx/src/sym/const_int_bound.cc @@ -92,7 +92,7 @@ struct ConstIntBoundAnalyzer::Entry { } }; -class ConstIntBoundAnalyzer::Impl +class ConstIntBoundAnalyzer::Impl final : public tvm::ExprFunctor<ConstIntBoundAnalyzer::Entry(const Expr&)> { public: explicit Impl(AnalyzerObj* parent) : parent_(parent) {} diff --git a/tirx/src/sym/modular_set.cc b/tirx/src/sym/modular_set.cc index fd63276a39..d765747f29 100644 --- a/tirx/src/sym/modular_set.cc +++ b/tirx/src/sym/modular_set.cc @@ -134,7 +134,8 @@ struct ModularSetAnalyzer::Entry { } }; -class ModularSetAnalyzer::Impl : public tvm::ExprFunctor<ModularSetAnalyzer::Entry(const Expr&)> { +class ModularSetAnalyzer::Impl final + : public tvm::ExprFunctor<ModularSetAnalyzer::Entry(const Expr&)> { public: explicit Impl(AnalyzerObj* parent) : parent_(parent) {} diff --git a/tirx/src/sym/z3_prover.cc b/tirx/src/sym/z3_prover.cc index 105f7dbd47..ef3be241a0 100644 --- a/tirx/src/sym/z3_prover.cc +++ b/tirx/src/sym/z3_prover.cc @@ -102,7 +102,7 @@ struct Namespace { } // namespace -class Z3Prover::Impl : tvm::ExprFunctor<z3::expr(const Expr&)> { +class Z3Prover::Impl final : tvm::ExprFunctor<z3::expr(const Expr&)> { public: using Base = tvm::ExprFunctor<z3::expr(const Expr&)>; using Self = Z3Prover::Impl; diff --git a/tirx/src/tirx/analysis/check_well_formed.cc b/tirx/src/tirx/analysis/check_well_formed.cc index 2af95fd149..0efa2fad1d 100644 --- a/tirx/src/tirx/analysis/check_well_formed.cc +++ b/tirx/src/tirx/analysis/check_well_formed.cc @@ -585,6 +585,7 @@ TVM_FFI_STATIC_INIT_BLOCK() { TVM_FFI_THROW(InternalError) << "Expected VerifyWellFormed argument to be a Function or IRModule, but found " << obj->GetTypeKey(); + TVM_FFI_UNREACHABLE(); } }); } diff --git a/tirx/src/tirx/transform/narrow_datatype.cc b/tirx/src/tirx/transform/narrow_datatype.cc index 72df52004a..c721ea7f26 100644 --- a/tirx/src/tirx/transform/narrow_datatype.cc +++ b/tirx/src/tirx/transform/narrow_datatype.cc @@ -75,6 +75,8 @@ using sym::ConstIntBound; // Otherwise, `var` is not narrowed, that is, `vmap[var] = var.dtype.bits()` class DataTypeVisitor final : public StmtExprVisitor { public: + using StmtExprVisitor::Visit_; + explicit DataTypeVisitor(int target_bits) : bits_(target_bits), target_bits_(target_bits) {} ffi::Optional<VisitInterrupt> Visit(ffi::AnyView expr) final { diff --git a/tirx/src/tirx/transform/vectorize_loop.cc b/tirx/src/tirx/transform/vectorize_loop.cc index 5d0d540d32..579cf642c3 100644 --- a/tirx/src/tirx/transform/vectorize_loop.cc +++ b/tirx/src/tirx/transform/vectorize_loop.cc @@ -219,6 +219,8 @@ class TryPredicateTensorAccesses : public StmtExprMutator { } private: + using StmtExprMutator::Mutate_; + UnchangedOr<PrimExpr> Mutate_(const TensorLoadNode* op, InplaceMode inplace_mode) final { auto load = StmtExprMutator::Mutate_(op, inplace_mode) .ValueOrUnchanged(ffi::GetRef<PrimExpr>(op)) @@ -340,6 +342,8 @@ class TryPredicateTensorAccesses : public StmtExprMutator { // class VecAllocAccess : public StmtExprMutator { public: + using StmtExprMutator::Mutate_; + VecAllocAccess(const VarNode* buf, Var var, PrimExpr var_lanes) : buf_(buf), var_(var), var_lanes_(var_lanes) {}
